arch/arm/boot/dts/imx6q-novena.dts

   1 /*
   2  * Copyright 2015 Sutajio Ko-Usagi PTE LTD
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  *
  47  */
  48
  49 /dts-v1/;
  50 #include "imx6q.dtsi"
  51 #include <dt-bindings/gpio/gpio.h>
  52 #include <dt-bindings/input/input.h>
  53
  54 / {
  55         model = "Kosagi Novena Dual/Quad";
  56         compatible = "kosagi,imx6q-novena", "fsl,imx6q";
  57
  58         /* Will be filled by the bootloader */
  59         memory@10000000 {
  60                 reg = <0x10000000 0>;
  61         };
  62
  63         chosen {
  64                 stdout-path = &uart2;
  65         };
  66
  67         backlight: backlight {
  68                 compatible = "pwm-backlight";
  69                 pwms = <&pwm1 0 10000000>;
  70                 pinctrl-names = "default";
  71                 pinctrl-0 = <&pinctrl_backlight_novena>;
  72                 power-supply = <&reg_lvds_lcd>;
  73                 brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>;
  74                 default-brightness-level = <12>;
  75         };
  76
  77         gpio-keys {
  78                 compatible = "gpio-keys";
  79                 pinctrl-names = "default";
  80                 pinctrl-0 = <&pinctrl_gpio_keys_novena>;
  81
  82                 user-button {
  83                         label = "User Button";
  84                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_POWER>;
  86                 };
  87
  88                 lid {
  89                         label = "Lid";
  90                         gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
  91                         linux,input-type = <5>; /* EV_SW */
  92                         linux,code = <0>;       /* SW_LID */
  93                 };
  94         };
  95
  96         leds {
  97                 compatible = "gpio-leds";
  98                 pinctrl-names = "default";
  99                 pinctrl-0 = <&pinctrl_leds_novena>;
 100
 101                 heartbeat {
 102                         label = "novena:white:panel";
 103                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
 104                         linux,default-trigger = "default-on";
 105                 };
 106         };
 107
 108         panel: panel {
 109                 compatible = "innolux,n133hse-ea1", "simple-panel";
 110                 backlight = <&backlight>;
 111         };
 112
 113         reg_2p5v: regulator-2p5v {
 114                 compatible = "regulator-fixed";
 115                 regulator-name = "2P5V";
 116                 regulator-min-microvolt = <2500000>;
 117                 regulator-max-microvolt = <2500000>;
 118                 regulator-always-on;
 119         };
 120
 121         reg_3p3v: regulator-3p3v {
 122                 compatible = "regulator-fixed";
 123                 regulator-name = "3P3V";
 124                 regulator-min-microvolt = <3300000>;
 125                 regulator-max-microvolt = <3300000>;
 126                 regulator-always-on;
 127         };
 128
 129         reg_audio_codec: regulator-audio-codec {
 130                 compatible = "regulator-fixed";
 131                 regulator-name = "es8328-power";
 132                 regulator-boot-on;
 133                 regulator-min-microvolt = <5000000>;
 134                 regulator-max-microvolt = <5000000>;
 135                 startup-delay-us = <400000>;
 136                 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
 137                 enable-active-high;
 138         };
 139
 140         reg_display: regulator-display {
 141                 compatible = "regulator-fixed";
 142                 regulator-name = "lcd-display-power";
 143                 regulator-min-microvolt = <3300000>;
 144                 regulator-max-microvolt = <3300000>;
 145                 startup-delay-us = <200000>;
 146                 gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
 147                 enable-active-high;
 148         };
 149
 150         reg_lvds_lcd: regulator-lvds-lcd {
 151                 compatible = "regulator-fixed";
 152                 regulator-name = "lcd-lvds-power";
 153                 regulator-min-microvolt = <3300000>;
 154                 regulator-max-microvolt = <3300000>;
 155                 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
 156                 enable-active-high;
 157         };
 158
 159         reg_pcie: regulator-pcie {
 160                 compatible = "regulator-fixed";
 161                 regulator-name = "pcie-bus-power";
 162                 regulator-min-microvolt = <1500000>;
 163                 regulator-max-microvolt = <1500000>;
 164                 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
 165                 enable-active-high;
 166         };
 167
 168         reg_sata: regulator-sata {
 169                 compatible = "regulator-fixed";
 170                 regulator-name = "sata-power";
 171                 regulator-boot-on;
 172                 regulator-min-microvolt = <3300000>;
 173                 regulator-max-microvolt = <3300000>;
 174                 startup-delay-us = <10000>;
 175                 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
 176                 enable-active-high;
 177         };
 178
 179         reg_usb_otg_vbus: regulator-usb-otg-vbus {
 180                 compatible = "regulator-fixed";
 181                 regulator-name = "usb_otg_vbus";
 182                 regulator-min-microvolt = <5000000>;
 183                 regulator-max-microvolt = <5000000>;
 184                 enable-active-high;
 185         };
 186
 187         sound {
 188                 compatible = "fsl,imx-audio-es8328";
 189                 model = "imx-audio-es8328";
 190                 ssi-controller = <&ssi1>;
 191                 audio-codec = <&codec>;
 192                 audio-amp-supply = <&reg_audio_codec>;
 193                 jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>;
 194                 audio-routing =
 195                         "Speaker", "LOUT2",
 196                         "Speaker", "ROUT2",
 197                         "Speaker", "audio-amp",
 198                         "Headphone", "ROUT1",
 199                         "Headphone", "LOUT1",
 200                         "LINPUT1", "Mic Jack",
 201                         "RINPUT1", "Mic Jack",
 202                         "Mic Jack", "Mic Bias";
 203                 mux-int-port = <0x1>;
 204                 mux-ext-port = <0x3>;
 205         };
 206 };
 207
 208 &audmux {
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&pinctrl_audmux_novena>;
 211         status = "okay";
 212 };
 213
 214 &ecspi3 {
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_ecspi3_novena>;
 217         status = "okay";
 218 };
 219
 220 &fec {
 221         pinctrl-names = "default";
 222         pinctrl-0 = <&pinctrl_enet_novena>;
 223         phy-mode = "rgmii";
 224         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 225         rxc-skew-ps = <3000>;
 226         rxdv-skew-ps = <0>;
 227         txc-skew-ps = <3000>;
 228         txen-skew-ps = <0>;
 229         rxd0-skew-ps = <0>;
 230         rxd1-skew-ps = <0>;
 231         rxd2-skew-ps = <0>;
 232         rxd3-skew-ps = <0>;
 233         txd0-skew-ps = <3000>;
 234         txd1-skew-ps = <3000>;
 235         txd2-skew-ps = <3000>;
 236         txd3-skew-ps = <3000>;
 237         status = "okay";
 238 };
 239
 240 &hdmi {
 241         pinctrl-names = "default";
 242         pinctrl-0 = <&pinctrl_hdmi_novena>;
 243         ddc-i2c-bus = <&i2c2>;
 244         status = "okay";
 245 };
 246
 247 &i2c1 {
 248         pinctrl-names = "default";
 249         pinctrl-0 = <&pinctrl_i2c1_novena>;
 250         status = "okay";
 251
 252         accel: mma8452@1c {
 253                 compatible = "fsl,mma8452";
 254                 reg = <0x1c>;
 255         };
 256
 257         rtc: pcf8523@68 {
 258                 compatible = "nxp,pcf8523";
 259                 reg = <0x68>;
 260         };
 261
 262         sbs_battery: bq20z75@b {
 263                 compatible = "sbs,sbs-battery";
 264                 reg = <0x0b>;
 265                 sbs,i2c-retry-count = <50>;
 266         };
 267
 268         touch: stmpe811@44 {
 269                 compatible = "st,stmpe811";
 270                 reg = <0x44>;
 271                 irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
 272                 id = <0>;
 273                 blocks = <0x5>;
 274                 irq-trigger = <0x1>;
 275                 pinctrl-names = "default";
 276                 pinctrl-0 = <&pinctrl_stmpe_novena>;
 277                 vio-supply = <&reg_3p3v>;
 278                 vcc-supply = <&reg_3p3v>;
 279
 280                 stmpe_touchscreen {
 281                         compatible = "st,stmpe-ts";
 282                         st,sample-time = <4>;
 283                         st,mod-12b = <1>;
 284                         st,ref-sel = <0>;
 285                         st,adc-freq = <1>;
 286                         st,ave-ctrl = <1>;
 287                         st,touch-det-delay = <2>;
 288                         st,settling = <2>;
 289                         st,fraction-z = <7>;
 290                         st,i-drive = <1>;
 291                 };
 292         };
 293 };
 294
 295 &i2c2 {
 296         pinctrl-names = "default";
 297         pinctrl-0 = <&pinctrl_i2c2_novena>;
 298         status = "okay";
 299
 300         pmic: pfuze100@8 {
 301                 compatible = "fsl,pfuze100";
 302                 reg = <0x08>;
 303
 304                 regulators {
 305                         reg_sw1a: sw1a {
 306                                 regulator-min-microvolt = <300000>;
 307                                 regulator-max-microvolt = <1875000>;
 308                                 regulator-boot-on;
 309                                 regulator-always-on;
 310                                 regulator-ramp-delay = <6250>;
 311                         };
 312
 313                         reg_sw1c: sw1c {
 314                                 regulator-min-microvolt = <300000>;
 315                                 regulator-max-microvolt = <1875000>;
 316                                 regulator-boot-on;
 317                                 regulator-always-on;
 318                         };
 319
 320                         reg_sw2: sw2 {
 321                                 regulator-min-microvolt = <800000>;
 322                                 regulator-max-microvolt = <3300000>;
 323                                 regulator-boot-on;
 324                                 regulator-always-on;
 325                         };
 326
 327                         reg_sw3a: sw3a {
 328                                 regulator-min-microvolt = <400000>;
 329                                 regulator-max-microvolt = <1975000>;
 330                                 regulator-boot-on;
 331                                 regulator-always-on;
 332                         };
 333
 334                         reg_sw3b: sw3b {
 335                                 regulator-min-microvolt = <400000>;
 336                                 regulator-max-microvolt = <1975000>;
 337                                 regulator-boot-on;
 338                                 regulator-always-on;
 339                         };
 340
 341                         reg_sw4: sw4 {
 342                                 regulator-min-microvolt = <800000>;
 343                                 regulator-max-microvolt = <3300000>;
 344                         };
 345
 346                         reg_swbst: swbst {
 347                                 regulator-min-microvolt = <5000000>;
 348                                 regulator-max-microvolt = <5150000>;
 349                                 regulator-boot-on;
 350                         };
 351
 352                         reg_snvs: vsnvs {
 353                                 regulator-min-microvolt = <1000000>;
 354                                 regulator-max-microvolt = <3000000>;
 355                                 regulator-boot-on;
 356                                 regulator-always-on;
 357                         };
 358
 359                         reg_vref: vrefddr {
 360                                 regulator-boot-on;
 361                                 regulator-always-on;
 362                         };
 363
 364                         reg_vgen1: vgen1 {
 365                                 regulator-min-microvolt = <800000>;
 366                                 regulator-max-microvolt = <1550000>;
 367                         };
 368
 369                         reg_vgen2: vgen2 {
 370                                 regulator-min-microvolt = <800000>;
 371                                 regulator-max-microvolt = <1550000>;
 372                         };
 373
 374                         reg_vgen3: vgen3 {
 375                                 regulator-min-microvolt = <1800000>;
 376                                 regulator-max-microvolt = <3300000>;
 377                         };
 378
 379                         reg_vgen4: vgen4 {
 380                                 regulator-min-microvolt = <1800000>;
 381                                 regulator-max-microvolt = <3300000>;
 382                                 regulator-always-on;
 383                         };
 384
 385                         reg_vgen5: vgen5 {
 386                                 regulator-min-microvolt = <1800000>;
 387                                 regulator-max-microvolt = <3300000>;
 388                                 regulator-always-on;
 389                         };
 390
 391                         reg_vgen6: vgen6 {
 392                                 regulator-min-microvolt = <1800000>;
 393                                 regulator-max-microvolt = <3300000>;
 394                                 regulator-always-on;
 395                         };
 396                 };
 397         };
 398 };
 399
 400 &i2c3 {
 401         pinctrl-names = "default";
 402         pinctrl-0 = <&pinctrl_i2c3_novena>;
 403         status = "okay";
 404
 405         codec: es8328@11 {
 406                 compatible = "everest,es8328";
 407                 reg = <0x11>;
 408                 DVDD-supply = <&reg_audio_codec>;
 409                 AVDD-supply = <&reg_audio_codec>;
 410                 PVDD-supply = <&reg_audio_codec>;
 411                 HPVDD-supply = <&reg_audio_codec>;
 412                 pinctrl-names = "default";
 413                 pinctrl-0 = <&pinctrl_sound_novena>;
 414                 clocks = <&clks IMX6QDL_CLK_CKO1>;
 415                 assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
 416                                   <&clks IMX6QDL_CLK_CKO1_SEL>,
 417                                   <&clks IMX6QDL_CLK_PLL4_AUDIO>,
 418                                   <&clks IMX6QDL_CLK_CKO1>;
 419                 assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
 420                                          <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
 421                                          <&clks IMX6QDL_CLK_OSC>,
 422                                          <&clks IMX6QDL_CLK_CKO1_PODF>;
 423                 assigned-clock-rates = <0 0 722534400 22579200>;
 424         };
 425 };
 426
 427 &kpp {
 428         pinctrl-names = "default";
 429         pinctrl-0 = <&pinctrl_kpp_novena>;
 430         linux,keymap = <
 431                 MATRIX_KEY(1, 1, KEY_CONFIG)
 432         >;
 433         status = "okay";
 434 };
 435
 436 &ldb {
 437         fsl,dual-channel;
 438         status = "okay";
 439
 440         lvds-channel@0 {
 441                 fsl,data-mapping = "jeida";
 442                 fsl,data-width = <24>;
 443                 fsl,panel = <&panel>;
 444                 status = "okay";
 445         };
 446 };
 447
 448 &pcie {
 449         pinctrl-names = "default";
 450         pinctrl-0 = <&pinctrl_pcie_novena>;
 451         reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
 452         vpcie-supply = <&reg_pcie>;
 453         status = "okay";
 454 };
 455
 456 &pwm1 {
 457         status = "okay";
 458 };
 459
 460 &sata {
 461         target-supply = <&reg_sata>;
 462         fsl,transmit-level-mV = <1025>;
 463         fsl,transmit-boost-mdB = <0>;
 464         fsl,transmit-atten-16ths = <8>;
 465         status = "okay";
 466 };
 467
 468 &ssi1 {
 469         status = "okay";
 470 };
 471
 472 &uart2 {
 473         pinctrl-names = "default";
 474         pinctrl-0 = <&pinctrl_uart2_novena>;
 475         status = "okay";
 476 };
 477
 478 &uart3 {
 479         pinctrl-names = "default";
 480         pinctrl-0 = <&pinctrl_uart3_novena>;
 481         status = "okay";
 482 };
 483
 484 &uart4 {
 485         pinctrl-names = "default";
 486         pinctrl-0 = <&pinctrl_uart4_novena>;
 487         status = "okay";
 488 };
 489
 490 &usbotg {
 491         vbus-supply = <&reg_usb_otg_vbus>;
 492         dr_mode = "otg";
 493         pinctrl-names = "default";
 494         pinctrl-0 = <&pinctrl_usbotg_novena>;
 495         disable-over-current;
 496         status = "okay";
 497 };
 498
 499 &usbh1 {
 500         vbus-supply = <&reg_swbst>;
 501         status = "okay";
 502 };
 503
 504 &usdhc2 {
 505         pinctrl-names = "default";
 506         pinctrl-0 = <&pinctrl_usdhc2_novena>;
 507         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 508         wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 509         bus-width = <4>;
 510         status = "okay";
 511 };
 512
 513 &usdhc3 {
 514         pinctrl-names = "default";
 515         pinctrl-0 = <&pinctrl_usdhc3_novena>;
 516         bus-width = <4>;
 517         non-removable;
 518         status = "okay";
 519 };
 520
 521 &iomuxc {
 522         pinctrl_audmux_novena: audmuxgrp-novena {
 523                 fsl,pins = <
 524                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 525                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 526                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 527                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 528                 >;
 529         };
 530
 531         pinctrl_backlight_novena: backlightgrp-novena {
 532                 fsl,pins = <
 533                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT         0x1b0b0
 534                         MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28       0x1b0b1
 535                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b1
 536                 >;
 537         };
 538
 539         pinctrl_ecspi3_novena: ecspi3grp-novena {
 540                 fsl,pins = <
 541                         MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
 542                         MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
 543                         MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
 544                 >;
 545         };
 546
 547         pinctrl_enet_novena: enetgrp-novena {
 548                 fsl,pins = <
 549                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 550                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 551                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b020
 552                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b028
 553                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b028
 554                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b028
 555                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b028
 556                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b028
 557                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 558                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 559                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 560                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 561                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 562                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 563                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 564                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 565                         /* Ethernet reset */
 566                         MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x1b0b1
 567                 >;
 568         };
 569
 570         pinctrl_fpga_gpio: fpgagpiogrp-novena {
 571                 fsl,pins = <
 572                         /* FPGA power */
 573                         MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b1
 574                         /* Reset */
 575                         MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07      0x1b0b1
 576                         /* FPGA GPIOs */
 577                         MX6QDL_PAD_EIM_DA0__GPIO3_IO00          0x1b0b1
 578                         MX6QDL_PAD_EIM_DA1__GPIO3_IO01          0x1b0b1
 579                         MX6QDL_PAD_EIM_DA2__GPIO3_IO02          0x1b0b1
 580                         MX6QDL_PAD_EIM_DA3__GPIO3_IO03          0x1b0b1
 581                         MX6QDL_PAD_EIM_DA4__GPIO3_IO04          0x1b0b1
 582                         MX6QDL_PAD_EIM_DA5__GPIO3_IO05          0x1b0b1
 583                         MX6QDL_PAD_EIM_DA6__GPIO3_IO06          0x1b0b1
 584                         MX6QDL_PAD_EIM_DA7__GPIO3_IO07          0x1b0b1
 585                         MX6QDL_PAD_EIM_DA8__GPIO3_IO08          0x1b0b1
 586                         MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0x1b0b1
 587                         MX6QDL_PAD_EIM_DA10__GPIO3_IO10         0x1b0b1
 588                         MX6QDL_PAD_EIM_DA11__GPIO3_IO11         0x1b0b1
 589                         MX6QDL_PAD_EIM_DA12__GPIO3_IO12         0x1b0b1
 590                         MX6QDL_PAD_EIM_DA13__GPIO3_IO13         0x1b0b1
 591                         MX6QDL_PAD_EIM_DA14__GPIO3_IO14         0x1b0b1
 592                         MX6QDL_PAD_EIM_DA15__GPIO3_IO15         0x1b0b1
 593                         MX6QDL_PAD_EIM_A16__GPIO2_IO22          0x1b0b1
 594                         MX6QDL_PAD_EIM_A17__GPIO2_IO21          0x1b0b1
 595                         MX6QDL_PAD_EIM_A18__GPIO2_IO20          0x1b0b1
 596                         MX6QDL_PAD_EIM_CS0__GPIO2_IO23          0x1b0b1
 597                         MX6QDL_PAD_EIM_CS1__GPIO2_IO24          0x1b0b1
 598                         MX6QDL_PAD_EIM_LBA__GPIO2_IO27          0x1b0b1
 599                         MX6QDL_PAD_EIM_OE__GPIO2_IO25           0x1b0b1
 600                         MX6QDL_PAD_EIM_RW__GPIO2_IO26           0x1b0b1
 601                         MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x1b0b1
 602                         MX6QDL_PAD_EIM_BCLK__GPIO6_IO31         0x1b0b1
 603                 >;
 604         };
 605
 606         pinctrl_fpga_eim: fpgaeimgrp-novena {
 607                 fsl,pins = <
 608                         /* FPGA power */
 609                         MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b1
 610                         /* Reset */
 611                         MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07      0x1b0b1
 612                         /* FPGA GPIOs */
 613                         MX6QDL_PAD_EIM_DA0__EIM_AD00            0xb0f1
 614                         MX6QDL_PAD_EIM_DA1__EIM_AD01            0xb0f1
 615                         MX6QDL_PAD_EIM_DA2__EIM_AD02            0xb0f1
 616                         MX6QDL_PAD_EIM_DA3__EIM_AD03            0xb0f1
 617                         MX6QDL_PAD_EIM_DA4__EIM_AD04            0xb0f1
 618                         MX6QDL_PAD_EIM_DA5__EIM_AD05            0xb0f1
 619                         MX6QDL_PAD_EIM_DA6__EIM_AD06            0xb0f1
 620                         MX6QDL_PAD_EIM_DA7__EIM_AD07            0xb0f1
 621                         MX6QDL_PAD_EIM_DA8__EIM_AD08            0xb0f1
 622                         MX6QDL_PAD_EIM_DA9__EIM_AD09            0xb0f1
 623                         MX6QDL_PAD_EIM_DA10__EIM_AD10           0xb0f1
 624                         MX6QDL_PAD_EIM_DA11__EIM_AD11           0xb0f1
 625                         MX6QDL_PAD_EIM_DA12__EIM_AD12           0xb0f1
 626                         MX6QDL_PAD_EIM_DA13__EIM_AD13           0xb0f1
 627                         MX6QDL_PAD_EIM_DA14__EIM_AD14           0xb0f1
 628                         MX6QDL_PAD_EIM_DA15__EIM_AD15           0xb0f1
 629                         MX6QDL_PAD_EIM_A16__EIM_ADDR16          0xb0f1
 630                         MX6QDL_PAD_EIM_A17__EIM_ADDR17          0xb0f1
 631                         MX6QDL_PAD_EIM_A18__EIM_ADDR18          0xb0f1
 632                         MX6QDL_PAD_EIM_CS0__EIM_CS0_B           0xb0f1
 633                         MX6QDL_PAD_EIM_CS1__EIM_CS1_B           0xb0f1
 634                         MX6QDL_PAD_EIM_LBA__EIM_LBA_B           0xb0f1
 635                         MX6QDL_PAD_EIM_OE__EIM_OE_B             0xb0f1
 636                         MX6QDL_PAD_EIM_RW__EIM_RW               0xb0f1
 637                         MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B         0xb0f1
 638                         MX6QDL_PAD_EIM_BCLK__EIM_BCLK           0xb0f1
 639                 >;
 640         };
 641
 642         pinctrl_gpio_keys_novena: gpiokeysgrp-novena {
 643                 fsl,pins = <
 644                         /* User button */
 645                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0
 646                         /* PCIe Wakeup */
 647                         MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1f0e0
 648                         /* Lid switch */
 649                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x1b0b0
 650                 >;
 651         };
 652
 653         pinctrl_hdmi_novena: hdmigrp-novena {
 654                 fsl,pins = <
 655                         MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE   0x1f8b0
 656                         MX6QDL_PAD_EIM_A24__GPIO5_IO04          0x1b0b1
 657                 >;
 658         };
 659
 660         pinctrl_i2c1_novena: i2c1grp-novena {
 661                 fsl,pins = <
 662                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 663                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 664                 >;
 665         };
 666
 667         pinctrl_i2c2_novena: i2c2grp-novena {
 668                 fsl,pins = <
 669                         MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
 670                         MX6QDL_PAD_EIM_D16__I2C2_SDA            0x4001b8b1
 671                 >;
 672         };
 673
 674         pinctrl_i2c3_novena: i2c3grp-novena {
 675                 fsl,pins = <
 676                         MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
 677                         MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
 678                 >;
 679         };
 680
 681         pinctrl_kpp_novena: kppgrp-novena {
 682                 fsl,pins = <
 683                         /* Front panel button */
 684                         MX6QDL_PAD_KEY_ROW1__KEY_ROW1           0x1b0b1
 685                         /* Fake column driver, not connected */
 686                         MX6QDL_PAD_KEY_COL1__KEY_COL1           0x1b0b1
 687                 >;
 688         };
 689
 690         pinctrl_leds_novena: ledsgrp-novena {
 691                 fsl,pins = <
 692                         MX6QDL_PAD_SD1_DAT3__GPIO1_IO21         0x1b0b1
 693                 >;
 694         };
 695
 696         pinctrl_pcie_novena: pciegrp-novena {
 697                 fsl,pins = <
 698                         /* Reset */
 699                         MX6QDL_PAD_EIM_D29__GPIO3_IO29          0x1b0b1
 700                         /* Power On */
 701                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b0b1
 702                         /* Wifi kill */
 703                         MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x1b0b1
 704                 >;
 705         };
 706
 707         pinctrl_sata_novena: satagrp-novena {
 708                 fsl,pins = <
 709                         MX6QDL_PAD_EIM_D30__GPIO3_IO30          0x1b0b1
 710                 >;
 711         };
 712
 713         pinctrl_senoko_novena: senokogrp-novena {
 714                 fsl,pins = <
 715                         /* Senoko IRQ line */
 716                         MX6QDL_PAD_SD1_CLK__GPIO1_IO20          0x13048
 717                         /* Senoko reset line */
 718                         MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21       0x1b0b1
 719                 >;
 720         };
 721
 722         pinctrl_sound_novena: soundgrp-novena {
 723                 fsl,pins = <
 724                         /* Audio power regulator */
 725                         MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17      0x1b0b1
 726                         /* Headphone plug */
 727                         MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15      0x1b0b1
 728                         MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x000b0
 729                 >;
 730         };
 731
 732         pinctrl_stmpe_novena: stmpegrp-novena {
 733                 fsl,pins = <
 734                         /* Touchscreen interrupt */
 735                         MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x1b0b1
 736                 >;
 737         };
 738
 739         pinctrl_uart2_novena: uart2grp-novena {
 740                 fsl,pins = <
 741                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 742                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 743                 >;
 744         };
 745
 746         pinctrl_uart3_novena: uart3grp-novena {
 747                 fsl,pins = <
 748                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 749                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 750                 >;
 751         };
 752
 753         pinctrl_uart4_novena: uart4grp-novena {
 754                 fsl,pins = <
 755                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
 756                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
 757                 >;
 758         };
 759
 760         pinctrl_usbotg_novena: usbotggrp-novena {
 761                 fsl,pins = <
 762                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 763                 >;
 764         };
 765
 766         pinctrl_usdhc2_novena: usdhc2grp-novena {
 767                 fsl,pins = <
 768                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
 769                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
 770                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
 771                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
 772                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
 773                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
 774                         /* Write protect */
 775                         MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b1
 776                         /* Card detect */
 777                         MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b1
 778                 >;
 779         };
 780
 781         pinctrl_usdhc3_novena: usdhc3grp-novena {
 782                 fsl,pins = <
 783                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 784                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 785                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 786                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 787                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 788                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 789                 >;
 790         };
 791 };