arch/arm/boot/dts/imx6q-cm-fx6.dts

   1 /*
   2  * Copyright 2013 CompuLab Ltd.
   3  *
   4  * Author: Valentin Raevsky <valentin@compulab.co.il>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License
  13  *     version 2 as published by the Free Software Foundation.
  14  *
  15  *     This file is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  * Or, alternatively,
  21  *
  22  *  b) Permission is hereby granted, free of charge, to any person
  23  *     obtaining a copy of this software and associated documentation
  24  *     files (the "Software"), to deal in the Software without
  25  *     restriction, including without limitation the rights to use,
  26  *     copy, modify, merge, publish, distribute, sublicense, and/or
  27  *     sell copies of the Software, and to permit persons to whom the
  28  *     Software is furnished to do so, subject to the following
  29  *     conditions:
  30  *
  31  *     The above copyright notice and this permission notice shall be
  32  *     included in all copies or substantial portions of the Software.
  33  *
  34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41  *     OTHER DEALINGS IN THE SOFTWARE.
  42  */
  43
  44 /dts-v1/;
  45 #include <dt-bindings/gpio/gpio.h>
  46 #include <dt-bindings/sound/fsl-imx-audmux.h>
  47 #include "imx6q.dtsi"
  48
  49 / {
  50         model = "CompuLab CM-FX6";
  51         compatible = "compulab,cm-fx6", "fsl,imx6q";
  52
  53         memory {
  54                 reg = <0x10000000 0x80000000>;
  55         };
  56
  57         leds {
  58                 compatible = "gpio-leds";
  59
  60                 heartbeat-led {
  61                         label = "Heartbeat";
  62                         gpios = <&gpio2 31 0>;
  63                         linux,default-trigger = "heartbeat";
  64                 };
  65         };
  66
  67         reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
  68                 compatible = "regulator-fixed";
  69                 regulator-name = "regulator-pcie-power-on-gpio";
  70                 regulator-min-microvolt = <3300000>;
  71                 regulator-max-microvolt = <3300000>;
  72                 gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
  73                 enable-active-high;
  74         };
  75
  76         reg_usb_h1_vbus: usb_h1_vbus {
  77                 compatible = "regulator-fixed";
  78                 regulator-name = "usb_h1_vbus";
  79                 regulator-min-microvolt = <5000000>;
  80                 regulator-max-microvolt = <5000000>;
  81                 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
  82                 enable-active-high;
  83         };
  84
  85         reg_usb_otg_vbus: usb_otg_vbus {
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "usb_otg_vbus";
  88                 regulator-min-microvolt = <5000000>;
  89                 regulator-max-microvolt = <5000000>;
  90                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  91                 enable-active-high;
  92         };
  93
  94         sound-analog {
  95                 compatible = "simple-audio-card";
  96                 simple-audio-card,name = "On-board analog audio";
  97                 simple-audio-card,widgets =
  98                         "Headphone", "Headphone Jack",
  99                         "Line", "Line Out",
 100                         "Microphone", "Mic Jack",
 101                         "Line", "Line In";
 102                 simple-audio-card,routing =
 103                         "Headphone Jack", "RHPOUT",
 104                         "Headphone Jack", "LHPOUT",
 105                         "MICIN", "Mic Bias",
 106                         "Mic Bias", "Mic Jack";
 107                 simple-audio-card,format = "i2s";
 108                 simple-audio-card,bitclock-master = <&sound_master>;
 109                 simple-audio-card,frame-master = <&sound_master>;
 110                 simple-audio-card,bitclock-inversion;
 111
 112                 sound_master: simple-audio-card,cpu {
 113                         sound-dai = <&ssi2>;
 114                         system-clock-frequency = <2822400>;
 115                 };
 116
 117                 simple-audio-card,codec {
 118                         sound-dai = <&wm8731>;
 119                 };
 120         };
 121
 122         sound-spdif {
 123                 compatible = "fsl,imx-audio-spdif";
 124                 model = "imx-spdif";
 125                 spdif-controller = <&spdif>;
 126                 spdif-out;
 127                 spdif-in;
 128         };
 129 };
 130
 131 &audmux {
 132         pinctrl-names = "default";
 133         pinctrl-0 = <&pinctrl_audmux>;
 134         status = "okay";
 135
 136         ssi2 {
 137                 fsl,audmux-port = <1>;
 138                 fsl,port-config = <
 139                         (IMX_AUDMUX_V2_PTCR_RCLKDIR |
 140                         IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
 141                         IMX_AUDMUX_V2_PTCR_TCLKDIR |
 142                         IMX_AUDMUX_V2_PTCR_TCSEL(3))
 143                         IMX_AUDMUX_V2_PDCR_RXDSEL(3)
 144                 >;
 145         };
 146
 147         audmux4 {
 148                 fsl,audmux-port = <3>;
 149                 fsl,port-config = <
 150                         (IMX_AUDMUX_V2_PTCR_TFSDIR |
 151                         IMX_AUDMUX_V2_PTCR_TFSEL(1) |
 152                         IMX_AUDMUX_V2_PTCR_RCLKDIR |
 153                         IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
 154                         IMX_AUDMUX_V2_PTCR_TCLKDIR |
 155                         IMX_AUDMUX_V2_PTCR_TCSEL(1))
 156                         IMX_AUDMUX_V2_PDCR_RXDSEL(1)
 157                 >;
 158         };
 159 };
 160
 161 &cpu0 {
 162         /*
 163          * Although the imx6q fuse indicates that 1.2GHz operation is possible,
 164          * the module behaves unstable at this frequency. Hence, remove the
 165          * 1.2GHz operation point here.
 166          */
 167         operating-points = <
 168                 /* kHz  uV */
 169                 996000  1250000
 170                 852000  1250000
 171                 792000  1175000
 172                 396000  975000
 173         >;
 174         fsl,soc-operating-points = <
 175                 /* ARM kHz      SOC-PU uV */
 176                 996000          1250000
 177                 852000          1250000
 178                 792000          1175000
 179                 396000          1175000
 180         >;
 181 };
 182
 183 &ecspi1 {
 184         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
 185         pinctrl-names = "default";
 186         pinctrl-0 = <&pinctrl_ecspi1>;
 187         status = "okay";
 188
 189         m25p80@0 {
 190                 #address-cells = <1>;
 191                 #size-cells = <1>;
 192                 compatible = "st,m25p", "jedec,spi-nor";
 193                 spi-max-frequency = <20000000>;
 194                 reg = <0>;
 195         };
 196 };
 197
 198 &fec {
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&pinctrl_enet>;
 201         phy-mode = "rgmii";
 202         status = "okay";
 203 };
 204
 205 &gpmi {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&pinctrl_gpmi_nand>;
 208         status = "okay";
 209 };
 210
 211 &i2c3 {
 212         pinctrl-names = "default";
 213         pinctrl-0 = <&pinctrl_i2c3>;
 214         status = "okay";
 215         clock-frequency = <100000>;
 216
 217         eeprom@50 {
 218                 compatible = "at24,24c02";
 219                 reg = <0x50>;
 220                 pagesize = <16>;
 221         };
 222
 223         wm8731: codec@1a {
 224                 #sound-dai-cells = <0>;
 225                 compatible = "wlf,wm8731";
 226                 reg = <0x1a>;
 227         };
 228 };
 229
 230 &iomuxc {
 231         pinctrl_audmux: audmuxgrp {
 232                 fsl,pins = <
 233                         MX6QDL_PAD_SD2_CMD__AUD4_RXC   0x17059
 234                         MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x17059
 235                         MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x17059
 236                         MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x17059
 237                         MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
 238                 >;
 239         };
 240
 241         pinctrl_ecspi1: ecspi1grp {
 242                 fsl,pins = <
 243                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
 244                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
 245                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
 246                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30  0x100b1
 247                         MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x100b1
 248                 >;
 249         };
 250
 251         pinctrl_enet: enetgrp {
 252                 fsl,pins = <
 253                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 254                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 255                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 256                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 257                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 258                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 259                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 260                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 261                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 262                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 263                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 264                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 265                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 266                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 267                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 268                 >;
 269         };
 270
 271         pinctrl_gpmi_nand: gpminandgrp {
 272                 fsl,pins = <
 273                         MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 274                         MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 275                         MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 276                         MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 277                         MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 278                         MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
 279                         MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 280                         MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 281                         MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 282                         MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 283                         MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 284                         MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 285                         MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 286                         MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 287                         MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 288                         MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 289                         MX6QDL_PAD_SD4_DAT0__NAND_DQS           0x00b1
 290                 >;
 291         };
 292
 293         pinctrl_i2c3: i2c3grp {
 294                 fsl,pins = <
 295                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
 296                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
 297                 >;
 298         };
 299
 300         pinctrl_pcie: pciegrp {
 301                 fsl,pins = <
 302                         MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 303                         MX6QDL_PAD_EIM_CS1__GPIO2_IO24  0x1b0b1
 304                 >;
 305         };
 306
 307         pinctrl_spdif: spdifgrp {
 308                 fsl,pins = <
 309                         MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
 310                         MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
 311                 >;
 312         };
 313
 314         pinctrl_uart4: uart4grp {
 315                 fsl,pins = <
 316                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
 317                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
 318                 >;
 319         };
 320
 321         pinctrl_usbh1: usbh1grp {
 322                 fsl,pins = <
 323                         MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x1b0b1
 324                 >;
 325         };
 326
 327         pinctrl_usbotg: usbotggrp {
 328                 fsl,pins = <
 329                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 330                         MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x130b0
 331                 >;
 332         };
 333 };
 334
 335 &pcie {
 336         pinctrl-names = "default";
 337         pinctrl-0 = <&pinctrl_pcie>;
 338         reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
 339         vdd-supply = <&reg_pcie_power_on_gpio>;
 340         status = "okay";
 341 };
 342
 343 &sata {
 344         status = "okay";
 345 };
 346
 347 &snvs_poweroff {
 348         status = "okay";
 349 };
 350
 351 &spdif {
 352         pinctrl-names = "default";
 353         pinctrl-0 = <&pinctrl_spdif>;
 354         status = "okay";
 355 };
 356
 357 &ssi2 {
 358         assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
 359                         <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
 360         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
 361         assigned-clock-rates = <0>, <786432000>;
 362         status = "okay";
 363 };
 364
 365 &uart4 {
 366         pinctrl-names = "default";
 367         pinctrl-0 = <&pinctrl_uart4>;
 368         status = "okay";
 369 };
 370
 371 &usbh1 {
 372         vbus-supply = <&reg_usb_h1_vbus>;
 373         pinctrl-names = "default";
 374         pinctrl-0 = <&pinctrl_usbh1>;
 375         status = "okay";
 376 };
 377
 378 &usbotg {
 379         vbus-supply = <&reg_usb_otg_vbus>;
 380         pinctrl-names = "default";
 381         pinctrl-0 = <&pinctrl_usbotg>;
 382         dr_mode = "otg";
 383         status = "okay";
 384 };