Merge tag 'v4.17-rc2' into next-general
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6q-bx50v3.dtsi
1 /*
2  * Copyright 2015 Timesys Corporation.
3  * Copyright 2015 General Electric Company
4  *
5  * This file is dual-licensed: you can use it either under the terms
6  * of the GPL or the X11 license, at your option. Note that this dual
7  * licensing only applies to this file, and not this project as a
8  * whole.
9  *
10  *  a) This file is free software; you can redistribute it and/or
11  *     modify it under the terms of the GNU General Public License
12  *     version 2 as published by the Free Software Foundation.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "imx6q-ba16.dtsi"
44
45 / {
46         clocks {
47                 mclk: clock@0 {
48                         compatible = "fixed-clock";
49                         reg = <0>;
50                         #clock-cells = <0>;
51                         clock-frequency = <22000000>;
52                 };
53         };
54
55         gpio-poweroff {
56                 compatible = "gpio-poweroff";
57                 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
58                 status = "okay";
59         };
60
61         reg_wl18xx_vmmc: regulator-wl18xx {
62                 compatible = "regulator-fixed";
63                 regulator-name = "vwl1807";
64                 regulator-min-microvolt = <3300000>;
65                 regulator-max-microvolt = <3300000>;
66                 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
67                 startup-delay-us = <70000>;
68                 enable-active-high;
69         };
70
71         reg_wlan: regulator-wlan {
72                 compatible = "regulator-fixed";
73                 regulator-name = "3P3V_wlan";
74                 regulator-min-microvolt = <3300000>;
75                 regulator-max-microvolt = <3300000>;
76                 regulator-always-on;
77                 regulator-boot-on;
78                 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
79         };
80
81         sound {
82                 compatible = "fsl,imx6q-ba16-sgtl5000",
83                              "fsl,imx-audio-sgtl5000";
84                 model = "imx6q-ba16-sgtl5000";
85                 ssi-controller = <&ssi1>;
86                 audio-codec = <&sgtl5000>;
87                 audio-routing =
88                         "MIC_IN", "Mic Jack",
89                         "Mic Jack", "Mic Bias",
90                         "LINE_IN", "Line In Jack",
91                         "Headphone Jack", "HP_OUT";
92                 mux-int-port = <1>;
93                 mux-ext-port = <4>;
94         };
95
96         aliases {
97                 mdio-gpio0 = &mdio0;
98         };
99
100         mdio0: mdio-gpio {
101                 compatible = "virtual,mdio-gpio";
102                 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
103                         <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
104
105                 #address-cells = <1>;
106                 #size-cells = <0>;
107
108                 switch@0 {
109                         compatible = "marvell,mv88e6085"; /* 88e6240*/
110                         #address-cells = <1>;
111                         #size-cells = <0>;
112                         reg = <0>;
113
114                         switch_ports: ports {
115                                 #address-cells = <1>;
116                                 #size-cells = <0>;
117                         };
118
119                         mdio {
120                                 #address-cells = <1>;
121                                 #size-cells = <0>;
122
123                                 switchphy0: switchphy@0 {
124                                         reg = <0>;
125                                 };
126
127                                 switchphy1: switchphy@1 {
128                                         reg = <1>;
129                                 };
130
131                                 switchphy2: switchphy@2 {
132                                         reg = <2>;
133                                 };
134
135                                 switchphy3: switchphy@3 {
136                                         reg = <3>;
137                                 };
138
139                                 switchphy4: switchphy@4 {
140                                         reg = <4>;
141                                 };
142                         };
143                 };
144         };
145 };
146
147 &ecspi5 {
148         cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
149         pinctrl-names = "default";
150         pinctrl-0 = <&pinctrl_ecspi5>;
151         status = "okay";
152
153         m25_eeprom: m25p80@0 {
154                 compatible = "atmel,at25";
155                 spi-max-frequency = <10000000>;
156                 size = <0x8000>;
157                 pagesize = <64>;
158                 reg = <0>;
159                 address-width = <16>;
160         };
161 };
162
163 &i2c1 {
164         pinctrl-names = "default", "gpio";
165         pinctrl-1 = <&pinctrl_i2c1_gpio>;
166         sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
167         scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
168
169         pca9547: mux@70 {
170                 compatible = "nxp,pca9547";
171                 reg = <0x70>;
172                 #address-cells = <1>;
173                 #size-cells = <0>;
174
175                 mux1_i2c1: i2c@0 {
176                         #address-cells = <1>;
177                         #size-cells = <0>;
178                         reg = <0x0>;
179
180                         ads7830: ads7830@48 {
181                                 compatible = "ti,ads7830";
182                                 reg = <0x48>;
183                         };
184
185                         mma8453: mma8453@1c {
186                                 compatible = "fsl,mma8453";
187                                 reg = <0x1c>;
188                         };
189                 };
190
191                 mux1_i2c2: i2c@1 {
192                         #address-cells = <1>;
193                         #size-cells = <0>;
194                         reg = <0x1>;
195
196                         eeprom: eeprom@50 {
197                                 compatible = "atmel,24c08";
198                                 reg = <0x50>;
199                         };
200
201                         mpl3115: mpl3115@60 {
202                                 compatible = "fsl,mpl3115";
203                                 reg = <0x60>;
204                         };
205                 };
206
207                 mux1_i2c3: i2c@2 {
208                         #address-cells = <1>;
209                         #size-cells = <0>;
210                         reg = <0x2>;
211                 };
212
213                 mux1_i2c4: i2c@3 {
214                         #address-cells = <1>;
215                         #size-cells = <0>;
216                         reg = <0x3>;
217
218                         sgtl5000: codec@a {
219                                 compatible = "fsl,sgtl5000";
220                                 reg = <0x0a>;
221                                 clocks = <&mclk>;
222                                 VDDA-supply = <&reg_1p8v>;
223                                 VDDIO-supply = <&reg_3p3v>;
224                         };
225                 };
226
227                 mux1_i2c5: i2c@4 {
228                         #address-cells = <1>;
229                         #size-cells = <0>;
230                         reg = <0x4>;
231
232                         pca9539: pca9539@74 {
233                                 compatible = "nxp,pca9539";
234                                 reg = <0x74>;
235                                 gpio-controller;
236                                 #gpio-cells = <2>;
237                                 interrupt-controller;
238                                 interrupt-parent = <&gpio2>;
239                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
240
241                                 P10 {
242                                         gpio-hog;
243                                         gpios = <8 0>;
244                                         output-low;
245                                         line-name = "PCA9539-P10";
246                                 };
247
248                                 P11 {
249                                         gpio-hog;
250                                         gpios = <9 0>;
251                                         output-low;
252                                         line-name = "PCA9539-P11";
253                                 };
254
255                                 P12 {
256                                         gpio-hog;
257                                         gpios = <10 0>;
258                                         output-low;
259                                         line-name = "PCA9539-P12";
260                                 };
261
262                                 P13 {
263                                         gpio-hog;
264                                         gpios = <11 0>;
265                                         output-low;
266                                         line-name = "PCA9539-P13";
267                                 };
268
269                                 P14 {
270                                         gpio-hog;
271                                         gpios = <12 0>;
272                                         output-low;
273                                         line-name = "PCA9539-P14";
274                                 };
275
276                                 P15 {
277                                         gpio-hog;
278                                         gpios = <13 0>;
279                                         output-low;
280                                         line-name = "PCA9539-P15";
281                                 };
282
283                                 P16 {
284                                         gpio-hog;
285                                         gpios = <14 0>;
286                                         output-low;
287                                         line-name = "PCA9539-P16";
288                                 };
289
290                                 P17 {
291                                         gpio-hog;
292                                         gpios = <15 0>;
293                                         output-low;
294                                         line-name = "PCA9539-P17";
295                                 };
296                         };
297                 };
298
299                 mux1_i2c6: i2c@5 {
300                         #address-cells = <1>;
301                         #size-cells = <0>;
302                         reg = <0x5>;
303                 };
304
305                 mux1_i2c7: i2c@6 {
306                         #address-cells = <1>;
307                         #size-cells = <0>;
308                         reg = <0x6>;
309                 };
310
311                 mux1_i2c8: i2c@7 {
312                         #address-cells = <1>;
313                         #size-cells = <0>;
314                         reg = <0x7>;
315                 };
316         };
317 };
318
319 &i2c2 {
320         pinctrl-names = "default", "gpio";
321         pinctrl-1 = <&pinctrl_i2c2_gpio>;
322         sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
323         scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
324 };
325
326 &i2c3 {
327         pinctrl-names = "default", "gpio";
328         pinctrl-1 = <&pinctrl_i2c3_gpio>;
329         sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
330         scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
331 };
332
333 &iomuxc {
334         pinctrl_i2c1_gpio: i2c1gpiogrp {
335                 fsl,pins = <
336                         MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x1b0b0
337                         MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27        0x1b0b0
338                 >;
339         };
340
341         pinctrl_i2c2_gpio: i2c2gpiogrp {
342                 fsl,pins = <
343                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
344                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
345                 >;
346         };
347
348         pinctrl_i2c3_gpio: i2c3gpiogrp {
349                 fsl,pins = <
350                         MX6QDL_PAD_GPIO_3__GPIO1_IO03   0x1b0b0
351                         MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0
352                 >;
353         };
354 };
355
356 &pmu {
357         secure-reg-access;
358 };
359
360 &usdhc2 {
361         status = "disabled";
362 };
363
364 &usdhc4 {
365         pinctrl-names = "default";
366         pinctrl-0 = <&pinctrl_usdhc4>;
367         bus-width = <4>;
368         vmmc-supply = <&reg_wl18xx_vmmc>;
369         no-1-8-v;
370         non-removable;
371         wakeup-source;
372         keep-power-in-suspend;
373         cap-power-off-card;
374         max-frequency = <25000000>;
375         #address-cells = <1>;
376         #size-cells = <0>;
377         status = "okay";
378
379         wlcore: wlcore@2 {
380                 compatible = "ti,wl1837";
381                 reg = <2>;
382                 interrupt-parent = <&gpio2>;
383                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
384                 tcxo-clock-frequency = <26000000>;
385         };
386 };
387
388 &pcie {
389         /* Synopsys, Inc. Device */
390         pci_root: root@0,0 {
391                 compatible = "pci16c3,abcd";
392                 reg = <0x00000000 0 0 0 0>;
393
394                 #address-cells = <3>;
395                 #size-cells = <2>;
396                 #interrupt-cells = <1>;
397         };
398 };