arch/arm/boot/dts/imx6dl-mamoj.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2018 BTicino
   4  * Copyright (C) 2018 Amarula Solutions B.V.
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "imx6dl.dtsi"
  10
  11 / {
  12         model = "BTicino i.MX6DL Mamoj board";
  13         compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
  14 };
  15
  16 &fec {
  17         pinctrl-names = "default";
  18         pinctrl-0 = <&pinctrl_enet>;
  19         phy-mode = "mii";
  20         status = "okay";
  21 };
  22
  23 &i2c3 {
  24         clock-frequency = <400000>;
  25         pinctrl-names = "default";
  26         pinctrl-0 = <&pinctrl_i2c3>;
  27         status = "okay";
  28 };
  29
  30 &i2c4 {
  31         clock-frequency = <100000>;
  32         pinctrl-names = "default";
  33         pinctrl-0 = <&pinctrl_i2c4>;
  34         status = "okay";
  35
  36         pfuze100: pmic@8 {
  37                 compatible = "fsl,pfuze100";
  38                 reg = <0x08>;
  39
  40                 regulators {
  41                         /* CPU vdd_arm core */
  42                         sw1a_reg: sw1ab {
  43                                 regulator-min-microvolt = <300000>;
  44                                 regulator-max-microvolt = <1875000>;
  45                                 regulator-boot-on;
  46                                 regulator-always-on;
  47                                 regulator-ramp-delay = <6250>;
  48                         };
  49
  50                         /* SOC vdd_soc */
  51                         sw1c_reg: sw1c {
  52                                 regulator-min-microvolt = <300000>;
  53                                 regulator-max-microvolt = <1875000>;
  54                                 regulator-boot-on;
  55                                 regulator-always-on;
  56                                 regulator-ramp-delay = <6250>;
  57                         };
  58
  59                         /* I/O power GEN_3V3 */
  60                         sw2_reg: sw2 {
  61                                 regulator-min-microvolt = <800000>;
  62                                 regulator-max-microvolt = <3300000>;
  63                                 regulator-boot-on;
  64                                 regulator-always-on;
  65                         };
  66
  67                         /* DDR memory */
  68                         sw3a_reg: sw3a {
  69                                 regulator-min-microvolt = <400000>;
  70                                 regulator-max-microvolt = <1975000>;
  71                                 regulator-boot-on;
  72                                 regulator-always-on;
  73                         };
  74
  75                         /* DDR memory */
  76                         sw3b_reg: sw3b {
  77                                 regulator-min-microvolt = <400000>;
  78                                 regulator-max-microvolt = <1975000>;
  79                                 regulator-boot-on;
  80                                 regulator-always-on;
  81                         };
  82
  83                         /* not used */
  84                         sw4_reg: sw4 {
  85                                 regulator-min-microvolt = <800000>;
  86                                 regulator-max-microvolt = <3300000>;
  87                         };
  88
  89                         /* not used */
  90                         swbst_reg: swbst {
  91                                 regulator-min-microvolt = <5000000>;
  92                                 regulator-max-microvolt = <5150000>;
  93                         };
  94
  95                         /* PMIC vsnvs. EX boot mode */
  96                         snvs_reg: vsnvs {
  97                                 regulator-min-microvolt = <1000000>;
  98                                 regulator-max-microvolt = <3000000>;
  99                                 regulator-boot-on;
 100                                 regulator-always-on;
 101                         };
 102
 103                         vref_reg: vrefddr {
 104                                 regulator-boot-on;
 105                                 regulator-always-on;
 106                         };
 107
 108                         /* not used */
 109                         vgen1_reg: vgen1 {
 110                                 regulator-min-microvolt = <800000>;
 111                                 regulator-max-microvolt = <1550000>;
 112                         };
 113
 114                         /* not used */
 115                         vgen2_reg: vgen2 {
 116                                 regulator-min-microvolt = <800000>;
 117                                 regulator-max-microvolt = <1550000>;
 118                         };
 119
 120                         /* not used */
 121                         vgen3_reg: vgen3 {
 122                                 regulator-min-microvolt = <1800000>;
 123                                 regulator-max-microvolt = <3300000>;
 124                         };
 125
 126                         /* 1v8 general power */
 127                         vgen4_reg: vgen4 {
 128                                 regulator-min-microvolt = <1800000>;
 129                                 regulator-max-microvolt = <3300000>;
 130                                 regulator-always-on;
 131                         };
 132
 133                         /* 2v8 general power IMX6 */
 134                         vgen5_reg: vgen5 {
 135                                 regulator-min-microvolt = <1800000>;
 136                                 regulator-max-microvolt = <3300000>;
 137                                 regulator-always-on;
 138                         };
 139
 140                         /* 3v3 Ethernet */
 141                         vgen6_reg: vgen6 {
 142                                 regulator-min-microvolt = <1800000>;
 143                                 regulator-max-microvolt = <3300000>;
 144                                 regulator-always-on;
 145                         };
 146                 };
 147         };
 148 };
 149
 150 &uart3 {
 151         pinctrl-names = "default";
 152         pinctrl-0 = <&pinctrl_uart3>;
 153         status = "okay";
 154 };
 155
 156 &usdhc3 {
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&pinctrl_usdhc3>;
 159         bus-width = <8>;
 160         non-removable;
 161         keep-power-in-suspend;
 162         status = "okay";
 163 };
 164
 165 &iomuxc {
 166         pinctrl_enet: enetgrp {
 167                 fsl,pins = <
 168                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 169                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 170                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b1
 171                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
 172                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
 173                         MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2      0x1b0b0
 174                         MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3      0x1b0b0
 175                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
 176                         MX6QDL_PAD_GPIO_19__ENET_TX_ER          0x1b0b0
 177                         MX6QDL_PAD_GPIO_18__ENET_RX_CLK         0x1b0b1
 178                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0
 179                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0
 180                         MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2      0x1b0b0
 181                         MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0
 182                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0
 183                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0
 184                         MX6QDL_PAD_KEY_COL3__ENET_CRS           0x1b0b0
 185                         MX6QDL_PAD_KEY_ROW1__ENET_COL           0x1b0b0
 186                 >;
 187         };
 188
 189         pinctrl_i2c3: i2c3grp {
 190                 fsl,pins = <
 191                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
 192                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
 193                 >;
 194         };
 195
 196         pinctrl_i2c4: i2c4grp {
 197                 fsl,pins = <
 198                         MX6QDL_PAD_GPIO_7__I2C4_SCL     0x4001b8b1
 199                         MX6QDL_PAD_GPIO_8__I2C4_SDA     0x4001b8b1
 200                 >;
 201         };
 202
 203         pinctrl_uart3: uart3grp {
 204                 fsl,pins = <
 205                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 206                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 207                 >;
 208         };
 209
 210         pinctrl_usdhc3: usdhc3grp {
 211                 fsl,pins = <
 212                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 213                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 214                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 215                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 216                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 217                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 218                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
 219                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
 220                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
 221                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
 222                 >;
 223         };
 224 };