arch/arm/boot/dts/imx53-tx53.dtsi

   1 /*
   2  * Copyright 2012-2017 <LW@KARO-electronics.de>
   3  * based on imx53-qsb.dts
   4  *   Copyright 2011 Freescale Semiconductor, Inc.
   5  *   Copyright 2011 Linaro Ltd.
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License
  14  *     version 2 as published by the Free Software Foundation.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include "imx53.dtsi"
  46 #include <dt-bindings/gpio/gpio.h>
  47
  48 / {
  49         model = "Ka-Ro electronics TX53 module";
  50         compatible = "karo,tx53", "fsl,imx53";
  51
  52         aliases {
  53                 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
  54                 can1 = &can1;
  55                 ipu = &ipu;
  56                 reg_can_xcvr = &reg_can_xcvr;
  57                 usbh1 = &usbh1;
  58                 usbotg = &usbotg;
  59         };
  60
  61         clocks {
  62                 ckih1 {
  63                         clock-frequency = <0>;
  64                 };
  65
  66                 mclk: clock@0 {
  67                         compatible = "fixed-clock";
  68                         reg = <0>;
  69                         #clock-cells = <0>;
  70                         clock-frequency = <26000000>;
  71                 };
  72         };
  73
  74         gpio-keys {
  75                 compatible = "gpio-keys";
  76                 pinctrl-names = "default";
  77                 pinctrl-0 = <&pinctrl_gpio_key>;
  78
  79                 power {
  80                         label = "Power Button";
  81                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  82                         linux,code = <116>; /* KEY_POWER */
  83                         wakeup-source;
  84                 };
  85         };
  86
  87         leds {
  88                 compatible = "gpio-leds";
  89                 pinctrl-names = "default";
  90                 pinctrl-0 = <&pinctrl_stk5led>;
  91
  92                 user {
  93                         label = "Heartbeat";
  94                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
  95                         linux,default-trigger = "heartbeat";
  96                 };
  97         };
  98
  99         reg_2v5: regulator-2v5 {
 100                 compatible = "regulator-fixed";
 101                 regulator-name = "2V5";
 102                 regulator-min-microvolt = <2500000>;
 103                 regulator-max-microvolt = <2500000>;
 104         };
 105
 106         reg_3v3: regulator-3v3 {
 107                 compatible = "regulator-fixed";
 108                 regulator-name = "3V3";
 109                 regulator-min-microvolt = <3300000>;
 110                 regulator-max-microvolt = <3300000>;
 111         };
 112
 113         reg_can_xcvr: regulator-can-xcvr {
 114                 compatible = "regulator-fixed";
 115                 regulator-name = "CAN XCVR";
 116                 regulator-min-microvolt = <3300000>;
 117                 regulator-max-microvolt = <3300000>;
 118                 pinctrl-names = "default";
 119                 pinctrl-0 = <&pinctrl_can_xcvr>;
 120                 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 121         };
 122
 123         reg_usbh1_vbus: regulator-usbh1-vbus {
 124                 compatible = "regulator-fixed";
 125                 regulator-name = "usbh1_vbus";
 126                 regulator-min-microvolt = <5000000>;
 127                 regulator-max-microvolt = <5000000>;
 128                 pinctrl-names = "default";
 129                 pinctrl-0 = <&pinctrl_usbh1_vbus>;
 130                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 131                 enable-active-high;
 132         };
 133
 134         reg_usbotg_vbus: regulator-usbotg-vbus {
 135                 compatible = "regulator-fixed";
 136                 regulator-name = "usbotg_vbus";
 137                 regulator-min-microvolt = <5000000>;
 138                 regulator-max-microvolt = <5000000>;
 139                 pinctrl-names = "default";
 140                 pinctrl-0 = <&pinctrl_usbotg_vbus>;
 141                 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 142                 enable-active-high;
 143         };
 144
 145         sound {
 146                 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
 147                 model = "tx53-audio-sgtl5000";
 148                 ssi-controller = <&ssi1>;
 149                 audio-codec = <&sgtl5000>;
 150                 audio-routing =
 151                         "MIC_IN", "Mic Jack",
 152                         "Mic Jack", "Mic Bias",
 153                         "Headphone Jack", "HP_OUT";
 154                 /* '1' based port numbers according to datasheet names */
 155                 mux-int-port = <1>;
 156                 mux-ext-port = <5>;
 157         };
 158 };
 159
 160 &audmux {
 161         pinctrl-names = "default";
 162         pinctrl-0 = <&pinctrl_ssi1>;
 163         status = "okay";
 164 };
 165
 166 &can1 {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_can1>;
 169         xceiver-supply = <&reg_can_xcvr>;
 170         status = "okay";
 171 };
 172
 173 &can2 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_can2>;
 176         xceiver-supply = <&reg_can_xcvr>;
 177         status = "okay";
 178 };
 179
 180 &ecspi1 {
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&pinctrl_ecspi1>;
 183         status = "okay";
 184
 185         cs-gpios = <
 186                 &gpio2 30 GPIO_ACTIVE_HIGH
 187                 &gpio3 19 GPIO_ACTIVE_HIGH
 188         >;
 189
 190         spidev0: spi@0 {
 191                 compatible = "spidev";
 192                 reg = <0>;
 193                 spi-max-frequency = <54000000>;
 194         };
 195
 196         spidev1: spi@1 {
 197                 compatible = "spidev";
 198                 reg = <1>;
 199                 spi-max-frequency = <54000000>;
 200         };
 201 };
 202
 203 &esdhc1 {
 204         cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
 205         fsl,wp-controller;
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&pinctrl_esdhc1>;
 208         status = "okay";
 209 };
 210
 211 &esdhc2 {
 212         cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
 213         fsl,wp-controller;
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&pinctrl_esdhc2>;
 216         status = "okay";
 217 };
 218
 219 &fec {
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&pinctrl_fec>;
 222         phy-mode = "rmii";
 223         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
 224         phy-handle = <&phy0>;
 225         mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
 226         status = "okay";
 227
 228         mdio {
 229                 #address-cells = <1>;
 230                 #size-cells = <0>;
 231
 232                 phy0: ethernet-phy@0 {
 233                         reg = <0>;
 234                         interrupt-parent = <&gpio2>;
 235                         interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
 236                         device_type = "ethernet-phy";
 237                 };
 238         };
 239 };
 240
 241 &i2c1 {
 242         pinctrl-names = "default", "gpio";
 243         pinctrl-0 = <&pinctrl_i2c1>;
 244         pinctrl-0 = <&pinctrl_i2c1_gpio>;
 245         scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
 246         sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
 247         clock-frequency = <400000>;
 248         status = "okay";
 249
 250         rtc1: ds1339@68 {
 251                 compatible = "dallas,ds1339";
 252                 reg = <0x68>;
 253                 pinctrl-names = "default";
 254                 pinctrl-0 = <&pinctrl_ds1339>;
 255                 interrupt-parent = <&gpio4>;
 256                 interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
 257                 trickle-resistor-ohms = <250>;
 258                 trickle-diode-disable;
 259         };
 260 };
 261
 262 &iomuxc {
 263         pinctrl-names = "default";
 264         pinctrl-0 = <&pinctrl_hog>;
 265
 266         imx53-tx53 {
 267                 pinctrl_hog: hoggrp {
 268                         /* pins not in use by any device on the Starterkit board series */
 269                         fsl,pins = <
 270                                 /* CMOS Sensor Interface */
 271                                 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
 272                                 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
 273                                 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
 274                                 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
 275                                 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
 276                                 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
 277                                 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
 278                                 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
 279                                 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
 280                                 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
 281                                 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
 282                                 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
 283                                 /* Module Specific Signal */
 284                                 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
 285                                 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
 286                                 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
 287                                 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
 288                                 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
 289                                 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
 290                                 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
 291                                 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
 292                                 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
 293                                 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
 294                                 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
 295                                 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
 296                                 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
 297                                 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
 298                                 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
 299                                 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
 300                                 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
 301                                 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
 302                                 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
 303                                 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
 304                                 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
 305                                 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
 306                                 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
 307                                 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
 308                                 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
 309                                 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
 310                                 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
 311                                 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
 312                                 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
 313                                 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
 314                                 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
 315                                 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
 316                                 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
 317                                 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
 318                                 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
 319                                 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
 320                                 >;
 321                 };
 322
 323                 pinctrl_can1: can1grp {
 324                         fsl,pins = <
 325                                 MX53_PAD_GPIO_7__CAN1_TXCAN             0x80000000
 326                                 MX53_PAD_GPIO_8__CAN1_RXCAN             0x80000000
 327                         >;
 328                 };
 329
 330                 pinctrl_can2: can2grp {
 331                         fsl,pins = <
 332                                 MX53_PAD_KEY_COL4__CAN2_TXCAN           0x80000000
 333                                 MX53_PAD_KEY_ROW4__CAN2_RXCAN           0x80000000
 334                         >;
 335                 };
 336
 337                 pinctrl_can_xcvr: can-xcvrgrp {
 338                         fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
 339                 };
 340
 341                 pinctrl_ds1339: ds1339grp {
 342                         fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
 343                 };
 344
 345                 pinctrl_ecspi1: ecspi1grp {
 346                         fsl,pins = <
 347                                 MX53_PAD_GPIO_19__ECSPI1_RDY            0x80000000
 348                                 MX53_PAD_EIM_EB2__ECSPI1_SS0            0x80000000
 349                                 MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
 350                                 MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
 351                                 MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
 352                                 MX53_PAD_EIM_D19__ECSPI1_SS1            0x80000000
 353                         >;
 354                 };
 355
 356                 pinctrl_esdhc1: esdhc1grp {
 357                         fsl,pins = <
 358                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 359                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 360                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 361                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 362                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 363                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 364                                 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
 365                         >;
 366                 };
 367
 368                 pinctrl_esdhc2: esdhc2grp {
 369                         fsl,pins = <
 370                                 MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
 371                                 MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
 372                                 MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
 373                                 MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
 374                                 MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
 375                                 MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
 376                                 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
 377                         >;
 378                 };
 379
 380                 pinctrl_fec: fecgrp {
 381                         fsl,pins = <
 382                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
 383                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
 384                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
 385                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
 386                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
 387                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
 388                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
 389                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 390                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
 391                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
 392                         >;
 393                 };
 394
 395                 pinctrl_gpio_key: gpio-keygrp {
 396                         fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
 397                 };
 398
 399                 pinctrl_i2c1: i2c1grp {
 400                         fsl,pins = <
 401                                 MX53_PAD_EIM_D21__I2C1_SCL              0x400001e4
 402                                 MX53_PAD_EIM_D28__I2C1_SDA              0x400001e4
 403                         >;
 404                 };
 405
 406                 pinctrl_i2c1_gpio: i2c1-gpiogrp {
 407                         fsl,pins = <
 408                                 MX53_PAD_EIM_D21__GPIO3_21              0x400001e6
 409                                 MX53_PAD_EIM_D28__GPIO3_28              0x400001e6
 410                         >;
 411                 };
 412
 413                 pinctrl_i2c3: i2c3grp {
 414                         fsl,pins = <
 415                                 MX53_PAD_GPIO_3__I2C3_SCL               0x400001e4
 416                                 MX53_PAD_GPIO_6__I2C3_SDA               0x400001e4
 417                         >;
 418                 };
 419
 420                 pinctrl_i2c3_gpio: i2c3-gpiogrp {
 421                         fsl,pins = <
 422                                 MX53_PAD_GPIO_3__GPIO1_3                0x400001e6
 423                                 MX53_PAD_GPIO_6__GPIO1_6                0x400001e6
 424                         >;
 425                 };
 426
 427                 pinctrl_nand: nandgrp {
 428                         fsl,pins = <
 429                                 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B     0x4
 430                                 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B     0x4
 431                                 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE       0x4
 432                                 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE       0x4
 433                                 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B     0xe0
 434                                 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0      0xe0
 435                                 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0      0x4
 436                                 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0    0xa4
 437                                 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1    0xa4
 438                                 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2    0xa4
 439                                 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3    0xa4
 440                                 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4    0xa4
 441                                 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5    0xa4
 442                                 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6    0xa4
 443                                 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7    0xa4
 444                         >;
 445                 };
 446
 447                 pinctrl_pwm2: pwm2grp {
 448                         fsl,pins = <
 449                                 MX53_PAD_GPIO_1__PWM2_PWMO              0x80000000
 450                         >;
 451                 };
 452
 453                 pinctrl_ssi1: ssi1grp {
 454                         fsl,pins = <
 455                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 456                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 457                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 458                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 459                         >;
 460                 };
 461
 462                 pinctrl_ssi2: ssi2grp {
 463                         fsl,pins = <
 464                                 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC     0x80000000
 465                                 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD     0x80000000
 466                                 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS    0x80000000
 467                                 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD     0x80000000
 468                                 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
 469                         >;
 470                 };
 471
 472                 pinctrl_stk5led: stk5ledgrp {
 473                         fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
 474                 };
 475
 476                 pinctrl_uart1: uart1grp {
 477                         fsl,pins = <
 478                                 MX53_PAD_PATA_DIOW__UART1_TXD_MUX       0x1e4
 479                                 MX53_PAD_PATA_DMACK__UART1_RXD_MUX      0x1e4
 480                                 MX53_PAD_PATA_RESET_B__UART1_CTS        0x1c5
 481                                 MX53_PAD_PATA_IORDY__UART1_RTS          0x1c5
 482                         >;
 483                 };
 484
 485                 pinctrl_uart2: uart2grp {
 486                         fsl,pins = <
 487                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1c5
 488                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1c5
 489                                 MX53_PAD_PATA_DIOR__UART2_RTS           0x1c5
 490                                 MX53_PAD_PATA_INTRQ__UART2_CTS          0x1c5
 491                         >;
 492                 };
 493
 494                 pinctrl_uart3: uart3grp {
 495                         fsl,pins = <
 496                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
 497                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
 498                                 MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
 499                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
 500                         >;
 501                 };
 502
 503                 pinctrl_usbh1: usbh1grp {
 504                         fsl,pins = <
 505                                 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
 506                         >;
 507                 };
 508
 509                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
 510                         fsl,pins = <
 511                                 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
 512                         >;
 513                 };
 514
 515                 pinctrl_usbotg_vbus: usbotg-vbusgrp {
 516                         fsl,pins = <
 517                                 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
 518                                 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
 519                         >;
 520                 };
 521         };
 522 };
 523
 524 &ipu {
 525         status = "okay";
 526 };
 527
 528 &nfc {
 529         pinctrl-names = "default";
 530         pinctrl-0 = <&pinctrl_nand>;
 531         nand-bus-width = <8>;
 532         nand-ecc-mode = "hw";
 533         nand-on-flash-bbt;
 534         status = "okay";
 535 };
 536
 537 &pwm2 {
 538         pinctrl-names = "default";
 539         pinctrl-0 = <&pinctrl_pwm2>;
 540         #pwm-cells = <3>;
 541 };
 542
 543 &sdma {
 544         fsl,sdma-ram-script-name = "sdma-imx53.bin";
 545 };
 546
 547 &ssi1 {
 548         codec-handle = <&sgtl5000>;
 549         status = "okay";
 550 };
 551
 552 &ssi2 {
 553         status = "disabled";
 554 };
 555
 556 &uart1 {
 557         pinctrl-names = "default";
 558         pinctrl-0 = <&pinctrl_uart1>;
 559         uart-has-rtscts;
 560         status = "okay";
 561 };
 562
 563 &uart2 {
 564         pinctrl-names = "default";
 565         pinctrl-0 = <&pinctrl_uart2>;
 566         uart-has-rtscts;
 567         status = "okay";
 568 };
 569
 570 &uart3 {
 571         pinctrl-names = "default";
 572         pinctrl-0 = <&pinctrl_uart3>;
 573         uart-has-rtscts;
 574         status = "okay";
 575 };
 576
 577 &usbh1 {
 578         pinctrl-names = "default";
 579         pinctrl-0 = <&pinctrl_usbh1>;
 580         phy_type = "utmi";
 581         disable-over-current;
 582         vbus-supply = <&reg_usbh1_vbus>;
 583         status = "okay";
 584 };
 585
 586 &usbotg {
 587         phy_type = "utmi";
 588         dr_mode = "peripheral";
 589         disable-over-current;
 590         vbus-supply = <&reg_usbotg_vbus>;
 591         status = "okay";
 592 };