arch/arm/boot/dts/imx53-qsb-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright 2011 Freescale Semiconductor, Inc.
   4 // Copyright 2011 Linaro Ltd.
   5
   6 #include "imx53.dtsi"
   7
   8 / {
   9         chosen {
  10                 stdout-path = &uart1;
  11         };
  12
  13         memory@70000000 {
  14                 reg = <0x70000000 0x20000000>,
  15                       <0xb0000000 0x20000000>;
  16         };
  17
  18         display0: disp0 {
  19                 compatible = "fsl,imx-parallel-display";
  20                 interface-pix-fmt = "rgb565";
  21                 pinctrl-names = "default";
  22                 pinctrl-0 = <&pinctrl_ipu_disp0>;
  23                 status = "disabled";
  24                 display-timings {
  25                         claawvga {
  26                                 native-mode;
  27                                 clock-frequency = <27000000>;
  28                                 hactive = <800>;
  29                                 vactive = <480>;
  30                                 hback-porch = <40>;
  31                                 hfront-porch = <60>;
  32                                 vback-porch = <10>;
  33                                 vfront-porch = <10>;
  34                                 hsync-len = <20>;
  35                                 vsync-len = <10>;
  36                                 hsync-active = <0>;
  37                                 vsync-active = <0>;
  38                                 de-active = <1>;
  39                                 pixelclk-active = <0>;
  40                         };
  41                 };
  42
  43                 port {
  44                         display0_in: endpoint {
  45                                 remote-endpoint = <&ipu_di0_disp0>;
  46                         };
  47                 };
  48         };
  49
  50         gpio-keys {
  51                 compatible = "gpio-keys";
  52
  53                 power {
  54                         label = "Power Button";
  55                         gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
  56                         linux,code = <KEY_POWER>;
  57                 };
  58
  59                 volume-up {
  60                         label = "Volume Up";
  61                         gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
  62                         linux,code = <KEY_VOLUMEUP>;
  63                         wakeup-source;
  64                 };
  65
  66                 volume-down {
  67                         label = "Volume Down";
  68                         gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
  69                         linux,code = <KEY_VOLUMEDOWN>;
  70                         wakeup-source;
  71                 };
  72         };
  73
  74         leds {
  75                 compatible = "gpio-leds";
  76                 pinctrl-names = "default";
  77                 pinctrl-0 = <&led_pin_gpio7_7>;
  78
  79                 user {
  80                         label = "Heartbeat";
  81                         gpios = <&gpio7 7 0>;
  82                         linux,default-trigger = "heartbeat";
  83                 };
  84         };
  85
  86         regulators {
  87                 compatible = "simple-bus";
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90
  91                 reg_3p2v: regulator@0 {
  92                         compatible = "regulator-fixed";
  93                         reg = <0>;
  94                         regulator-name = "3P2V";
  95                         regulator-min-microvolt = <3200000>;
  96                         regulator-max-microvolt = <3200000>;
  97                         regulator-always-on;
  98                 };
  99
 100                 reg_usb_vbus: regulator@1 {
 101                         compatible = "regulator-fixed";
 102                         reg = <1>;
 103                         regulator-name = "usb_vbus";
 104                         regulator-min-microvolt = <5000000>;
 105                         regulator-max-microvolt = <5000000>;
 106                         gpio = <&gpio7 8 0>;
 107                         enable-active-high;
 108                 };
 109         };
 110
 111         sound {
 112                 compatible = "fsl,imx53-qsb-sgtl5000",
 113                              "fsl,imx-audio-sgtl5000";
 114                 model = "imx53-qsb-sgtl5000";
 115                 ssi-controller = <&ssi2>;
 116                 audio-codec = <&sgtl5000>;
 117                 audio-routing =
 118                         "MIC_IN", "Mic Jack",
 119                         "Mic Jack", "Mic Bias",
 120                         "Headphone Jack", "HP_OUT";
 121                 mux-int-port = <2>;
 122                 mux-ext-port = <5>;
 123         };
 124 };
 125
 126 &esdhc1 {
 127         pinctrl-names = "default";
 128         pinctrl-0 = <&pinctrl_esdhc1>;
 129         status = "okay";
 130 };
 131
 132 &ipu_di0_disp0 {
 133         remote-endpoint = <&display0_in>;
 134 };
 135
 136 &ssi2 {
 137         status = "okay";
 138 };
 139
 140 &esdhc3 {
 141         pinctrl-names = "default";
 142         pinctrl-0 = <&pinctrl_esdhc3>;
 143         cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
 144         wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
 145         bus-width = <8>;
 146         status = "okay";
 147 };
 148
 149 &iomuxc {
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&pinctrl_hog>;
 152
 153         imx53-qsb {
 154                 pinctrl_hog: hoggrp {
 155                         fsl,pins = <
 156                                 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
 157                                 MX53_PAD_GPIO_8__GPIO1_8          0x80000000
 158                                 MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000
 159                                 MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000
 160                                 MX53_PAD_EIM_DA11__GPIO3_11       0x80000000
 161                                 MX53_PAD_EIM_DA12__GPIO3_12       0x80000000
 162                                 MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000
 163                                 MX53_PAD_PATA_DA_2__GPIO7_8       0x80000000
 164                                 MX53_PAD_GPIO_16__GPIO7_11        0x80000000
 165                         >;
 166                 };
 167
 168                 led_pin_gpio7_7: led_gpio7_7 {
 169                         fsl,pins = <
 170                                 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
 171                         >;
 172                 };
 173
 174                 pinctrl_audmux: audmuxgrp {
 175                         fsl,pins = <
 176                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 177                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 178                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 179                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 180                         >;
 181                 };
 182
 183                 pinctrl_esdhc1: esdhc1grp {
 184                         fsl,pins = <
 185                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 186                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 187                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 188                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 189                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 190                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 191                         >;
 192                 };
 193
 194                 pinctrl_esdhc3: esdhc3grp {
 195                         fsl,pins = <
 196                                 MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d5
 197                                 MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d5
 198                                 MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d5
 199                                 MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d5
 200                                 MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d5
 201                                 MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d5
 202                                 MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d5
 203                                 MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d5
 204                                 MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1d5
 205                                 MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d5
 206                         >;
 207                 };
 208
 209                 pinctrl_fec: fecgrp {
 210                         fsl,pins = <
 211                                 MX53_PAD_FEC_MDC__FEC_MDC               0x4
 212                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x1fc
 213                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x180
 214                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x180
 215                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x180
 216                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x180
 217                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x180
 218                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x4
 219                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x4
 220                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x4
 221                         >;
 222                 };
 223
 224                 /* open drain */
 225                 pinctrl_i2c1: i2c1grp {
 226                         fsl,pins = <
 227                                 MX53_PAD_CSI0_DAT8__I2C1_SDA            0x400001ec
 228                                 MX53_PAD_CSI0_DAT9__I2C1_SCL            0x400001ec
 229                         >;
 230                 };
 231
 232                 pinctrl_i2c2: i2c2grp {
 233                         fsl,pins = <
 234                                 MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000
 235                                 MX53_PAD_KEY_COL3__I2C2_SCL             0xc0000000
 236                         >;
 237                 };
 238
 239                 pinctrl_ipu_disp0: ipudisp0grp {
 240                         fsl,pins = <
 241                                 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
 242                                 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15       0x5
 243                                 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2         0x5
 244                                 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3         0x5
 245                                 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0    0x5
 246                                 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1    0x5
 247                                 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2    0x5
 248                                 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3    0x5
 249                                 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4    0x5
 250                                 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5    0x5
 251                                 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6    0x5
 252                                 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7    0x5
 253                                 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8    0x5
 254                                 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9    0x5
 255                                 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10  0x5
 256                                 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11  0x5
 257                                 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12  0x5
 258                                 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13  0x5
 259                                 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14  0x5
 260                                 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15  0x5
 261                                 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16  0x5
 262                                 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17  0x5
 263                                 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18  0x5
 264                                 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19  0x5
 265                                 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20  0x5
 266                                 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21  0x5
 267                                 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22  0x5
 268                                 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23  0x5
 269                         >;
 270                 };
 271
 272                 pinctrl_vga_sync: vgasync-grp {
 273                         fsl,pins = <
 274                                 /* VGA_HSYNC, VSYNC with max drive strength */
 275                                 MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
 276                                 MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
 277                         >;
 278                 };
 279
 280                 pinctrl_uart1: uart1grp {
 281                         fsl,pins = <
 282                                 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
 283                                 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX      0x1e4
 284                         >;
 285                 };
 286         };
 287 };
 288
 289 &tve {
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&pinctrl_vga_sync>;
 292         ddc-i2c-bus = <&i2c2>;
 293         fsl,tve-mode = "vga";
 294         fsl,hsync-pin = <7>;    /* IPU DI1 PIN7 via EIM_OE */
 295         fsl,vsync-pin = <8>;    /* IPU DI1 PIN8 via EIM_RW */
 296         status = "okay";
 297 };
 298
 299 &uart1 {
 300         pinctrl-names = "default";
 301         pinctrl-0 = <&pinctrl_uart1>;
 302         status = "okay";
 303 };
 304
 305 &i2c2 {
 306         pinctrl-names = "default";
 307         pinctrl-0 = <&pinctrl_i2c2>;
 308         status = "okay";
 309
 310         sgtl5000: codec@a {
 311                 compatible = "fsl,sgtl5000";
 312                 reg = <0x0a>;
 313                 #sound-dai-cells = <0>;
 314                 VDDA-supply = <&reg_3p2v>;
 315                 VDDIO-supply = <&reg_3p2v>;
 316                 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
 317         };
 318 };
 319
 320 &i2c1 {
 321         pinctrl-names = "default";
 322         pinctrl-0 = <&pinctrl_i2c1>;
 323         status = "okay";
 324
 325         accelerometer: mma8450@1c {
 326                 compatible = "fsl,mma8450";
 327                 reg = <0x1c>;
 328         };
 329 };
 330
 331 &audmux {
 332         pinctrl-names = "default";
 333         pinctrl-0 = <&pinctrl_audmux>;
 334         status = "okay";
 335 };
 336
 337 &fec {
 338         pinctrl-names = "default";
 339         pinctrl-0 = <&pinctrl_fec>;
 340         phy-mode = "rmii";
 341         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
 342         status = "okay";
 343 };
 344
 345 &sata {
 346         status = "okay";
 347 };
 348
 349 &vpu {
 350         status = "okay";
 351 };
 352
 353 &usbh1 {
 354         vbus-supply = <&reg_usb_vbus>;
 355         phy_type = "utmi";
 356         status = "okay";
 357 };
 358
 359 &usbotg {
 360         dr_mode = "peripheral";
 361         status = "okay";
 362 };