arch/arm/boot/dts/imx51.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright 2011 Freescale Semiconductor, Inc.
   4 // Copyright 2011 Linaro Ltd.
   5
   6 #include "imx51-pinfunc.h"
   7 #include <dt-bindings/clock/imx5-clock.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15         /*
  16          * The decompressor and also some bootloaders rely on a
  17          * pre-existing /chosen node to be available to insert the
  18          * command line and merge other ATAGS info.
  19          * Also for U-Boot there must be a pre-existing /memory node.
  20          */
  21         chosen {};
  22         memory { device_type = "memory"; };
  23
  24         aliases {
  25                 ethernet0 = &fec;
  26                 gpio0 = &gpio1;
  27                 gpio1 = &gpio2;
  28                 gpio2 = &gpio3;
  29                 gpio3 = &gpio4;
  30                 i2c0 = &i2c1;
  31                 i2c1 = &i2c2;
  32                 mmc0 = &esdhc1;
  33                 mmc1 = &esdhc2;
  34                 mmc2 = &esdhc3;
  35                 mmc3 = &esdhc4;
  36                 serial0 = &uart1;
  37                 serial1 = &uart2;
  38                 serial2 = &uart3;
  39                 spi0 = &ecspi1;
  40                 spi1 = &ecspi2;
  41                 spi2 = &cspi;
  42         };
  43
  44         tzic: tz-interrupt-controller@e0000000 {
  45                 compatible = "fsl,imx51-tzic", "fsl,tzic";
  46                 interrupt-controller;
  47                 #interrupt-cells = <1>;
  48                 reg = <0xe0000000 0x4000>;
  49         };
  50
  51         clocks {
  52                 ckil {
  53                         compatible = "fsl,imx-ckil", "fixed-clock";
  54                         #clock-cells = <0>;
  55                         clock-frequency = <32768>;
  56                 };
  57
  58                 ckih1 {
  59                         compatible = "fsl,imx-ckih1", "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <0>;
  62                 };
  63
  64                 ckih2 {
  65                         compatible = "fsl,imx-ckih2", "fixed-clock";
  66                         #clock-cells = <0>;
  67                         clock-frequency = <0>;
  68                 };
  69
  70                 osc {
  71                         compatible = "fsl,imx-osc", "fixed-clock";
  72                         #clock-cells = <0>;
  73                         clock-frequency = <24000000>;
  74                 };
  75         };
  76
  77         cpus {
  78                 #address-cells = <1>;
  79                 #size-cells = <0>;
  80                 cpu: cpu@0 {
  81                         device_type = "cpu";
  82                         compatible = "arm,cortex-a8";
  83                         reg = <0>;
  84                         clock-latency = <62500>;
  85                         clocks = <&clks IMX5_CLK_CPU_PODF>;
  86                         clock-names = "cpu";
  87                         operating-points = <
  88                                 166000  1000000
  89                                 600000  1050000
  90                                 800000  1100000
  91                         >;
  92                         voltage-tolerance = <5>;
  93                 };
  94         };
  95
  96         usbphy {
  97                 #address-cells = <1>;
  98                 #size-cells = <0>;
  99                 compatible = "simple-bus";
 100
 101                 usbphy0: usbphy@0 {
 102                         compatible = "usb-nop-xceiv";
 103                         reg = <0>;
 104                         clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 105                         clock-names = "main_clk";
 106                         #phy-cells = <0>;
 107                 };
 108         };
 109
 110         display-subsystem {
 111                 compatible = "fsl,imx-display-subsystem";
 112                 ports = <&ipu_di0>, <&ipu_di1>;
 113         };
 114
 115         soc {
 116                 #address-cells = <1>;
 117                 #size-cells = <1>;
 118                 compatible = "simple-bus";
 119                 interrupt-parent = <&tzic>;
 120                 ranges;
 121
 122                 iram: iram@1ffe0000 {
 123                         compatible = "mmio-sram";
 124                         reg = <0x1ffe0000 0x20000>;
 125                 };
 126
 127                 ipu: ipu@40000000 {
 128                         #address-cells = <1>;
 129                         #size-cells = <0>;
 130                         compatible = "fsl,imx51-ipu";
 131                         reg = <0x40000000 0x20000000>;
 132                         interrupts = <11 10>;
 133                         clocks = <&clks IMX5_CLK_IPU_GATE>,
 134                                  <&clks IMX5_CLK_IPU_DI0_GATE>,
 135                                  <&clks IMX5_CLK_IPU_DI1_GATE>;
 136                         clock-names = "bus", "di0", "di1";
 137                         resets = <&src 2>;
 138
 139                         ipu_di0: port@2 {
 140                                 reg = <2>;
 141
 142                                 ipu_di0_disp1: endpoint {
 143                                 };
 144                         };
 145
 146                         ipu_di1: port@3 {
 147                                 reg = <3>;
 148
 149                                 ipu_di1_disp2: endpoint {
 150                                 };
 151                         };
 152                 };
 153
 154                 aips@70000000 { /* AIPS1 */
 155                         compatible = "fsl,aips-bus", "simple-bus";
 156                         #address-cells = <1>;
 157                         #size-cells = <1>;
 158                         reg = <0x70000000 0x10000000>;
 159                         ranges;
 160
 161                         spba@70000000 {
 162                                 compatible = "fsl,spba-bus", "simple-bus";
 163                                 #address-cells = <1>;
 164                                 #size-cells = <1>;
 165                                 reg = <0x70000000 0x40000>;
 166                                 ranges;
 167
 168                                 esdhc1: esdhc@70004000 {
 169                                         compatible = "fsl,imx51-esdhc";
 170                                         reg = <0x70004000 0x4000>;
 171                                         interrupts = <1>;
 172                                         clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
 173                                                  <&clks IMX5_CLK_DUMMY>,
 174                                                  <&clks IMX5_CLK_ESDHC1_PER_GATE>;
 175                                         clock-names = "ipg", "ahb", "per";
 176                                         status = "disabled";
 177                                 };
 178
 179                                 esdhc2: esdhc@70008000 {
 180                                         compatible = "fsl,imx51-esdhc";
 181                                         reg = <0x70008000 0x4000>;
 182                                         interrupts = <2>;
 183                                         clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
 184                                                  <&clks IMX5_CLK_DUMMY>,
 185                                                  <&clks IMX5_CLK_ESDHC2_PER_GATE>;
 186                                         clock-names = "ipg", "ahb", "per";
 187                                         bus-width = <4>;
 188                                         status = "disabled";
 189                                 };
 190
 191                                 uart3: serial@7000c000 {
 192                                         compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 193                                         reg = <0x7000c000 0x4000>;
 194                                         interrupts = <33>;
 195                                         clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
 196                                                  <&clks IMX5_CLK_UART3_PER_GATE>;
 197                                         clock-names = "ipg", "per";
 198                                         status = "disabled";
 199                                 };
 200
 201                                 ecspi1: ecspi@70010000 {
 202                                         #address-cells = <1>;
 203                                         #size-cells = <0>;
 204                                         compatible = "fsl,imx51-ecspi";
 205                                         reg = <0x70010000 0x4000>;
 206                                         interrupts = <36>;
 207                                         clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
 208                                                  <&clks IMX5_CLK_ECSPI1_PER_GATE>;
 209                                         clock-names = "ipg", "per";
 210                                         status = "disabled";
 211                                 };
 212
 213                                 ssi2: ssi@70014000 {
 214                                         #sound-dai-cells = <0>;
 215                                         compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 216                                         reg = <0x70014000 0x4000>;
 217                                         interrupts = <30>;
 218                                         clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>,
 219                                                  <&clks IMX5_CLK_SSI2_ROOT_GATE>;
 220                                         clock-names = "ipg", "baud";
 221                                         dmas = <&sdma 24 1 0>,
 222                                                <&sdma 25 1 0>;
 223                                         dma-names = "rx", "tx";
 224                                         fsl,fifo-depth = <15>;
 225                                         status = "disabled";
 226                                 };
 227
 228                                 esdhc3: esdhc@70020000 {
 229                                         compatible = "fsl,imx51-esdhc";
 230                                         reg = <0x70020000 0x4000>;
 231                                         interrupts = <3>;
 232                                         clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
 233                                                  <&clks IMX5_CLK_DUMMY>,
 234                                                  <&clks IMX5_CLK_ESDHC3_PER_GATE>;
 235                                         clock-names = "ipg", "ahb", "per";
 236                                         bus-width = <4>;
 237                                         status = "disabled";
 238                                 };
 239
 240                                 esdhc4: esdhc@70024000 {
 241                                         compatible = "fsl,imx51-esdhc";
 242                                         reg = <0x70024000 0x4000>;
 243                                         interrupts = <4>;
 244                                         clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
 245                                                  <&clks IMX5_CLK_DUMMY>,
 246                                                  <&clks IMX5_CLK_ESDHC4_PER_GATE>;
 247                                         clock-names = "ipg", "ahb", "per";
 248                                         bus-width = <4>;
 249                                         status = "disabled";
 250                                 };
 251                         };
 252
 253                         usbotg: usb@73f80000 {
 254                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 255                                 reg = <0x73f80000 0x0200>;
 256                                 interrupts = <18>;
 257                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 258                                 fsl,usbmisc = <&usbmisc 0>;
 259                                 fsl,usbphy = <&usbphy0>;
 260                                 status = "disabled";
 261                         };
 262
 263                         usbh1: usb@73f80200 {
 264                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 265                                 reg = <0x73f80200 0x0200>;
 266                                 interrupts = <14>;
 267                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 268                                 fsl,usbmisc = <&usbmisc 1>;
 269                                 dr_mode = "host";
 270                                 status = "disabled";
 271                         };
 272
 273                         usbh2: usb@73f80400 {
 274                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 275                                 reg = <0x73f80400 0x0200>;
 276                                 interrupts = <16>;
 277                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 278                                 fsl,usbmisc = <&usbmisc 2>;
 279                                 dr_mode = "host";
 280                                 status = "disabled";
 281                         };
 282
 283                         usbh3: usb@73f80600 {
 284                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 285                                 reg = <0x73f80600 0x0200>;
 286                                 interrupts = <17>;
 287                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 288                                 fsl,usbmisc = <&usbmisc 3>;
 289                                 dr_mode = "host";
 290                                 status = "disabled";
 291                         };
 292
 293                         usbmisc: usbmisc@73f80800 {
 294                                 #index-cells = <1>;
 295                                 compatible = "fsl,imx51-usbmisc";
 296                                 reg = <0x73f80800 0x200>;
 297                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 298                         };
 299
 300                         gpio1: gpio@73f84000 {
 301                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 302                                 reg = <0x73f84000 0x4000>;
 303                                 interrupts = <50 51>;
 304                                 gpio-controller;
 305                                 #gpio-cells = <2>;
 306                                 interrupt-controller;
 307                                 #interrupt-cells = <2>;
 308                         };
 309
 310                         gpio2: gpio@73f88000 {
 311                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 312                                 reg = <0x73f88000 0x4000>;
 313                                 interrupts = <52 53>;
 314                                 gpio-controller;
 315                                 #gpio-cells = <2>;
 316                                 interrupt-controller;
 317                                 #interrupt-cells = <2>;
 318                         };
 319
 320                         gpio3: gpio@73f8c000 {
 321                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 322                                 reg = <0x73f8c000 0x4000>;
 323                                 interrupts = <54 55>;
 324                                 gpio-controller;
 325                                 #gpio-cells = <2>;
 326                                 interrupt-controller;
 327                                 #interrupt-cells = <2>;
 328                         };
 329
 330                         gpio4: gpio@73f90000 {
 331                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 332                                 reg = <0x73f90000 0x4000>;
 333                                 interrupts = <56 57>;
 334                                 gpio-controller;
 335                                 #gpio-cells = <2>;
 336                                 interrupt-controller;
 337                                 #interrupt-cells = <2>;
 338                         };
 339
 340                         kpp: kpp@73f94000 {
 341                                 compatible = "fsl,imx51-kpp", "fsl,imx21-kpp";
 342                                 reg = <0x73f94000 0x4000>;
 343                                 interrupts = <60>;
 344                                 clocks = <&clks IMX5_CLK_DUMMY>;
 345                                 status = "disabled";
 346                         };
 347
 348                         wdog1: wdog@73f98000 {
 349                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
 350                                 reg = <0x73f98000 0x4000>;
 351                                 interrupts = <58>;
 352                                 clocks = <&clks IMX5_CLK_DUMMY>;
 353                         };
 354
 355                         wdog2: wdog@73f9c000 {
 356                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
 357                                 reg = <0x73f9c000 0x4000>;
 358                                 interrupts = <59>;
 359                                 clocks = <&clks IMX5_CLK_DUMMY>;
 360                                 status = "disabled";
 361                         };
 362
 363                         gpt: timer@73fa0000 {
 364                                 compatible = "fsl,imx51-gpt", "fsl,imx31-gpt";
 365                                 reg = <0x73fa0000 0x4000>;
 366                                 interrupts = <39>;
 367                                 clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
 368                                          <&clks IMX5_CLK_GPT_HF_GATE>;
 369                                 clock-names = "ipg", "per";
 370                         };
 371
 372                         iomuxc: iomuxc@73fa8000 {
 373                                 compatible = "fsl,imx51-iomuxc";
 374                                 reg = <0x73fa8000 0x4000>;
 375                         };
 376
 377                         pwm1: pwm@73fb4000 {
 378                                 #pwm-cells = <2>;
 379                                 compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 380                                 reg = <0x73fb4000 0x4000>;
 381                                 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
 382                                          <&clks IMX5_CLK_PWM1_HF_GATE>;
 383                                 clock-names = "ipg", "per";
 384                                 interrupts = <61>;
 385                         };
 386
 387                         pwm2: pwm@73fb8000 {
 388                                 #pwm-cells = <2>;
 389                                 compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 390                                 reg = <0x73fb8000 0x4000>;
 391                                 clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
 392                                          <&clks IMX5_CLK_PWM2_HF_GATE>;
 393                                 clock-names = "ipg", "per";
 394                                 interrupts = <94>;
 395                         };
 396
 397                         uart1: serial@73fbc000 {
 398                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 399                                 reg = <0x73fbc000 0x4000>;
 400                                 interrupts = <31>;
 401                                 clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
 402                                          <&clks IMX5_CLK_UART1_PER_GATE>;
 403                                 clock-names = "ipg", "per";
 404                                 status = "disabled";
 405                         };
 406
 407                         uart2: serial@73fc0000 {
 408                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 409                                 reg = <0x73fc0000 0x4000>;
 410                                 interrupts = <32>;
 411                                 clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
 412                                          <&clks IMX5_CLK_UART2_PER_GATE>;
 413                                 clock-names = "ipg", "per";
 414                                 status = "disabled";
 415                         };
 416
 417                         src: src@73fd0000 {
 418                                 compatible = "fsl,imx51-src";
 419                                 reg = <0x73fd0000 0x4000>;
 420                                 #reset-cells = <1>;
 421                         };
 422
 423                         clks: ccm@73fd4000{
 424                                 compatible = "fsl,imx51-ccm";
 425                                 reg = <0x73fd4000 0x4000>;
 426                                 interrupts = <0 71 0x04 0 72 0x04>;
 427                                 #clock-cells = <1>;
 428                         };
 429                 };
 430
 431                 aips@80000000 { /* AIPS2 */
 432                         compatible = "fsl,aips-bus", "simple-bus";
 433                         #address-cells = <1>;
 434                         #size-cells = <1>;
 435                         reg = <0x80000000 0x10000000>;
 436                         ranges;
 437
 438                         iim: iim@83f98000 {
 439                                 compatible = "fsl,imx51-iim", "fsl,imx27-iim";
 440                                 reg = <0x83f98000 0x4000>;
 441                                 interrupts = <69>;
 442                                 clocks = <&clks IMX5_CLK_IIM_GATE>;
 443                         };
 444
 445                         owire: owire@83fa4000 {
 446                                 compatible = "fsl,imx51-owire", "fsl,imx21-owire";
 447                                 reg = <0x83fa4000 0x4000>;
 448                                 interrupts = <88>;
 449                                 clocks = <&clks IMX5_CLK_OWIRE_GATE>;
 450                                 status = "disabled";
 451                         };
 452
 453                         ecspi2: ecspi@83fac000 {
 454                                 #address-cells = <1>;
 455                                 #size-cells = <0>;
 456                                 compatible = "fsl,imx51-ecspi";
 457                                 reg = <0x83fac000 0x4000>;
 458                                 interrupts = <37>;
 459                                 clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
 460                                          <&clks IMX5_CLK_ECSPI2_PER_GATE>;
 461                                 clock-names = "ipg", "per";
 462                                 status = "disabled";
 463                         };
 464
 465                         sdma: sdma@83fb0000 {
 466                                 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
 467                                 reg = <0x83fb0000 0x4000>;
 468                                 interrupts = <6>;
 469                                 clocks = <&clks IMX5_CLK_SDMA_GATE>,
 470                                          <&clks IMX5_CLK_SDMA_GATE>;
 471                                 clock-names = "ipg", "ahb";
 472                                 #dma-cells = <3>;
 473                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
 474                         };
 475
 476                         cspi: cspi@83fc0000 {
 477                                 #address-cells = <1>;
 478                                 #size-cells = <0>;
 479                                 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
 480                                 reg = <0x83fc0000 0x4000>;
 481                                 interrupts = <38>;
 482                                 clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
 483                                          <&clks IMX5_CLK_CSPI_IPG_GATE>;
 484                                 clock-names = "ipg", "per";
 485                                 status = "disabled";
 486                         };
 487
 488                         i2c2: i2c@83fc4000 {
 489                                 #address-cells = <1>;
 490                                 #size-cells = <0>;
 491                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
 492                                 reg = <0x83fc4000 0x4000>;
 493                                 interrupts = <63>;
 494                                 clocks = <&clks IMX5_CLK_I2C2_GATE>;
 495                                 status = "disabled";
 496                         };
 497
 498                         i2c1: i2c@83fc8000 {
 499                                 #address-cells = <1>;
 500                                 #size-cells = <0>;
 501                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
 502                                 reg = <0x83fc8000 0x4000>;
 503                                 interrupts = <62>;
 504                                 clocks = <&clks IMX5_CLK_I2C1_GATE>;
 505                                 status = "disabled";
 506                         };
 507
 508                         ssi1: ssi@83fcc000 {
 509                                 #sound-dai-cells = <0>;
 510                                 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 511                                 reg = <0x83fcc000 0x4000>;
 512                                 interrupts = <29>;
 513                                 clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>,
 514                                          <&clks IMX5_CLK_SSI1_ROOT_GATE>;
 515                                 clock-names = "ipg", "baud";
 516                                 dmas = <&sdma 28 0 0>,
 517                                        <&sdma 29 0 0>;
 518                                 dma-names = "rx", "tx";
 519                                 fsl,fifo-depth = <15>;
 520                                 status = "disabled";
 521                         };
 522
 523                         audmux: audmux@83fd0000 {
 524                                 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
 525                                 reg = <0x83fd0000 0x4000>;
 526                                 clocks = <&clks IMX5_CLK_DUMMY>;
 527                                 clock-names = "audmux";
 528                                 status = "disabled";
 529                         };
 530
 531                         weim: weim@83fda000 {
 532                                 #address-cells = <2>;
 533                                 #size-cells = <1>;
 534                                 compatible = "fsl,imx51-weim";
 535                                 reg = <0x83fda000 0x1000>;
 536                                 clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>;
 537                                 ranges = <
 538                                         0 0 0xb0000000 0x08000000
 539                                         1 0 0xb8000000 0x08000000
 540                                         2 0 0xc0000000 0x08000000
 541                                         3 0 0xc8000000 0x04000000
 542                                         4 0 0xcc000000 0x02000000
 543                                         5 0 0xce000000 0x02000000
 544                                 >;
 545                                 status = "disabled";
 546                         };
 547
 548                         nfc: nand@83fdb000 {
 549                                 #address-cells = <1>;
 550                                 #size-cells = <1>;
 551                                 compatible = "fsl,imx51-nand";
 552                                 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
 553                                 interrupts = <8>;
 554                                 clocks = <&clks IMX5_CLK_NFC_GATE>;
 555                                 status = "disabled";
 556                         };
 557
 558                         pata: pata@83fe0000 {
 559                                 compatible = "fsl,imx51-pata", "fsl,imx27-pata";
 560                                 reg = <0x83fe0000 0x4000>;
 561                                 interrupts = <70>;
 562                                 clocks = <&clks IMX5_CLK_PATA_GATE>;
 563                                 status = "disabled";
 564                         };
 565
 566                         ssi3: ssi@83fe8000 {
 567                                 #sound-dai-cells = <0>;
 568                                 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 569                                 reg = <0x83fe8000 0x4000>;
 570                                 interrupts = <96>;
 571                                 clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>,
 572                                          <&clks IMX5_CLK_SSI3_ROOT_GATE>;
 573                                 clock-names = "ipg", "baud";
 574                                 dmas = <&sdma 46 0 0>,
 575                                        <&sdma 47 0 0>;
 576                                 dma-names = "rx", "tx";
 577                                 fsl,fifo-depth = <15>;
 578                                 status = "disabled";
 579                         };
 580
 581                         fec: ethernet@83fec000 {
 582                                 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
 583                                 reg = <0x83fec000 0x4000>;
 584                                 interrupts = <87>;
 585                                 clocks = <&clks IMX5_CLK_FEC_GATE>,
 586                                          <&clks IMX5_CLK_FEC_GATE>,
 587                                          <&clks IMX5_CLK_FEC_GATE>;
 588                                 clock-names = "ipg", "ahb", "ptp";
 589                                 status = "disabled";
 590                         };
 591                 };
 592         };
 593 };