arch/arm/boot/dts/imx51.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include "imx51-pinfunc.h"
  14 #include <dt-bindings/clock/imx5-clock.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/input/input.h>
  17 #include <dt-bindings/interrupt-controller/irq.h>
  18
  19 / {
  20         #address-cells = <1>;
  21         #size-cells = <1>;
  22         /*
  23          * The decompressor and also some bootloaders rely on a
  24          * pre-existing /chosen node to be available to insert the
  25          * command line and merge other ATAGS info.
  26          * Also for U-Boot there must be a pre-existing /memory node.
  27          */
  28         chosen {};
  29         memory { device_type = "memory"; reg = <0 0>; };
  30
  31         aliases {
  32                 ethernet0 = &fec;
  33                 gpio0 = &gpio1;
  34                 gpio1 = &gpio2;
  35                 gpio2 = &gpio3;
  36                 gpio3 = &gpio4;
  37                 i2c0 = &i2c1;
  38                 i2c1 = &i2c2;
  39                 mmc0 = &esdhc1;
  40                 mmc1 = &esdhc2;
  41                 mmc2 = &esdhc3;
  42                 mmc3 = &esdhc4;
  43                 serial0 = &uart1;
  44                 serial1 = &uart2;
  45                 serial2 = &uart3;
  46                 spi0 = &ecspi1;
  47                 spi1 = &ecspi2;
  48                 spi2 = &cspi;
  49         };
  50
  51         tzic: tz-interrupt-controller@e0000000 {
  52                 compatible = "fsl,imx51-tzic", "fsl,tzic";
  53                 interrupt-controller;
  54                 #interrupt-cells = <1>;
  55                 reg = <0xe0000000 0x4000>;
  56         };
  57
  58         clocks {
  59                 #address-cells = <1>;
  60                 #size-cells = <0>;
  61
  62                 ckil {
  63                         compatible = "fsl,imx-ckil", "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <32768>;
  66                 };
  67
  68                 ckih1 {
  69                         compatible = "fsl,imx-ckih1", "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <0>;
  72                 };
  73
  74                 ckih2 {
  75                         compatible = "fsl,imx-ckih2", "fixed-clock";
  76                         #clock-cells = <0>;
  77                         clock-frequency = <0>;
  78                 };
  79
  80                 osc {
  81                         compatible = "fsl,imx-osc", "fixed-clock";
  82                         #clock-cells = <0>;
  83                         clock-frequency = <24000000>;
  84                 };
  85         };
  86
  87         cpus {
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90                 cpu: cpu@0 {
  91                         device_type = "cpu";
  92                         compatible = "arm,cortex-a8";
  93                         reg = <0>;
  94                         clock-latency = <62500>;
  95                         clocks = <&clks IMX5_CLK_CPU_PODF>;
  96                         clock-names = "cpu";
  97                         operating-points = <
  98                                 166000  1000000
  99                                 600000  1050000
 100                                 800000  1100000
 101                         >;
 102                         voltage-tolerance = <5>;
 103                 };
 104         };
 105
 106         usbphy {
 107                 #address-cells = <1>;
 108                 #size-cells = <0>;
 109                 compatible = "simple-bus";
 110
 111                 usbphy0: usbphy@0 {
 112                         compatible = "usb-nop-xceiv";
 113                         reg = <0>;
 114                         clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 115                         clock-names = "main_clk";
 116                 };
 117         };
 118
 119         display-subsystem {
 120                 compatible = "fsl,imx-display-subsystem";
 121                 ports = <&ipu_di0>, <&ipu_di1>;
 122         };
 123
 124         soc {
 125                 #address-cells = <1>;
 126                 #size-cells = <1>;
 127                 compatible = "simple-bus";
 128                 interrupt-parent = <&tzic>;
 129                 ranges;
 130
 131                 iram: iram@1ffe0000 {
 132                         compatible = "mmio-sram";
 133                         reg = <0x1ffe0000 0x20000>;
 134                 };
 135
 136                 ipu: ipu@40000000 {
 137                         #address-cells = <1>;
 138                         #size-cells = <0>;
 139                         compatible = "fsl,imx51-ipu";
 140                         reg = <0x40000000 0x20000000>;
 141                         interrupts = <11 10>;
 142                         clocks = <&clks IMX5_CLK_IPU_GATE>,
 143                                  <&clks IMX5_CLK_IPU_DI0_GATE>,
 144                                  <&clks IMX5_CLK_IPU_DI1_GATE>;
 145                         clock-names = "bus", "di0", "di1";
 146                         resets = <&src 2>;
 147
 148                         ipu_di0: port@2 {
 149                                 reg = <2>;
 150
 151                                 ipu_di0_disp1: endpoint {
 152                                 };
 153                         };
 154
 155                         ipu_di1: port@3 {
 156                                 reg = <3>;
 157
 158                                 ipu_di1_disp2: endpoint {
 159                                 };
 160                         };
 161                 };
 162
 163                 aips@70000000 { /* AIPS1 */
 164                         compatible = "fsl,aips-bus", "simple-bus";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167                         reg = <0x70000000 0x10000000>;
 168                         ranges;
 169
 170                         spba@70000000 {
 171                                 compatible = "fsl,spba-bus", "simple-bus";
 172                                 #address-cells = <1>;
 173                                 #size-cells = <1>;
 174                                 reg = <0x70000000 0x40000>;
 175                                 ranges;
 176
 177                                 esdhc1: esdhc@70004000 {
 178                                         compatible = "fsl,imx51-esdhc";
 179                                         reg = <0x70004000 0x4000>;
 180                                         interrupts = <1>;
 181                                         clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
 182                                                  <&clks IMX5_CLK_DUMMY>,
 183                                                  <&clks IMX5_CLK_ESDHC1_PER_GATE>;
 184                                         clock-names = "ipg", "ahb", "per";
 185                                         status = "disabled";
 186                                 };
 187
 188                                 esdhc2: esdhc@70008000 {
 189                                         compatible = "fsl,imx51-esdhc";
 190                                         reg = <0x70008000 0x4000>;
 191                                         interrupts = <2>;
 192                                         clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
 193                                                  <&clks IMX5_CLK_DUMMY>,
 194                                                  <&clks IMX5_CLK_ESDHC2_PER_GATE>;
 195                                         clock-names = "ipg", "ahb", "per";
 196                                         bus-width = <4>;
 197                                         status = "disabled";
 198                                 };
 199
 200                                 uart3: serial@7000c000 {
 201                                         compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 202                                         reg = <0x7000c000 0x4000>;
 203                                         interrupts = <33>;
 204                                         clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
 205                                                  <&clks IMX5_CLK_UART3_PER_GATE>;
 206                                         clock-names = "ipg", "per";
 207                                         status = "disabled";
 208                                 };
 209
 210                                 ecspi1: ecspi@70010000 {
 211                                         #address-cells = <1>;
 212                                         #size-cells = <0>;
 213                                         compatible = "fsl,imx51-ecspi";
 214                                         reg = <0x70010000 0x4000>;
 215                                         interrupts = <36>;
 216                                         clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
 217                                                  <&clks IMX5_CLK_ECSPI1_PER_GATE>;
 218                                         clock-names = "ipg", "per";
 219                                         status = "disabled";
 220                                 };
 221
 222                                 ssi2: ssi@70014000 {
 223                                         #sound-dai-cells = <0>;
 224                                         compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 225                                         reg = <0x70014000 0x4000>;
 226                                         interrupts = <30>;
 227                                         clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>,
 228                                                  <&clks IMX5_CLK_SSI2_ROOT_GATE>;
 229                                         clock-names = "ipg", "baud";
 230                                         dmas = <&sdma 24 1 0>,
 231                                                <&sdma 25 1 0>;
 232                                         dma-names = "rx", "tx";
 233                                         fsl,fifo-depth = <15>;
 234                                         status = "disabled";
 235                                 };
 236
 237                                 esdhc3: esdhc@70020000 {
 238                                         compatible = "fsl,imx51-esdhc";
 239                                         reg = <0x70020000 0x4000>;
 240                                         interrupts = <3>;
 241                                         clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
 242                                                  <&clks IMX5_CLK_DUMMY>,
 243                                                  <&clks IMX5_CLK_ESDHC3_PER_GATE>;
 244                                         clock-names = "ipg", "ahb", "per";
 245                                         bus-width = <4>;
 246                                         status = "disabled";
 247                                 };
 248
 249                                 esdhc4: esdhc@70024000 {
 250                                         compatible = "fsl,imx51-esdhc";
 251                                         reg = <0x70024000 0x4000>;
 252                                         interrupts = <4>;
 253                                         clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
 254                                                  <&clks IMX5_CLK_DUMMY>,
 255                                                  <&clks IMX5_CLK_ESDHC4_PER_GATE>;
 256                                         clock-names = "ipg", "ahb", "per";
 257                                         bus-width = <4>;
 258                                         status = "disabled";
 259                                 };
 260                         };
 261
 262                         usbotg: usb@73f80000 {
 263                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 264                                 reg = <0x73f80000 0x0200>;
 265                                 interrupts = <18>;
 266                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 267                                 fsl,usbmisc = <&usbmisc 0>;
 268                                 fsl,usbphy = <&usbphy0>;
 269                                 status = "disabled";
 270                         };
 271
 272                         usbh1: usb@73f80200 {
 273                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 274                                 reg = <0x73f80200 0x0200>;
 275                                 interrupts = <14>;
 276                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 277                                 fsl,usbmisc = <&usbmisc 1>;
 278                                 dr_mode = "host";
 279                                 status = "disabled";
 280                         };
 281
 282                         usbh2: usb@73f80400 {
 283                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 284                                 reg = <0x73f80400 0x0200>;
 285                                 interrupts = <16>;
 286                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 287                                 fsl,usbmisc = <&usbmisc 2>;
 288                                 dr_mode = "host";
 289                                 status = "disabled";
 290                         };
 291
 292                         usbh3: usb@73f80600 {
 293                                 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
 294                                 reg = <0x73f80600 0x0200>;
 295                                 interrupts = <17>;
 296                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 297                                 fsl,usbmisc = <&usbmisc 3>;
 298                                 dr_mode = "host";
 299                                 status = "disabled";
 300                         };
 301
 302                         usbmisc: usbmisc@73f80800 {
 303                                 #index-cells = <1>;
 304                                 compatible = "fsl,imx51-usbmisc";
 305                                 reg = <0x73f80800 0x200>;
 306                                 clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 307                         };
 308
 309                         gpio1: gpio@73f84000 {
 310                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 311                                 reg = <0x73f84000 0x4000>;
 312                                 interrupts = <50 51>;
 313                                 gpio-controller;
 314                                 #gpio-cells = <2>;
 315                                 interrupt-controller;
 316                                 #interrupt-cells = <2>;
 317                         };
 318
 319                         gpio2: gpio@73f88000 {
 320                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 321                                 reg = <0x73f88000 0x4000>;
 322                                 interrupts = <52 53>;
 323                                 gpio-controller;
 324                                 #gpio-cells = <2>;
 325                                 interrupt-controller;
 326                                 #interrupt-cells = <2>;
 327                         };
 328
 329                         gpio3: gpio@73f8c000 {
 330                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 331                                 reg = <0x73f8c000 0x4000>;
 332                                 interrupts = <54 55>;
 333                                 gpio-controller;
 334                                 #gpio-cells = <2>;
 335                                 interrupt-controller;
 336                                 #interrupt-cells = <2>;
 337                         };
 338
 339                         gpio4: gpio@73f90000 {
 340                                 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
 341                                 reg = <0x73f90000 0x4000>;
 342                                 interrupts = <56 57>;
 343                                 gpio-controller;
 344                                 #gpio-cells = <2>;
 345                                 interrupt-controller;
 346                                 #interrupt-cells = <2>;
 347                         };
 348
 349                         kpp: kpp@73f94000 {
 350                                 compatible = "fsl,imx51-kpp", "fsl,imx21-kpp";
 351                                 reg = <0x73f94000 0x4000>;
 352                                 interrupts = <60>;
 353                                 clocks = <&clks IMX5_CLK_DUMMY>;
 354                                 status = "disabled";
 355                         };
 356
 357                         wdog1: wdog@73f98000 {
 358                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
 359                                 reg = <0x73f98000 0x4000>;
 360                                 interrupts = <58>;
 361                                 clocks = <&clks IMX5_CLK_DUMMY>;
 362                         };
 363
 364                         wdog2: wdog@73f9c000 {
 365                                 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
 366                                 reg = <0x73f9c000 0x4000>;
 367                                 interrupts = <59>;
 368                                 clocks = <&clks IMX5_CLK_DUMMY>;
 369                                 status = "disabled";
 370                         };
 371
 372                         gpt: timer@73fa0000 {
 373                                 compatible = "fsl,imx51-gpt", "fsl,imx31-gpt";
 374                                 reg = <0x73fa0000 0x4000>;
 375                                 interrupts = <39>;
 376                                 clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
 377                                          <&clks IMX5_CLK_GPT_HF_GATE>;
 378                                 clock-names = "ipg", "per";
 379                         };
 380
 381                         iomuxc: iomuxc@73fa8000 {
 382                                 compatible = "fsl,imx51-iomuxc";
 383                                 reg = <0x73fa8000 0x4000>;
 384                         };
 385
 386                         pwm1: pwm@73fb4000 {
 387                                 #pwm-cells = <2>;
 388                                 compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 389                                 reg = <0x73fb4000 0x4000>;
 390                                 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
 391                                          <&clks IMX5_CLK_PWM1_HF_GATE>;
 392                                 clock-names = "ipg", "per";
 393                                 interrupts = <61>;
 394                         };
 395
 396                         pwm2: pwm@73fb8000 {
 397                                 #pwm-cells = <2>;
 398                                 compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 399                                 reg = <0x73fb8000 0x4000>;
 400                                 clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
 401                                          <&clks IMX5_CLK_PWM2_HF_GATE>;
 402                                 clock-names = "ipg", "per";
 403                                 interrupts = <94>;
 404                         };
 405
 406                         uart1: serial@73fbc000 {
 407                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 408                                 reg = <0x73fbc000 0x4000>;
 409                                 interrupts = <31>;
 410                                 clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
 411                                          <&clks IMX5_CLK_UART1_PER_GATE>;
 412                                 clock-names = "ipg", "per";
 413                                 status = "disabled";
 414                         };
 415
 416                         uart2: serial@73fc0000 {
 417                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
 418                                 reg = <0x73fc0000 0x4000>;
 419                                 interrupts = <32>;
 420                                 clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
 421                                          <&clks IMX5_CLK_UART2_PER_GATE>;
 422                                 clock-names = "ipg", "per";
 423                                 status = "disabled";
 424                         };
 425
 426                         src: src@73fd0000 {
 427                                 compatible = "fsl,imx51-src";
 428                                 reg = <0x73fd0000 0x4000>;
 429                                 #reset-cells = <1>;
 430                         };
 431
 432                         clks: ccm@73fd4000{
 433                                 compatible = "fsl,imx51-ccm";
 434                                 reg = <0x73fd4000 0x4000>;
 435                                 interrupts = <0 71 0x04 0 72 0x04>;
 436                                 #clock-cells = <1>;
 437                         };
 438                 };
 439
 440                 aips@80000000 { /* AIPS2 */
 441                         compatible = "fsl,aips-bus", "simple-bus";
 442                         #address-cells = <1>;
 443                         #size-cells = <1>;
 444                         reg = <0x80000000 0x10000000>;
 445                         ranges;
 446
 447                         iim: iim@83f98000 {
 448                                 compatible = "fsl,imx51-iim", "fsl,imx27-iim";
 449                                 reg = <0x83f98000 0x4000>;
 450                                 interrupts = <69>;
 451                                 clocks = <&clks IMX5_CLK_IIM_GATE>;
 452                         };
 453
 454                         owire: owire@83fa4000 {
 455                                 compatible = "fsl,imx51-owire", "fsl,imx21-owire";
 456                                 reg = <0x83fa4000 0x4000>;
 457                                 interrupts = <88>;
 458                                 clocks = <&clks IMX5_CLK_OWIRE_GATE>;
 459                                 status = "disabled";
 460                         };
 461
 462                         ecspi2: ecspi@83fac000 {
 463                                 #address-cells = <1>;
 464                                 #size-cells = <0>;
 465                                 compatible = "fsl,imx51-ecspi";
 466                                 reg = <0x83fac000 0x4000>;
 467                                 interrupts = <37>;
 468                                 clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
 469                                          <&clks IMX5_CLK_ECSPI2_PER_GATE>;
 470                                 clock-names = "ipg", "per";
 471                                 status = "disabled";
 472                         };
 473
 474                         sdma: sdma@83fb0000 {
 475                                 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
 476                                 reg = <0x83fb0000 0x4000>;
 477                                 interrupts = <6>;
 478                                 clocks = <&clks IMX5_CLK_SDMA_GATE>,
 479                                          <&clks IMX5_CLK_SDMA_GATE>;
 480                                 clock-names = "ipg", "ahb";
 481                                 #dma-cells = <3>;
 482                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
 483                         };
 484
 485                         cspi: cspi@83fc0000 {
 486                                 #address-cells = <1>;
 487                                 #size-cells = <0>;
 488                                 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
 489                                 reg = <0x83fc0000 0x4000>;
 490                                 interrupts = <38>;
 491                                 clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
 492                                          <&clks IMX5_CLK_CSPI_IPG_GATE>;
 493                                 clock-names = "ipg", "per";
 494                                 status = "disabled";
 495                         };
 496
 497                         i2c2: i2c@83fc4000 {
 498                                 #address-cells = <1>;
 499                                 #size-cells = <0>;
 500                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
 501                                 reg = <0x83fc4000 0x4000>;
 502                                 interrupts = <63>;
 503                                 clocks = <&clks IMX5_CLK_I2C2_GATE>;
 504                                 status = "disabled";
 505                         };
 506
 507                         i2c1: i2c@83fc8000 {
 508                                 #address-cells = <1>;
 509                                 #size-cells = <0>;
 510                                 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
 511                                 reg = <0x83fc8000 0x4000>;
 512                                 interrupts = <62>;
 513                                 clocks = <&clks IMX5_CLK_I2C1_GATE>;
 514                                 status = "disabled";
 515                         };
 516
 517                         ssi1: ssi@83fcc000 {
 518                                 #sound-dai-cells = <0>;
 519                                 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 520                                 reg = <0x83fcc000 0x4000>;
 521                                 interrupts = <29>;
 522                                 clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>,
 523                                          <&clks IMX5_CLK_SSI1_ROOT_GATE>;
 524                                 clock-names = "ipg", "baud";
 525                                 dmas = <&sdma 28 0 0>,
 526                                        <&sdma 29 0 0>;
 527                                 dma-names = "rx", "tx";
 528                                 fsl,fifo-depth = <15>;
 529                                 status = "disabled";
 530                         };
 531
 532                         audmux: audmux@83fd0000 {
 533                                 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
 534                                 reg = <0x83fd0000 0x4000>;
 535                                 clocks = <&clks IMX5_CLK_DUMMY>;
 536                                 clock-names = "audmux";
 537                                 status = "disabled";
 538                         };
 539
 540                         weim: weim@83fda000 {
 541                                 #address-cells = <2>;
 542                                 #size-cells = <1>;
 543                                 compatible = "fsl,imx51-weim";
 544                                 reg = <0x83fda000 0x1000>;
 545                                 clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>;
 546                                 ranges = <
 547                                         0 0 0xb0000000 0x08000000
 548                                         1 0 0xb8000000 0x08000000
 549                                         2 0 0xc0000000 0x08000000
 550                                         3 0 0xc8000000 0x04000000
 551                                         4 0 0xcc000000 0x02000000
 552                                         5 0 0xce000000 0x02000000
 553                                 >;
 554                                 status = "disabled";
 555                         };
 556
 557                         nfc: nand@83fdb000 {
 558                                 #address-cells = <1>;
 559                                 #size-cells = <1>;
 560                                 compatible = "fsl,imx51-nand";
 561                                 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
 562                                 interrupts = <8>;
 563                                 clocks = <&clks IMX5_CLK_NFC_GATE>;
 564                                 status = "disabled";
 565                         };
 566
 567                         pata: pata@83fe0000 {
 568                                 compatible = "fsl,imx51-pata", "fsl,imx27-pata";
 569                                 reg = <0x83fe0000 0x4000>;
 570                                 interrupts = <70>;
 571                                 clocks = <&clks IMX5_CLK_PATA_GATE>;
 572                                 status = "disabled";
 573                         };
 574
 575                         ssi3: ssi@83fe8000 {
 576                                 #sound-dai-cells = <0>;
 577                                 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 578                                 reg = <0x83fe8000 0x4000>;
 579                                 interrupts = <96>;
 580                                 clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>,
 581                                          <&clks IMX5_CLK_SSI3_ROOT_GATE>;
 582                                 clock-names = "ipg", "baud";
 583                                 dmas = <&sdma 46 0 0>,
 584                                        <&sdma 47 0 0>;
 585                                 dma-names = "rx", "tx";
 586                                 fsl,fifo-depth = <15>;
 587                                 status = "disabled";
 588                         };
 589
 590                         fec: ethernet@83fec000 {
 591                                 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
 592                                 reg = <0x83fec000 0x4000>;
 593                                 interrupts = <87>;
 594                                 clocks = <&clks IMX5_CLK_FEC_GATE>,
 595                                          <&clks IMX5_CLK_FEC_GATE>,
 596                                          <&clks IMX5_CLK_FEC_GATE>;
 597                                 clock-names = "ipg", "ahb", "ptp";
 598                                 status = "disabled";
 599                         };
 600                 };
 601         };
 602 };