arch/arm/boot/dts/imx51-zii-scu2-mezz.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2
   3 /*
   4  * Copyright (C) 2018 Zodiac Inflight Innovations
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "imx51.dtsi"
  10
  11 / {
  12         model = "ZII SCU2 Mezz Board";
  13         compatible = "zii,imx51-scu2-mezz", "fsl,imx51";
  14
  15         chosen {
  16                 stdout-path = &uart1;
  17         };
  18
  19         /* Will be filled by the bootloader */
  20         memory@90000000 {
  21                 reg = <0x90000000 0>;
  22         };
  23
  24         aliases {
  25                 mdio-gpio0 = &mdio_gpio;
  26         };
  27
  28         usb_vbus: regulator-usb-vbus {
  29                 compatible = "regulator-fixed";
  30                 pinctrl-names = "default";
  31                 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
  32                 gpio = <&gpio3 13 GPIO_ACTIVE_LOW>;
  33                 startup-delay-us = <150000>;
  34                 regulator-name = "usb_vbus";
  35                 regulator-min-microvolt = <5000000>;
  36                 regulator-max-microvolt = <5000000>;
  37         };
  38
  39         mdio_gpio: mdio-gpio {
  40                 compatible = "virtual,mdio-gpio";
  41                 pinctrl-names = "default";
  42                 pinctrl-0 = <&pinctrl_swmdio>;
  43                 gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>, /* mdc */
  44                         <&gpio2 6 GPIO_ACTIVE_HIGH>; /* mdio */
  45                 #address-cells = <1>;
  46                 #size-cells = <0>;
  47
  48                 switch@0 {
  49                         compatible = "marvell,mv88e6085";
  50                         reg = <0>;
  51                         dsa,member = <0 0>;
  52                         eeprom-length = <512>;
  53                         interrupt-parent = <&gpio1>;
  54                         interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
  55                         interrupt-controller;
  56                         #interrupt-cells = <2>;
  57
  58                         ports {
  59                                 #address-cells = <1>;
  60                                 #size-cells = <0>;
  61
  62                                 port@0 {
  63                                         reg = <0>;
  64                                         label = "port4";
  65                                 };
  66
  67                                 port@1 {
  68                                         reg = <1>;
  69                                         label = "port5";
  70                                 };
  71
  72                                 port@2 {
  73                                         reg = <2>;
  74                                         label = "port6";
  75                                 };
  76
  77                                 port@3 {
  78                                         reg = <3>;
  79                                         label = "port7";
  80                                 };
  81
  82                                 port@4 {
  83                                         reg = <4>;
  84                                         label = "cpu";
  85                                         ethernet = <&fec>;
  86
  87                                         fixed-link {
  88                                                 speed = <100>;
  89                                                 full-duplex;
  90                                         };
  91                                 };
  92
  93                                 port@5 {
  94                                         reg = <5>;
  95                                         label = "mezz2esb";
  96                                         phy-mode = "sgmii";
  97
  98                                         fixed-link {
  99                                                 speed = <1000>;
 100                                                 full-duplex;
 101                                         };
 102                                 };
 103                         };
 104                 };
 105         };
 106 };
 107
 108 &cpu {
 109         cpu-supply = <&sw1_reg>;
 110 };
 111
 112 &ecspi1 {
 113         pinctrl-names = "default";
 114         pinctrl-0 = <&pinctrl_ecspi1>;
 115         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
 116                    <&gpio4 25 GPIO_ACTIVE_LOW>;
 117         status = "okay";
 118
 119         pmic@0 {
 120                 compatible = "fsl,mc13892";
 121                 pinctrl-names = "default";
 122                 pinctrl-0 = <&pinctrl_pmic>;
 123                 spi-max-frequency = <6000000>;
 124                 spi-cs-high;
 125                 reg = <0>;
 126                 interrupt-parent = <&gpio1>;
 127                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 128                 fsl,mc13xxx-uses-adc;
 129
 130                 regulators {
 131                         sw1_reg: sw1 {
 132                                 regulator-min-microvolt = <600000>;
 133                                 regulator-max-microvolt = <1375000>;
 134                                 regulator-boot-on;
 135                                 regulator-always-on;
 136                         };
 137
 138                         sw2_reg: sw2 {
 139                                 regulator-min-microvolt = <900000>;
 140                                 regulator-max-microvolt = <1850000>;
 141                                 regulator-boot-on;
 142                                 regulator-always-on;
 143                         };
 144
 145                         sw3_reg: sw3 {
 146                                 regulator-min-microvolt = <1100000>;
 147                                 regulator-max-microvolt = <1850000>;
 148                                 regulator-boot-on;
 149                                 regulator-always-on;
 150                         };
 151
 152                         sw4_reg: sw4 {
 153                                 regulator-min-microvolt = <1100000>;
 154                                 regulator-max-microvolt = <1850000>;
 155                                 regulator-boot-on;
 156                                 regulator-always-on;
 157                         };
 158
 159                         vpll_reg: vpll {
 160                                 regulator-min-microvolt = <1050000>;
 161                                 regulator-max-microvolt = <1800000>;
 162                                 regulator-boot-on;
 163                                 regulator-always-on;
 164                         };
 165
 166                         vdig_reg: vdig {
 167                                 regulator-min-microvolt = <1650000>;
 168                                 regulator-max-microvolt = <1650000>;
 169                                 regulator-boot-on;
 170                         };
 171
 172                         vsd_reg: vsd {
 173                                 regulator-min-microvolt = <1800000>;
 174                                 regulator-max-microvolt = <3150000>;
 175                                 regulator-always-on;
 176                         };
 177
 178                         vusb_reg: vusb {
 179                                 regulator-always-on;
 180                         };
 181
 182                         vusb2_reg: vusb2 {
 183                                 regulator-min-microvolt = <2400000>;
 184                                 regulator-max-microvolt = <2775000>;
 185                                 regulator-boot-on;
 186                                 regulator-always-on;
 187                         };
 188
 189                         vvideo_reg: vvideo {
 190                                 regulator-min-microvolt = <2775000>;
 191                                 regulator-max-microvolt = <2775000>;
 192                         };
 193
 194                         vaudio_reg: vaudio {
 195                                 regulator-min-microvolt = <2300000>;
 196                                 regulator-max-microvolt = <3000000>;
 197                         };
 198
 199                         vcam_reg: vcam {
 200                                 regulator-min-microvolt = <2500000>;
 201                                 regulator-max-microvolt = <3000000>;
 202                         };
 203
 204                         vgen1_reg: vgen1 {
 205                                 regulator-min-microvolt = <1200000>;
 206                                 regulator-max-microvolt = <1200000>;
 207                         };
 208
 209                         vgen2_reg: vgen2 {
 210                                 regulator-min-microvolt = <1200000>;
 211                                 regulator-max-microvolt = <3150000>;
 212                                 regulator-always-on;
 213                         };
 214
 215                         vgen3_reg: vgen3 {
 216                                 regulator-min-microvolt = <1800000>;
 217                                 regulator-max-microvolt = <2900000>;
 218                                 regulator-always-on;
 219                         };
 220                 };
 221
 222                 leds {
 223                         #address-cells = <1>;
 224                         #size-cells = <0>;
 225                         led-control = <0x0 0x0 0x3f83f8 0x0>;
 226
 227                         sysled3: led3@3 {
 228                                 reg = <3>;
 229                                 label = "system:red:power";
 230                                 linux,default-trigger = "default-on";
 231                         };
 232
 233                         sysled4: led4@4 {
 234                                 reg = <4>;
 235                                 label = "system:green:act";
 236                                 linux,default-trigger = "heartbeat";
 237                         };
 238                 };
 239         };
 240
 241         flash@1 {
 242                 compatible = "atmel,at45", "atmel,dataflash";
 243                 reg = <1>;
 244                 spi-max-frequency = <25000000>;
 245         };
 246 };
 247
 248 &esdhc1 {
 249         pinctrl-names = "default";
 250         pinctrl-0 = <&pinctrl_esdhc1>;
 251         bus-width = <8>;
 252         non-removable;
 253         no-1-8-v;
 254         no-sdio;
 255         no-sd;
 256         status = "okay";
 257 };
 258
 259 &esdhc4 {
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&pinctrl_esdhc4>;
 262         bus-width = <4>;
 263         no-1-8-v;
 264         no-sdio;
 265         cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
 266         status = "okay";
 267 };
 268
 269 &fec {
 270         pinctrl-names = "default";
 271         pinctrl-0 = <&pinctrl_fec>;
 272         phy-mode = "mii";
 273         status = "okay";
 274         phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
 275         phy-reset-duration = <1>;
 276         phy-supply = <&vgen3_reg>;
 277         phy-handle = <&ethphy>;
 278
 279         mdio {
 280                 #address-cells = <1>;
 281                 #size-cells = <0>;
 282
 283                 ethphy: ethernet-phy@0 {
 284                         reg = <0>;
 285                         max-speed = <100>;
 286                 };
 287         };
 288 };
 289
 290 &i2c2 {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_i2c2>;
 293         status = "okay";
 294
 295         eeprom@50 {
 296                 compatible = "atmel,24c04";
 297                 pagesize = <16>;
 298                 reg = <0x50>;
 299         };
 300 };
 301
 302 &uart1 {
 303         pinctrl-names = "default";
 304         pinctrl-0 = <&pinctrl_uart1>;
 305         status = "okay";
 306 };
 307
 308 &uart3 {
 309         pinctrl-names = "default";
 310         pinctrl-0 = <&pinctrl_uart3>;
 311         status = "okay";
 312
 313         rave-sp {
 314                 compatible = "zii,rave-sp-mezz";
 315                 current-speed = <57600>;
 316                 #address-cells = <1>;
 317                 #size-cells = <1>;
 318
 319                 watchdog {
 320                         compatible = "zii,rave-sp-watchdog-legacy";
 321                 };
 322
 323                 eeprom@a4 {
 324                         compatible = "zii,rave-sp-eeprom";
 325                         reg = <0xa4 0x4000>;
 326                         #address-cells = <1>;
 327                         #size-cells = <1>;
 328                         zii,eeprom-name = "main-eeprom";
 329                 };
 330         };
 331 };
 332
 333 &usbotg {
 334         dr_mode = "host";
 335         disable-over-current;
 336         phy_type = "utmi_wide";
 337         vbus-supply = <&usb_vbus>;
 338         status = "okay";
 339 };
 340
 341 &usbphy0 {
 342         vcc-supply = <&vusb2_reg>;
 343 };
 344
 345 &vpu {
 346         status = "disabled";
 347 };
 348
 349 &wdog1 {
 350         status = "disabled";
 351 };
 352
 353 &iomuxc {
 354         pinctrl_ecspi1: ecspi1grp {
 355                 fsl,pins = <
 356                         MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
 357                         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
 358                         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
 359                         MX51_PAD_CSPI1_SS0__GPIO4_24            0x85
 360                         MX51_PAD_CSPI1_SS1__GPIO4_25            0x85
 361                 >;
 362         };
 363
 364         pinctrl_esdhc1: esdhc1grp {
 365                 fsl,pins = <
 366                         MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
 367                         MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
 368                         MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
 369                         MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
 370                         MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
 371                         MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
 372                         MX51_PAD_SD2_DATA0__SD1_DAT4            0x20d5
 373                         MX51_PAD_SD2_DATA1__SD1_DAT5            0x20d5
 374                         MX51_PAD_SD2_DATA2__SD1_DAT6            0x20d5
 375                         MX51_PAD_SD2_DATA3__SD1_DAT7            0x20d5
 376                 >;
 377         };
 378
 379         pinctrl_esdhc4: esdhc4grp {
 380                 fsl,pins = <
 381                         MX51_PAD_NANDF_RB1__SD4_CMD             0x400020d5
 382                         MX51_PAD_NANDF_CS2__SD4_CLK             0x20d5
 383                         MX51_PAD_NANDF_CS3__SD4_DAT0            0x20d5
 384                         MX51_PAD_NANDF_CS4__SD4_DAT1            0x20d5
 385                         MX51_PAD_NANDF_CS5__SD4_DAT2            0x20d5
 386                         MX51_PAD_NANDF_CS6__SD4_DAT3            0x20d5
 387                         MX51_PAD_NANDF_D0__GPIO4_8              0x100
 388                 >;
 389         };
 390
 391         pinctrl_fec: fecgrp {
 392                 fsl,pins = <
 393                         MX51_PAD_DISP2_DAT15__FEC_TDATA0        0x2004
 394                         MX51_PAD_DISP2_DAT6__FEC_TDATA1         0x2004
 395                         MX51_PAD_DISP2_DAT7__FEC_TDATA2         0x2004
 396                         MX51_PAD_DISP2_DAT8__FEC_TDATA3         0x2004
 397                         MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x2004
 398                         MX51_PAD_DISP2_DAT10__FEC_COL           0x0180
 399                         MX51_PAD_DISP2_DAT11__FEC_RX_CLK        0x0180
 400                         MX51_PAD_DISP2_DAT12__FEC_RX_DV         0x20a4
 401                         MX51_PAD_DISP2_DAT1__FEC_RX_ER          0x20a4
 402                         MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x2180
 403                         MX51_PAD_DI_GP3__FEC_TX_ER              0x2004
 404                         MX51_PAD_DISP2_DAT14__FEC_RDATA0        0x2180
 405                         MX51_PAD_DI2_DISP_CLK__FEC_RDATA1       0x0085
 406                         MX51_PAD_DI_GP4__FEC_RDATA2             0x0085
 407                         MX51_PAD_DISP2_DAT0__FEC_RDATA3         0x0085
 408                         MX51_PAD_DI2_PIN2__FEC_MDC              0x2004
 409                         MX51_PAD_DI2_PIN3__FEC_MDIO             0x01f5
 410                         MX51_PAD_DI2_PIN4__FEC_CRS              0x0180
 411                         MX51_PAD_EIM_A20__GPIO2_14              0x0085
 412                         MX51_PAD_EIM_A21__GPIO2_15              0x00e5
 413                 >;
 414         };
 415
 416         pinctrl_i2c2: i2c2grp {
 417                 fsl,pins = <
 418                         MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
 419                         MX51_PAD_KEY_COL5__I2C2_SDA             0x400001ed
 420                 >;
 421         };
 422
 423         pinctrl_pmic: pmicgrp {
 424                 fsl,pins = <
 425                         MX51_PAD_GPIO1_4__GPIO1_4               0x85
 426                         MX51_PAD_GPIO1_8__GPIO1_8               0xe5
 427                 >;
 428         };
 429
 430         pinctrl_swmdio: swmdiogrp {
 431                 fsl,pins = <
 432                         MX51_PAD_EIM_D22__GPIO2_6               0x100
 433                         MX51_PAD_EIM_D23__GPIO2_7               0x100
 434                 >;
 435         };
 436
 437         pinctrl_uart1: uart1grp {
 438                 fsl,pins = <
 439                         MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
 440                         MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
 441                 >;
 442         };
 443
 444         pinctrl_uart3: uart3grp {
 445                 fsl,pins = <
 446                         MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
 447                         MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
 448                 >;
 449         };
 450
 451         pinctrl_usb_mmc_reset: usbmmcgrp {
 452                 fsl,pins = <
 453                         MX51_PAD_CSI1_D9__GPIO3_13              0x85
 454                 >;
 455         };
 456 };