arch/arm/boot/dts/imx51-zii-rdu1.dts

   1 /*
   2  * Copyright (C) 2017 Zodiac Inflight Innovations
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful,
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41
  42 /dts-v1/;
  43 #include "imx51.dtsi"
  44 #include <dt-bindings/sound/fsl-imx-audmux.h>
  45
  46 / {
  47         model = "ZII RDU1 Board";
  48         compatible = "zii,imx51-rdu1", "fsl,imx51";
  49
  50         chosen {
  51                 stdout-path = &uart1;
  52         };
  53
  54         /* Will be filled by the bootloader */
  55         memory@90000000 {
  56                 reg = <0x90000000 0>;
  57         };
  58
  59         aliases {
  60                 mdio-gpio0 = &mdio_gpio;
  61                 rtc0 = &ds1341;
  62         };
  63
  64         clk_26M_osc: 26M_osc {
  65                 compatible = "fixed-clock";
  66                 #clock-cells = <0>;
  67                 clock-frequency = <26000000>;
  68         };
  69
  70         clk_26M_osc_gate: 26M_gate {
  71                 compatible = "gpio-gate-clock";
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&pinctrl_clk26mhz>;
  74                 clocks = <&clk_26M_osc>;
  75                 #clock-cells = <0>;
  76                 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
  77         };
  78
  79         clk_26M_usb: usbhost_gate {
  80                 compatible = "gpio-gate-clock";
  81                 pinctrl-names = "default";
  82                 pinctrl-0 = <&pinctrl_usbgate26mhz>;
  83                 clocks = <&clk_26M_osc_gate>;
  84                 #clock-cells = <0>;
  85                 enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  86         };
  87
  88         clk_26M_snd: snd_gate {
  89                 compatible = "gpio-gate-clock";
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&pinctrl_sndgate26mhz>;
  92                 clocks = <&clk_26M_osc_gate>;
  93                 #clock-cells = <0>;
  94                 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
  95         };
  96
  97         reg_5p0v_main: regulator-5p0v-main {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "5V_MAIN";
 100                 regulator-min-microvolt = <5000000>;
 101                 regulator-max-microvolt = <5000000>;
 102                 regulator-always-on;
 103         };
 104
 105         reg_3p3v: regulator-3p3v {
 106                 compatible = "regulator-fixed";
 107                 regulator-name = "3.3V";
 108                 regulator-min-microvolt = <3300000>;
 109                 regulator-max-microvolt = <3300000>;
 110                 regulator-always-on;
 111         };
 112
 113         disp0 {
 114                 compatible = "fsl,imx-parallel-display";
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_ipu_disp1>;
 117
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120
 121                 port@0 {
 122                         reg = <0>;
 123
 124                         display_in: endpoint {
 125                                 remote-endpoint = <&ipu_di0_disp1>;
 126                         };
 127                 };
 128
 129                 port@1 {
 130                         reg = <1>;
 131
 132                         display_out: endpoint {
 133                                 remote-endpoint = <&panel_in>;
 134                         };
 135                 };
 136         };
 137
 138         panel {
 139                 /* no compatible here, bootloader will patch in correct one */
 140                 pinctrl-names = "default";
 141                 pinctrl-0 = <&pinctrl_panel>;
 142                 power-supply = <&reg_3p3v>;
 143                 enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 144                 status = "disabled";
 145
 146                 port {
 147                         panel_in: endpoint {
 148                                 remote-endpoint = <&display_out>;
 149                         };
 150                 };
 151         };
 152
 153         i2c_gpio: i2c-gpio {
 154                 compatible = "i2c-gpio";
 155                 pinctrl-names = "default";
 156                 pinctrl-0 = <&pinctrl_swi2c>;
 157                 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
 158                         <&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
 159                 i2c-gpio,delay-us = <50>;
 160                 status = "okay";
 161
 162                 #address-cells = <1>;
 163                 #size-cells = <0>;
 164
 165                 sgtl5000: codec@a {
 166                         compatible = "fsl,sgtl5000";
 167                         reg = <0x0a>;
 168                         clocks = <&clk_26M_snd>;
 169                         VDDA-supply = <&vdig_reg>;
 170                         VDDIO-supply = <&vvideo_reg>;
 171                         #sound-dai-cells = <0>;
 172                 };
 173         };
 174
 175         spi_gpio: spi-gpio {
 176                 compatible = "spi-gpio";
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179                 pinctrl-names = "default";
 180                 pinctrl-0 = <&pinctrl_gpiospi0>;
 181                 status = "okay";
 182
 183                 gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
 184                 gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
 185                 gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
 186                 num-chipselects = <1>;
 187                 cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
 188
 189                 eeprom@0 {
 190                         compatible = "eeprom-93xx46";
 191                         reg = <0>;
 192                         spi-max-frequency = <1000000>;
 193                         spi-cs-high;
 194                         data-size = <8>;
 195                 };
 196         };
 197
 198         mdio_gpio: mdio-gpio {
 199                 compatible = "virtual,mdio-gpio";
 200                 pinctrl-names = "default";
 201                 pinctrl-0 = <&pinctrl_swmdio>;
 202                 gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
 203                         <&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
 204
 205                 #address-cells = <1>;
 206                 #size-cells = <0>;
 207
 208                 switch@0 {
 209                         compatible = "marvell,mv88e6085";
 210                         reg = <0>;
 211                         dsa,member = <0 0>;
 212
 213                         ports {
 214                                 #address-cells = <1>;
 215                                 #size-cells = <0>;
 216
 217                                 port@0 {
 218                                         reg = <0>;
 219                                         label = "cpu";
 220                                         ethernet = <&fec>;
 221
 222                                         fixed-link {
 223                                                 speed = <100>;
 224                                                 full-duplex;
 225                                         };
 226                                 };
 227
 228                                 port@1 {
 229                                         reg = <1>;
 230                                         label = "netaux";
 231                                 };
 232
 233                                 port@3 {
 234                                         reg = <3>;
 235                                         label = "netright";
 236                                 };
 237
 238                                 port@4 {
 239                                         reg = <4>;
 240                                         label = "netleft";
 241                                 };
 242                         };
 243                 };
 244         };
 245
 246         sound {
 247                 compatible = "simple-audio-card";
 248                 simple-audio-card,name = "Front";
 249                 simple-audio-card,format = "i2s";
 250                 simple-audio-card,bitclock-master = <&sound_codec>;
 251                 simple-audio-card,frame-master = <&sound_codec>;
 252                 simple-audio-card,widgets =
 253                         "Headphone", "Headphone Jack";
 254                 simple-audio-card,routing =
 255                         "Headphone Jack", "HPLEFT",
 256                         "Headphone Jack", "HPRIGHT";
 257                 simple-audio-card,aux-devs = <&hpa1>;
 258
 259                 sound_cpu: simple-audio-card,cpu {
 260                         sound-dai = <&ssi2>;
 261                 };
 262
 263                 sound_codec: simple-audio-card,codec {
 264                         sound-dai = <&sgtl5000>;
 265                         clocks = <&clk_26M_snd>;
 266                 };
 267         };
 268
 269         usbh1phy: usbphy1 {
 270                 compatible = "usb-nop-xceiv";
 271                 pinctrl-names = "default";
 272                 pinctrl-0 = <&pinctrl_usbh1phy>;
 273                 clocks = <&clk_26M_usb>;
 274                 clock-names = "main_clk";
 275                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
 276                 vcc-supply = <&vusb_reg>;
 277                 #phy-cells = <0>;
 278         };
 279
 280         usbh2phy: usbphy2 {
 281                 compatible = "usb-nop-xceiv";
 282                 pinctrl-names = "default";
 283                 pinctrl-0 = <&pinctrl_usbh2phy>;
 284                 clocks = <&clk_26M_usb>;
 285                 clock-names = "main_clk";
 286                 reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
 287                 vcc-supply = <&vusb_reg>;
 288                 #phy-cells = <0>;
 289         };
 290 };
 291
 292 &audmux {
 293         pinctrl-names = "default";
 294         pinctrl-0 = <&pinctrl_audmux>;
 295         status = "okay";
 296
 297         ssi2 {
 298                 fsl,audmux-port = <1>;
 299                 fsl,port-config = <
 300                         (IMX_AUDMUX_V2_PTCR_SYN |
 301                          IMX_AUDMUX_V2_PTCR_TFSEL(2) |
 302                          IMX_AUDMUX_V2_PTCR_TCSEL(2) |
 303                          IMX_AUDMUX_V2_PTCR_TFSDIR |
 304                          IMX_AUDMUX_V2_PTCR_TCLKDIR)
 305                         IMX_AUDMUX_V2_PDCR_RXDSEL(2)
 306                 >;
 307         };
 308
 309         aud3 {
 310                 fsl,audmux-port = <2>;
 311                 fsl,port-config = <
 312                         IMX_AUDMUX_V2_PTCR_SYN
 313                         IMX_AUDMUX_V2_PDCR_RXDSEL(1)
 314                 >;
 315         };
 316 };
 317
 318 &cpu {
 319         cpu-supply = <&sw1_reg>;
 320 };
 321
 322 &ecspi1 {
 323         pinctrl-names = "default";
 324         pinctrl-0 = <&pinctrl_ecspi1>;
 325         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
 326                    <&gpio4 25 GPIO_ACTIVE_LOW>;
 327         status = "okay";
 328
 329         pmic@0 {
 330                 compatible = "fsl,mc13892";
 331                 pinctrl-names = "default";
 332                 pinctrl-0 = <&pinctrl_pmic>;
 333                 spi-max-frequency = <6000000>;
 334                 spi-cs-high;
 335                 reg = <0>;
 336                 interrupt-parent = <&gpio1>;
 337                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 338                 fsl,mc13xxx-uses-adc;
 339
 340                 regulators {
 341                         sw1_reg: sw1 {
 342                                 regulator-min-microvolt = <600000>;
 343                                 regulator-max-microvolt = <1375000>;
 344                                 regulator-boot-on;
 345                                 regulator-always-on;
 346                         };
 347
 348                         sw2_reg: sw2 {
 349                                 regulator-min-microvolt = <900000>;
 350                                 regulator-max-microvolt = <1850000>;
 351                                 regulator-boot-on;
 352                                 regulator-always-on;
 353                         };
 354
 355                         sw3_reg: sw3 {
 356                                 regulator-min-microvolt = <1100000>;
 357                                 regulator-max-microvolt = <1850000>;
 358                                 regulator-boot-on;
 359                                 regulator-always-on;
 360                         };
 361
 362                         sw4_reg: sw4 {
 363                                 regulator-min-microvolt = <1100000>;
 364                                 regulator-max-microvolt = <1850000>;
 365                                 regulator-boot-on;
 366                                 regulator-always-on;
 367                         };
 368
 369                         vpll_reg: vpll {
 370                                 regulator-min-microvolt = <1050000>;
 371                                 regulator-max-microvolt = <1800000>;
 372                                 regulator-boot-on;
 373                                 regulator-always-on;
 374                         };
 375
 376                         vdig_reg: vdig {
 377                                 regulator-min-microvolt = <1650000>;
 378                                 regulator-max-microvolt = <1650000>;
 379                                 regulator-boot-on;
 380                         };
 381
 382                         vsd_reg: vsd {
 383                                 regulator-min-microvolt = <1800000>;
 384                                 regulator-max-microvolt = <3150000>;
 385                         };
 386
 387                         vusb_reg: vusb {
 388                                 regulator-always-on;
 389                         };
 390
 391                         vusb2_reg: vusb2 {
 392                                 regulator-min-microvolt = <2400000>;
 393                                 regulator-max-microvolt = <2775000>;
 394                                 regulator-boot-on;
 395                                 regulator-always-on;
 396                         };
 397
 398                         vvideo_reg: vvideo {
 399                                 regulator-min-microvolt = <2775000>;
 400                                 regulator-max-microvolt = <2775000>;
 401                         };
 402
 403                         vaudio_reg: vaudio {
 404                                 regulator-min-microvolt = <2300000>;
 405                                 regulator-max-microvolt = <3000000>;
 406                         };
 407
 408                         vcam_reg: vcam {
 409                                 regulator-min-microvolt = <2500000>;
 410                                 regulator-max-microvolt = <3000000>;
 411                         };
 412
 413                         vgen1_reg: vgen1 {
 414                                 regulator-min-microvolt = <1200000>;
 415                                 regulator-max-microvolt = <1200000>;
 416                         };
 417
 418                         vgen2_reg: vgen2 {
 419                                 regulator-min-microvolt = <1200000>;
 420                                 regulator-max-microvolt = <3150000>;
 421                                 regulator-always-on;
 422                         };
 423
 424                         vgen3_reg: vgen3 {
 425                                 regulator-min-microvolt = <1800000>;
 426                                 regulator-max-microvolt = <2900000>;
 427                                 regulator-always-on;
 428                         };
 429                 };
 430
 431                 leds {
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434                         led-control = <0x0 0x0 0x3f83f8 0x0>;
 435
 436                         sysled0@3 {
 437                                 reg = <3>;
 438                                 label = "system:green:status";
 439                                 linux,default-trigger = "default-on";
 440                         };
 441
 442                         sysled1@4 {
 443                                 reg = <4>;
 444                                 label = "system:green:act";
 445                                 linux,default-trigger = "heartbeat";
 446                         };
 447                 };
 448         };
 449
 450         flash@1 {
 451                 #address-cells = <1>;
 452                 #size-cells = <1>;
 453                 compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
 454                 spi-max-frequency = <25000000>;
 455                 reg = <1>;
 456         };
 457 };
 458
 459 &esdhc1 {
 460         pinctrl-names = "default";
 461         pinctrl-0 = <&pinctrl_esdhc1>;
 462         bus-width = <4>;
 463         no-1-8-v;
 464         non-removable;
 465         no-sdio;
 466         no-sd;
 467         status = "okay";
 468 };
 469
 470 &fec {
 471         pinctrl-names = "default";
 472         pinctrl-0 = <&pinctrl_fec>;
 473         phy-mode = "mii";
 474         phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
 475         phy-supply = <&vgen3_reg>;
 476         status = "okay";
 477 };
 478
 479 &i2c2 {
 480         pinctrl-names = "default";
 481         pinctrl-0 = <&pinctrl_i2c2>;
 482         status = "okay";
 483
 484         eeprom@50 {
 485                 compatible = "atmel,24c04";
 486                 pagesize = <16>;
 487                 reg = <0x50>;
 488         };
 489
 490         hpa1: amp@60 {
 491                 compatible = "ti,tpa6130a2";
 492                 reg = <0x60>;
 493                 pinctrl-names = "default";
 494                 pinctrl-0 = <&pinctrl_ampgpio>;
 495                 power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 496                 Vdd-supply = <&reg_3p3v>;
 497         };
 498
 499         ds1341: rtc@68 {
 500                 compatible = "maxim,ds1341";
 501                 reg = <0x68>;
 502         };
 503
 504         /* touch nodes default disabled, bootloader will enable the right one */
 505
 506         touchscreen@4b {
 507                 compatible = "atmel,maxtouch";
 508                 reg = <0x4b>;
 509                 pinctrl-names = "default";
 510                 pinctrl-0 = <&pinctrl_ts>;
 511                 interrupt-parent = <&gpio3>;
 512                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 513                 status = "disabled";
 514         };
 515
 516         touchscreen@4c {
 517                 compatible = "atmel,maxtouch";
 518                 reg = <0x4c>;
 519                 pinctrl-names = "default";
 520                 pinctrl-0 = <&pinctrl_ts>;
 521                 interrupt-parent = <&gpio3>;
 522                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 523                 status = "disabled";
 524         };
 525
 526         touchscreen@20 {
 527                 compatible = "syna,rmi4-i2c";
 528                 reg = <0x20>;
 529                 pinctrl-names = "default";
 530                 pinctrl-0 = <&pinctrl_ts>;
 531                 interrupt-parent = <&gpio3>;
 532                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
 533                 status = "disabled";
 534
 535                 #address-cells = <1>;
 536                 #size-cells = <0>;
 537
 538                 rmi4-f01@1 {
 539                         reg = <0x1>;
 540                         syna,nosleep-mode = <2>;
 541                 };
 542
 543                 rmi4-f11@11 {
 544                         reg = <0x11>;
 545                         touchscreen-inverted-y;
 546                         touchscreen-swapped-x-y;
 547                         syna,sensor-type = <1>;
 548                 };
 549         };
 550
 551 };
 552
 553 &ipu_di0_disp1 {
 554         remote-endpoint = <&display_in>;
 555 };
 556
 557 &ssi2 {
 558         status = "okay";
 559 };
 560
 561 &uart1 {
 562         pinctrl-names = "default";
 563         pinctrl-0 = <&pinctrl_uart1>;
 564         status = "okay";
 565 };
 566
 567 &uart2 {
 568         pinctrl-names = "default";
 569         pinctrl-0 = <&pinctrl_uart2>;
 570         status = "okay";
 571 };
 572
 573 &uart3 {
 574         pinctrl-names = "default";
 575         pinctrl-0 = <&pinctrl_uart3>;
 576         status = "okay";
 577
 578         rave-sp {
 579                 compatible = "zii,rave-sp-rdu1";
 580                 current-speed = <38400>;
 581
 582                 watchdog {
 583                         compatible = "zii,rave-sp-watchdog";
 584                 };
 585         };
 586 };
 587
 588 &usbh1 {
 589         pinctrl-names = "default";
 590         pinctrl-0 = <&pinctrl_usbh1>;
 591         dr_mode = "host";
 592         phy_type = "ulpi";
 593         fsl,usbphy = <&usbh1phy>;
 594         disable-over-current;
 595         maximum-speed = "full-speed";
 596         vbus-supply = <&reg_5p0v_main>;
 597         status = "okay";
 598 };
 599
 600 &usbh2 {
 601         pinctrl-names = "default";
 602         pinctrl-0 = <&pinctrl_usbh2>;
 603         dr_mode = "host";
 604         phy_type = "ulpi";
 605         fsl,usbphy = <&usbh2phy>;
 606         disable-over-current;
 607         vbus-supply = <&reg_5p0v_main>;
 608         status = "okay";
 609 };
 610
 611 &usbphy0 {
 612         vcc-supply = <&vusb_reg>;
 613 };
 614
 615 &usbotg {
 616         dr_mode = "host";
 617         disable-over-current;
 618         phy_type = "utmi_wide";
 619         vbus-supply = <&reg_5p0v_main>;
 620         status = "okay";
 621 };
 622
 623 &iomuxc {
 624         pinctrl_ampgpio: ampgpiogrp {
 625                 fsl,pins = <
 626                         MX51_PAD_GPIO1_9__GPIO1_9               0x5e
 627                 >;
 628         };
 629
 630         pinctrl_audmux: audmuxgrp {
 631                 fsl,pins = <
 632                         MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0xa5
 633                         MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x85
 634                         MX51_PAD_AUD3_BB_CK__AUD3_TXC           0xa5
 635                         MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x85
 636                 >;
 637         };
 638
 639         pinctrl_clk26mhz: clk26mhzgrp {
 640                 fsl,pins = <
 641                         MX51_PAD_DI1_PIN12__GPIO3_1             0x85
 642                 >;
 643         };
 644
 645         pinctrl_ecspi1: ecspi1grp {
 646                 fsl,pins = <
 647                         MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
 648                         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
 649                         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
 650                         MX51_PAD_CSPI1_SS0__GPIO4_24            0x85
 651                         MX51_PAD_CSPI1_SS1__GPIO4_25            0x85
 652                 >;
 653         };
 654
 655         pinctrl_esdhc1: esdhc1grp {
 656                 fsl,pins = <
 657                         MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
 658                         MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
 659                         MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
 660                         MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
 661                         MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
 662                         MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
 663                 >;
 664         };
 665
 666         pinctrl_fec: fecgrp {
 667                 fsl,pins = <
 668                         MX51_PAD_EIM_EB2__FEC_MDIO              0x1f5
 669                         MX51_PAD_NANDF_D9__FEC_RDATA0           0x2180
 670                         MX51_PAD_EIM_EB3__FEC_RDATA1            0x180
 671                         MX51_PAD_EIM_CS2__FEC_RDATA2            0x180
 672                         MX51_PAD_EIM_CS3__FEC_RDATA3            0x180
 673                         MX51_PAD_EIM_CS4__FEC_RX_ER             0x180
 674                         MX51_PAD_NANDF_D11__FEC_RX_DV           0x2084
 675                         MX51_PAD_EIM_CS5__FEC_CRS               0x180
 676                         MX51_PAD_NANDF_RB2__FEC_COL             0x2180
 677                         MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x2180
 678                         MX51_PAD_NANDF_CS2__FEC_TX_ER           0x2004
 679                         MX51_PAD_NANDF_CS3__FEC_MDC             0x2004
 680                         MX51_PAD_NANDF_D8__FEC_TDATA0           0x2180
 681                         MX51_PAD_NANDF_CS4__FEC_TDATA1          0x2004
 682                         MX51_PAD_NANDF_CS5__FEC_TDATA2          0x2004
 683                         MX51_PAD_NANDF_CS6__FEC_TDATA3          0x2004
 684                         MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x2004
 685                         MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x2180
 686                         MX51_PAD_EIM_A20__GPIO2_14              0x85
 687                 >;
 688         };
 689
 690         pinctrl_gpiospi0: gpiospi0grp {
 691                 fsl,pins = <
 692                         MX51_PAD_CSI2_D18__GPIO4_11             0x85
 693                         MX51_PAD_CSI2_D19__GPIO4_12             0x85
 694                         MX51_PAD_CSI2_HSYNC__GPIO4_14           0x85
 695                         MX51_PAD_CSI2_PIXCLK__GPIO4_15          0x85
 696                 >;
 697         };
 698
 699         pinctrl_i2c2: i2c2grp {
 700                 fsl,pins = <
 701                         MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
 702                         MX51_PAD_KEY_COL5__I2C2_SDA             0x400001ed
 703                 >;
 704         };
 705
 706         pinctrl_ipu_disp1: ipudisp1grp {
 707                 fsl,pins = <
 708                         MX51_PAD_DISP1_DAT0__DISP1_DAT0         0x5
 709                         MX51_PAD_DISP1_DAT1__DISP1_DAT1         0x5
 710                         MX51_PAD_DISP1_DAT2__DISP1_DAT2         0x5
 711                         MX51_PAD_DISP1_DAT3__DISP1_DAT3         0x5
 712                         MX51_PAD_DISP1_DAT4__DISP1_DAT4         0x5
 713                         MX51_PAD_DISP1_DAT5__DISP1_DAT5         0x5
 714                         MX51_PAD_DISP1_DAT6__DISP1_DAT6         0x5
 715                         MX51_PAD_DISP1_DAT7__DISP1_DAT7         0x5
 716                         MX51_PAD_DISP1_DAT8__DISP1_DAT8         0x5
 717                         MX51_PAD_DISP1_DAT9__DISP1_DAT9         0x5
 718                         MX51_PAD_DISP1_DAT10__DISP1_DAT10       0x5
 719                         MX51_PAD_DISP1_DAT11__DISP1_DAT11       0x5
 720                         MX51_PAD_DISP1_DAT12__DISP1_DAT12       0x5
 721                         MX51_PAD_DISP1_DAT13__DISP1_DAT13       0x5
 722                         MX51_PAD_DISP1_DAT14__DISP1_DAT14       0x5
 723                         MX51_PAD_DISP1_DAT15__DISP1_DAT15       0x5
 724                         MX51_PAD_DISP1_DAT16__DISP1_DAT16       0x5
 725                         MX51_PAD_DISP1_DAT17__DISP1_DAT17       0x5
 726                         MX51_PAD_DISP1_DAT18__DISP1_DAT18       0x5
 727                         MX51_PAD_DISP1_DAT19__DISP1_DAT19       0x5
 728                         MX51_PAD_DISP1_DAT20__DISP1_DAT20       0x5
 729                         MX51_PAD_DISP1_DAT21__DISP1_DAT21       0x5
 730                         MX51_PAD_DISP1_DAT22__DISP1_DAT22       0x5
 731                         MX51_PAD_DISP1_DAT23__DISP1_DAT23       0x5
 732                         MX51_PAD_DI1_PIN2__DI1_PIN2             0x5
 733                         MX51_PAD_DI1_PIN3__DI1_PIN3             0x5
 734                         MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     0x5
 735                 >;
 736         };
 737
 738         pinctrl_panel: panelgrp {
 739                 fsl,pins = <
 740                         MX51_PAD_DI1_D0_CS__GPIO3_3             0x85
 741                 >;
 742         };
 743
 744         pinctrl_pmic: pmicgrp {
 745                 fsl,pins = <
 746                         MX51_PAD_GPIO1_4__GPIO1_4               0x1e0
 747                         MX51_PAD_GPIO1_8__GPIO1_8               0x21e2
 748                 >;
 749         };
 750
 751         pinctrl_sndgate26mhz: sndgate26mhzgrp {
 752                 fsl,pins = <
 753                         MX51_PAD_CSPI1_RDY__GPIO4_26            0x85
 754                 >;
 755         };
 756
 757         pinctrl_swi2c: swi2cgrp {
 758                 fsl,pins = <
 759                         MX51_PAD_GPIO1_2__GPIO1_2               0xc5
 760                         MX51_PAD_DI1_D1_CS__GPIO3_4             0x400001f5
 761                 >;
 762         };
 763
 764         pinctrl_swmdio: swmdiogrp {
 765                 fsl,pins = <
 766                         MX51_PAD_NANDF_D14__GPIO3_26            0x21e6
 767                         MX51_PAD_NANDF_D15__GPIO3_25            0x21e6
 768                 >;
 769         };
 770
 771         pinctrl_ts: tsgrp {
 772                 fsl,pins = <
 773                         MX51_PAD_CSI1_D8__GPIO3_12              0x04
 774                         MX51_PAD_CSI1_D9__GPIO3_13              0x85
 775                 >;
 776         };
 777
 778         pinctrl_uart1: uart1grp {
 779                 fsl,pins = <
 780                         MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
 781                         MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
 782                         MX51_PAD_UART1_RTS__UART1_RTS           0x1c4
 783                         MX51_PAD_UART1_CTS__UART1_CTS           0x1c4
 784                 >;
 785         };
 786
 787         pinctrl_uart2: uart2grp {
 788                 fsl,pins = <
 789                         MX51_PAD_UART2_RXD__UART2_RXD           0xc5
 790                         MX51_PAD_UART2_TXD__UART2_TXD           0xc5
 791                 >;
 792         };
 793
 794         pinctrl_uart3: uart3grp {
 795                 fsl,pins = <
 796                         MX51_PAD_EIM_D25__UART3_RXD             0x1c5
 797                         MX51_PAD_EIM_D26__UART3_TXD             0x1c5
 798                 >;
 799         };
 800
 801         pinctrl_usbgate26mhz: usbgate26mhzgrp {
 802                 fsl,pins = <
 803                         MX51_PAD_DISP2_DAT6__GPIO1_19           0x85
 804                 >;
 805         };
 806
 807         pinctrl_usbh1: usbh1grp {
 808                 fsl,pins = <
 809                         MX51_PAD_USBH1_STP__USBH1_STP           0x0
 810                         MX51_PAD_USBH1_CLK__USBH1_CLK           0x0
 811                         MX51_PAD_USBH1_DIR__USBH1_DIR           0x0
 812                         MX51_PAD_USBH1_NXT__USBH1_NXT           0x0
 813                         MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x0
 814                         MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x0
 815                         MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x0
 816                         MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x0
 817                         MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x0
 818                         MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x0
 819                         MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x0
 820                         MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x0
 821                 >;
 822         };
 823
 824         pinctrl_usbh1phy: usbh1phygrp {
 825                 fsl,pins = <
 826                         MX51_PAD_NANDF_D0__GPIO4_8              0x85
 827                 >;
 828         };
 829
 830         pinctrl_usbh2: usbh2grp {
 831                 fsl,pins = <
 832                         MX51_PAD_EIM_A26__USBH2_STP             0x0
 833                         MX51_PAD_EIM_A24__USBH2_CLK             0x0
 834                         MX51_PAD_EIM_A25__USBH2_DIR             0x0
 835                         MX51_PAD_EIM_A27__USBH2_NXT             0x0
 836                         MX51_PAD_EIM_D16__USBH2_DATA0           0x0
 837                         MX51_PAD_EIM_D17__USBH2_DATA1           0x0
 838                         MX51_PAD_EIM_D18__USBH2_DATA2           0x0
 839                         MX51_PAD_EIM_D19__USBH2_DATA3           0x0
 840                         MX51_PAD_EIM_D20__USBH2_DATA4           0x0
 841                         MX51_PAD_EIM_D21__USBH2_DATA5           0x0
 842                         MX51_PAD_EIM_D22__USBH2_DATA6           0x0
 843                         MX51_PAD_EIM_D23__USBH2_DATA7           0x0
 844                 >;
 845         };
 846
 847         pinctrl_usbh2phy: usbh2phygrp {
 848                 fsl,pins = <
 849                         MX51_PAD_NANDF_D1__GPIO4_7              0x85
 850                 >;
 851         };
 852 };