Merge tag 'pwm/for-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx51-digi-connectcore-jsk.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
4  */
5
6 #include "imx51-digi-connectcore-som.dtsi"
7
8 / {
9         model = "Digi ConnectCore CC(W)-MX51 JSK";
10         compatible = "digi,connectcore-ccxmx51-jsk",
11                      "digi,connectcore-ccxmx51-som", "fsl,imx51";
12
13         chosen {
14                 stdout-path = &uart1;
15         };
16 };
17
18 &esdhc1 {
19         status = "okay";
20 };
21
22 &owire {
23         pinctrl-names = "default";
24         pinctrl-0 = <&pinctrl_owire>;
25         status = "okay";
26 };
27
28 &pmic {
29         fsl,mc13xxx-uses-rtc;
30
31         regulators {
32                 vcoincell_reg: vcoincell {
33                         regulator-min-microvolt = <3000000>;
34                         regulator-max-microvolt = <3000000>;
35                         regulator-always-on;
36                 };
37         };
38 };
39
40 &uart1 {
41         pinctrl-names = "default";
42         pinctrl-0 = <&pinctrl_uart1>;
43         status = "okay";
44 };
45
46 &uart2 {
47         pinctrl-names = "default";
48         pinctrl-0 = <&pinctrl_uart2>;
49         status = "okay";
50 };
51
52 &uart3 {
53         pinctrl-names = "default";
54         pinctrl-0 = <&pinctrl_uart3>;
55         status = "okay";
56 };
57
58 &usbotg {
59         dr_mode = "otg";
60         status = "okay";
61 };
62
63 &usbh1 {
64         pinctrl-names = "default";
65         pinctrl-0 = <&pinctrl_usbh1>;
66         dr_mode = "host";
67         phy_type = "ulpi";
68         disable-over-current;
69         status = "okay";
70 };
71
72 &iomuxc {
73         imx51-digi-connectcore-jsk {
74                 pinctrl_owire: owiregrp {
75                         fsl,pins = <
76                                 MX51_PAD_OWIRE_LINE__OWIRE_LINE         0x40000000
77                         >;
78                 };
79
80                 pinctrl_uart1: uart1grp {
81                         fsl,pins = <
82                                 MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
83                                 MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
84                         >;
85                 };
86
87                 pinctrl_uart2: uart2grp {
88                         fsl,pins = <
89                                 MX51_PAD_UART2_RXD__UART2_RXD           0x1c5
90                                 MX51_PAD_UART2_TXD__UART2_TXD           0x1c5
91                         >;
92                 };
93
94                 pinctrl_uart3: uart3grp {
95                         fsl,pins = <
96                                 MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
97                                 MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
98                         >;
99                 };
100
101                 pinctrl_usbh1: usbh1grp {
102                         fsl,pins = <
103                                 MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x1e5
104                                 MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x1e5
105                                 MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x1e5
106                                 MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x1e5
107                                 MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x1e5
108                                 MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x1e5
109                                 MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x1e5
110                                 MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x1e5
111                                 MX51_PAD_USBH1_CLK__USBH1_CLK           0x1e5
112                                 MX51_PAD_USBH1_DIR__USBH1_DIR           0x1e5
113                                 MX51_PAD_USBH1_NXT__USBH1_NXT           0x1e5
114                                 MX51_PAD_USBH1_STP__USBH1_STP           0x1e5
115                         >;
116                 };
117         };
118 };