arch/arm/boot/dts/gemini-dlink-dir-685.dts

   1 /*
   2  * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
   3  */
   4
   5 /dts-v1/;
   6
   7 #include "gemini.dtsi"
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         model = "D-Link DIR-685 Xtreme N Storage Router";
  12         compatible = "dlink,dir-685", "cortina,gemini";
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         memory@0 {
  17                 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
  18                 device_type = "memory";
  19                 reg = <0x00000000 0x8000000>;
  20         };
  21
  22         chosen {
  23                 bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
  24                 stdout-path = "uart0:19200n8";
  25         };
  26
  27         gpio_keys {
  28                 compatible = "gpio-keys";
  29
  30                 button-esc {
  31                         debounce-interval = <100>;
  32                         wakeup-source;
  33                         linux,code = <KEY_ESC>;
  34                         label = "reset";
  35                         /* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
  36                         gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  37                 };
  38                 button-eject {
  39                         debounce-interval = <100>;
  40                         wakeup-source;
  41                         linux,code = <KEY_EJECTCD>;
  42                         label = "unmount";
  43                         /* Collides with LPC LFRAME, UART RTS, SSP TXD */
  44                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  45                 };
  46         };
  47
  48         vdisp: regulator {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "display-power";
  51                 regulator-min-microvolt = <3600000>;
  52                 regulator-max-microvolt = <3600000>;
  53                 /* Collides with LCD E */
  54                 gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
  55                 enable-active-high;
  56         };
  57
  58         spi {
  59                 compatible = "spi-gpio";
  60                 #address-cells = <1>;
  61                 #size-cells = <0>;
  62
  63                 /* Collides with IDE pins, that's cool (we do not use them) */
  64                 gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  65                 gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  66                 gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  67                 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  68                 num-chipselects = <1>;
  69
  70                 panel: display@0 {
  71                         compatible = "dlink,dir-685-panel", "ilitek,ili9322";
  72                         reg = <0>;
  73                         /* 50 ns min period = 20 MHz */
  74                         spi-max-frequency = <20000000>;
  75                         spi-cpol; /* Clock active low */
  76                         vcc-supply = <&vdisp>;
  77                         iovcc-supply = <&vdisp>;
  78                         vci-supply = <&vdisp>;
  79
  80                         port {
  81                                 panel_in: endpoint {
  82                                         remote-endpoint = <&display_out>;
  83                                 };
  84                         };
  85                 };
  86         };
  87
  88         leds {
  89                 compatible = "gpio-leds";
  90                 led-wps {
  91                         label = "dir685:blue:WPS";
  92                         /* Collides with ICE */
  93                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  94                         default-state = "on";
  95                         linux,default-trigger = "heartbeat";
  96                 };
  97                 /*
  98                  * These two LEDs are on the side of the device.
  99                  * For electrical reasons, both LEDs cannot be active
 100                  * at the same time so only blue or orange can be on at
 101                  * one time. Enabling both makes the LED go dark.
 102                  * The LEDs both sit inside the unmount button and the
 103                  * label on the case says "unmount".
 104                  */
 105                 led-blue-hd {
 106                         label = "dir685:blue:HD";
 107                         /* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
 108                         gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
 109                         default-state = "off";
 110                         linux,default-trigger = "disk-read";
 111                 };
 112                 led-orange-hd {
 113                         label = "dir685:orange:HD";
 114                         /* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
 115                         gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 116                         default-state = "off";
 117                         linux,default-trigger = "disk-write";
 118                 };
 119         };
 120
 121         /*
 122          * This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
 123          * Since the platform has no temperature sensor, this is controlled
 124          * from userspace by using the hard disks S.M.A.R.T. temperature
 125          * sensor. It is turned on when the temperature exceeds 46 degrees
 126          * and turned off when the temperatures goes below 41 degrees
 127          * (celsius).
 128          */
 129         gpio-fan {
 130                 compatible = "gpio-fan";
 131                 /* Collides with IDE */
 132                 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
 133                 gpio-fan,speed-map = <0 0>, <10000 1>;
 134                 #cooling-cells = <2>;
 135         };
 136
 137         /*
 138          * The touchpad input is connected to a GPIO bit-banged
 139          * I2C bus.
 140          */
 141         gpio-i2c {
 142                 compatible = "i2c-gpio";
 143                 /* Collides with ICE */
 144                 sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
 145                 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148
 149                 touchkeys@26 {
 150                         compatible = "dlink,dir685-touchkeys";
 151                         reg = <0x26>;
 152                         interrupt-parent = <&gpio0>;
 153                         /* Collides with NAND flash */
 154                         interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
 155                 };
 156         };
 157
 158         /* This is a RealTek RTL8366RB switch and PHY using SMI over GPIO */
 159         switch {
 160                 compatible = "realtek,rtl8366rb";
 161                 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
 162                 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
 163                 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
 164                 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 165                 realtek,disable-leds;
 166
 167                 switch_intc: interrupt-controller {
 168                         /* GPIO 15 provides the interrupt */
 169                         interrupt-parent = <&gpio0>;
 170                         interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
 171                         interrupt-controller;
 172                         #address-cells = <0>;
 173                         #interrupt-cells = <1>;
 174                 };
 175
 176                 ports {
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179
 180                         port@0 {
 181                                 reg = <0>;
 182                                 label = "lan0";
 183                                 phy-handle = <&phy0>;
 184                         };
 185                         port@1 {
 186                                 reg = <1>;
 187                                 label = "lan1";
 188                                 phy-handle = <&phy1>;
 189                         };
 190                         port@2 {
 191                                 reg = <2>;
 192                                 label = "lan2";
 193                                 phy-handle = <&phy2>;
 194                         };
 195                         port@3 {
 196                                 reg = <3>;
 197                                 label = "lan3";
 198                                 phy-handle = <&phy3>;
 199                         };
 200                         port@4 {
 201                                 reg = <4>;
 202                                 label = "wan";
 203                                 phy-handle = <&phy4>;
 204                         };
 205                         rtl8366rb_cpu_port: port@5 {
 206                                 reg = <5>;
 207                                 label = "cpu";
 208                                 ethernet = <&gmac0>;
 209                                 phy-mode = "rgmii";
 210                                 fixed-link {
 211                                         speed = <1000>;
 212                                         full-duplex;
 213                                         pause;
 214                                 };
 215                         };
 216
 217                 };
 218
 219                 mdio {
 220                         compatible = "realtek,smi-mdio";
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223
 224                         phy0: phy@0 {
 225                                 reg = <0>;
 226                                 interrupt-parent = <&switch_intc>;
 227                                 interrupts = <0>;
 228                         };
 229                         phy1: phy@1 {
 230                                 reg = <1>;
 231                                 interrupt-parent = <&switch_intc>;
 232                                 interrupts = <1>;
 233                         };
 234                         phy2: phy@2 {
 235                                 reg = <2>;
 236                                 interrupt-parent = <&switch_intc>;
 237                                 interrupts = <2>;
 238                         };
 239                         phy3: phy@3 {
 240                                 reg = <3>;
 241                                 interrupt-parent = <&switch_intc>;
 242                                 interrupts = <3>;
 243                         };
 244                         phy4: phy@4 {
 245                                 reg = <4>;
 246                                 interrupt-parent = <&switch_intc>;
 247                                 interrupts = <12>;
 248                         };
 249                 };
 250         };
 251
 252         soc {
 253                 flash@30000000 {
 254                         /*
 255                          * Flash access collides with the Chip Enable signal for
 256                          * the display panel, that reuse the parallel flash Chip
 257                          * Select 1 (CS1). We switch the pin control state so we
 258                          * enable these pins for flash access only when we need
 259                          * then, and when disabled they can be used for GPIO which
 260                          * is what the display panel needs.
 261                          */
 262                         status = "okay";
 263                         pinctrl-names = "enabled", "disabled";
 264                         pinctrl-0 = <&pflash_default_pins>;
 265                         pinctrl-1 = <&pflash_disabled_pins>;
 266
 267                         /* 32MB of flash */
 268                         reg = <0x30000000 0x02000000>;
 269
 270                         partitions {
 271                                 compatible = "fixed-partitions";
 272                                 #address-cells = <1>;
 273                                 #size-cells = <1>;
 274
 275                                 /*
 276                                  * This "RedBoot" is the Storlink derivative.
 277                                  */
 278                                 partition@0 {
 279                                         label = "RedBoot";
 280                                         reg = <0x00000000 0x00040000>;
 281                                         read-only;
 282                                 };
 283                                 /*
 284                                  * This firmware image contains the kernel catenated
 285                                  * with the squashfs root filesystem. For some reason
 286                                  * this is called "upgrade" on the vendor system.
 287                                  */
 288                                 partition@40000 {
 289                                         label = "upgrade";
 290                                         reg = <0x00040000 0x01f40000>;
 291                                         read-only;
 292                                 };
 293                                 /* RGDB, Residental Gateway Database? */
 294                                 partition@1f80000 {
 295                                         label = "rgdb";
 296                                         reg = <0x01f80000 0x00040000>;
 297                                         read-only;
 298                                 };
 299                                 /*
 300                                  * This partition contains MAC addresses for WAN,
 301                                  * WLAN and LAN, and the country code (for wireless
 302                                  * I guess).
 303                                  */
 304                                 partition@1fc0000 {
 305                                         label = "nvram";
 306                                         reg = <0x01fc0000 0x00020000>;
 307                                         read-only;
 308                                 };
 309                                 partition@1fe0000 {
 310                                         label = "LangPack";
 311                                         reg = <0x01fe0000 0x00020000>;
 312                                         read-only;
 313                                 };
 314                         };
 315                 };
 316
 317                 syscon: syscon@40000000 {
 318                         pinctrl {
 319                                 /*
 320                                  * gpio0bgrp cover line 5, 6 used by TK I2C
 321                                  * gpio0bgrp cover line 7 used by WPS LED
 322                                  * gpio0cgrp cover line 8, 13 used by keys
 323                                  *           and 11, 12 used by the HD LEDs
 324                                  *           and line 14, 15 used by RTL8366
 325                                  *           RESET and phy ready
 326                                  * gpio0egrp cover line 16 used by VDISP
 327                                  * gpio0fgrp cover line 17 used by TK IRQ
 328                                  * gpio0ggrp cover line 20 used by panel CS
 329                                  * gpio0hgrp cover line 21,22 used by RTL8366RB MDIO
 330                                  */
 331                                 gpio0_default_pins: pinctrl-gpio0 {
 332                                         mux {
 333                                                 function = "gpio0";
 334                                                 groups = "gpio0bgrp",
 335                                                 "gpio0cgrp",
 336                                                 "gpio0egrp",
 337                                                 "gpio0fgrp",
 338                                                 "gpio0hgrp";
 339                                         };
 340                                 };
 341                                 /*
 342                                  * gpio1bgrp cover line 5,8,7 used by panel SPI
 343                                  * also line 6 used by the fan
 344                                  *
 345                                  */
 346                                 gpio1_default_pins: pinctrl-gpio1 {
 347                                         mux {
 348                                                 function = "gpio1";
 349                                                 groups = "gpio1bgrp";
 350                                         };
 351                                 };
 352                                 /*
 353                                  * These GPIO groups will be mapped in over some
 354                                  * of the flash pins when the flash is not in
 355                                  * active use.
 356                                  */
 357                                 pflash_disabled_pins: pinctrl-pflash-disabled {
 358                                         mux {
 359                                                 function = "gpio0";
 360                                                 groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
 361                                                          "gpio0kgrp";
 362                                         };
 363                                 };
 364                                 pinctrl-gmii {
 365                                         mux {
 366                                                 function = "gmii";
 367                                                 groups = "gmii_gmac0_grp";
 368                                         };
 369                                         conf0 {
 370                                                 pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV",
 371                                                      "Y7 GMAC0 RXC", "Y11 GMAC1 RXC",
 372                                                      "T8 GMAC0 TXEN", "W11 GMAC1 TXEN",
 373                                                      "U8 GMAC0 TXC", "V11 GMAC1 TXC",
 374                                                      "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
 375                                                      "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
 376                                                      "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
 377                                                      "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
 378                                                      "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
 379                                                      "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
 380                                                      "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
 381                                                      "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
 382                                                 skew-delay = <7>;
 383                                         };
 384                                         /* Set up drive strength on GMAC0 to 16 mA */
 385                                         conf1 {
 386                                                 groups = "gmii_gmac0_grp";
 387                                                 drive-strength = <16>;
 388                                         };
 389                                 };
 390                         };
 391                 };
 392
 393                 sata: sata@46000000 {
 394                         cortina,gemini-ata-muxmode = <0>;
 395                         cortina,gemini-enable-sata-bridge;
 396                         status = "okay";
 397                 };
 398
 399                 gpio0: gpio@4d000000 {
 400                         pinctrl-names = "default";
 401                         pinctrl-0 = <&gpio0_default_pins>;
 402                 };
 403
 404                 gpio1: gpio@4e000000 {
 405                         pinctrl-names = "default";
 406                         pinctrl-0 = <&gpio1_default_pins>;
 407                 };
 408
 409                 pci@50000000 {
 410                         status = "okay";
 411                         interrupt-map-mask = <0xf800 0 0 7>;
 412                         interrupt-map =
 413                                 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
 414                                 <0x4800 0 0 2 &pci_intc 1>,
 415                                 <0x4800 0 0 3 &pci_intc 2>,
 416                                 <0x4800 0 0 4 &pci_intc 3>,
 417                                 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
 418                                 <0x5000 0 0 2 &pci_intc 2>,
 419                                 <0x5000 0 0 3 &pci_intc 3>,
 420                                 <0x5000 0 0 4 &pci_intc 0>,
 421                                 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
 422                                 <0x5800 0 0 2 &pci_intc 3>,
 423                                 <0x5800 0 0 3 &pci_intc 0>,
 424                                 <0x5800 0 0 4 &pci_intc 1>,
 425                                 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
 426                                 <0x6000 0 0 2 &pci_intc 0>,
 427                                 <0x6000 0 0 3 &pci_intc 1>,
 428                                 <0x6000 0 0 4 &pci_intc 2>;
 429                 };
 430
 431                 ethernet@60000000 {
 432                         status = "okay";
 433
 434                         ethernet-port@0 {
 435                                 phy-mode = "rgmii";
 436                                 fixed-link {
 437                                         speed = <1000>;
 438                                         full-duplex;
 439                                         pause;
 440                                 };
 441                         };
 442                         ethernet-port@1 {
 443                                 /* Not used in this platform */
 444                         };
 445                 };
 446
 447                 ata@63000000 {
 448                         status = "okay";
 449                 };
 450
 451                 display-controller@6a000000 {
 452                         status = "okay";
 453
 454                         port@0 {
 455                                 reg = <0>;
 456                                 display_out: endpoint {
 457                                         remote-endpoint = <&panel_in>;
 458                                 };
 459                         };
 460                 };
 461
 462                 usb@68000000 {
 463                         status = "okay";
 464                 };
 465
 466                 usb@69000000 {
 467                         status = "okay";
 468                 };
 469         };
 470 };