arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include "skeleton.dtsi"
  24
  25 / {
  26         interrupt-parent = <&gic>;
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 i2c0 = &i2c_0;
  33                 i2c1 = &i2c_1;
  34                 i2c2 = &i2c_2;
  35                 i2c3 = &i2c_3;
  36                 i2c4 = &i2c_4;
  37                 i2c5 = &i2c_5;
  38                 i2c6 = &i2c_6;
  39                 i2c7 = &i2c_7;
  40                 csis0 = &csis_0;
  41                 csis1 = &csis_1;
  42                 fimc0 = &fimc_0;
  43                 fimc1 = &fimc_1;
  44                 fimc2 = &fimc_2;
  45                 fimc3 = &fimc_3;
  46         };
  47
  48         chipid@10000000 {
  49                 compatible = "samsung,exynos4210-chipid";
  50                 reg = <0x10000000 0x100>;
  51         };
  52
  53         mipi_phy: video-phy@10020710 {
  54                 compatible = "samsung,s5pv210-mipi-video-phy";
  55                 reg = <0x10020710 8>;
  56                 #phy-cells = <1>;
  57         };
  58
  59         pd_mfc: mfc-power-domain@10023C40 {
  60                 compatible = "samsung,exynos4210-pd";
  61                 reg = <0x10023C40 0x20>;
  62         };
  63
  64         pd_g3d: g3d-power-domain@10023C60 {
  65                 compatible = "samsung,exynos4210-pd";
  66                 reg = <0x10023C60 0x20>;
  67         };
  68
  69         pd_lcd0: lcd0-power-domain@10023C80 {
  70                 compatible = "samsung,exynos4210-pd";
  71                 reg = <0x10023C80 0x20>;
  72         };
  73
  74         pd_tv: tv-power-domain@10023C20 {
  75                 compatible = "samsung,exynos4210-pd";
  76                 reg = <0x10023C20 0x20>;
  77         };
  78
  79         pd_cam: cam-power-domain@10023C00 {
  80                 compatible = "samsung,exynos4210-pd";
  81                 reg = <0x10023C00 0x20>;
  82         };
  83
  84         pd_gps: gps-power-domain@10023CE0 {
  85                 compatible = "samsung,exynos4210-pd";
  86                 reg = <0x10023CE0 0x20>;
  87         };
  88
  89         pd_gps_alive: gps-alive-power-domain@10023D00 {
  90                 compatible = "samsung,exynos4210-pd";
  91                 reg = <0x10023D00 0x20>;
  92         };
  93
  94         gic: interrupt-controller@10490000 {
  95                 compatible = "arm,cortex-a9-gic";
  96                 #interrupt-cells = <3>;
  97                 interrupt-controller;
  98                 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  99         };
 100
 101         combiner: interrupt-controller@10440000 {
 102                 compatible = "samsung,exynos4210-combiner";
 103                 #interrupt-cells = <2>;
 104                 interrupt-controller;
 105                 reg = <0x10440000 0x1000>;
 106         };
 107
 108         sys_reg: syscon@10010000 {
 109                 compatible = "samsung,exynos4-sysreg", "syscon";
 110                 reg = <0x10010000 0x400>;
 111         };
 112
 113         camera {
 114                 compatible = "samsung,fimc", "simple-bus";
 115                 status = "disabled";
 116                 #address-cells = <1>;
 117                 #size-cells = <1>;
 118                 ranges;
 119
 120                 clock_cam: clock-controller {
 121                          #clock-cells = <1>;
 122                 };
 123
 124                 fimc_0: fimc@11800000 {
 125                         compatible = "samsung,exynos4210-fimc";
 126                         reg = <0x11800000 0x1000>;
 127                         interrupts = <0 84 0>;
 128                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 129                         clock-names = "fimc", "sclk_fimc";
 130                         samsung,power-domain = <&pd_cam>;
 131                         samsung,sysreg = <&sys_reg>;
 132                         status = "disabled";
 133                 };
 134
 135                 fimc_1: fimc@11810000 {
 136                         compatible = "samsung,exynos4210-fimc";
 137                         reg = <0x11810000 0x1000>;
 138                         interrupts = <0 85 0>;
 139                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 140                         clock-names = "fimc", "sclk_fimc";
 141                         samsung,power-domain = <&pd_cam>;
 142                         samsung,sysreg = <&sys_reg>;
 143                         status = "disabled";
 144                 };
 145
 146                 fimc_2: fimc@11820000 {
 147                         compatible = "samsung,exynos4210-fimc";
 148                         reg = <0x11820000 0x1000>;
 149                         interrupts = <0 86 0>;
 150                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 151                         clock-names = "fimc", "sclk_fimc";
 152                         samsung,power-domain = <&pd_cam>;
 153                         samsung,sysreg = <&sys_reg>;
 154                         status = "disabled";
 155                 };
 156
 157                 fimc_3: fimc@11830000 {
 158                         compatible = "samsung,exynos4210-fimc";
 159                         reg = <0x11830000 0x1000>;
 160                         interrupts = <0 87 0>;
 161                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 162                         clock-names = "fimc", "sclk_fimc";
 163                         samsung,power-domain = <&pd_cam>;
 164                         samsung,sysreg = <&sys_reg>;
 165                         status = "disabled";
 166                 };
 167
 168                 csis_0: csis@11880000 {
 169                         compatible = "samsung,exynos4210-csis";
 170                         reg = <0x11880000 0x4000>;
 171                         interrupts = <0 78 0>;
 172                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 173                         clock-names = "csis", "sclk_csis";
 174                         bus-width = <4>;
 175                         samsung,power-domain = <&pd_cam>;
 176                         phys = <&mipi_phy 0>;
 177                         phy-names = "csis";
 178                         status = "disabled";
 179                         #address-cells = <1>;
 180                         #size-cells = <0>;
 181                 };
 182
 183                 csis_1: csis@11890000 {
 184                         compatible = "samsung,exynos4210-csis";
 185                         reg = <0x11890000 0x4000>;
 186                         interrupts = <0 80 0>;
 187                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 188                         clock-names = "csis", "sclk_csis";
 189                         bus-width = <2>;
 190                         samsung,power-domain = <&pd_cam>;
 191                         phys = <&mipi_phy 2>;
 192                         phy-names = "csis";
 193                         status = "disabled";
 194                         #address-cells = <1>;
 195                         #size-cells = <0>;
 196                 };
 197         };
 198
 199         watchdog@10060000 {
 200                 compatible = "samsung,s3c2410-wdt";
 201                 reg = <0x10060000 0x100>;
 202                 interrupts = <0 43 0>;
 203                 clocks = <&clock CLK_WDT>;
 204                 clock-names = "watchdog";
 205                 status = "disabled";
 206         };
 207
 208         rtc@10070000 {
 209                 compatible = "samsung,s3c6410-rtc";
 210                 reg = <0x10070000 0x100>;
 211                 interrupts = <0 44 0>, <0 45 0>;
 212                 clocks = <&clock CLK_RTC>;
 213                 clock-names = "rtc";
 214                 status = "disabled";
 215         };
 216
 217         keypad@100A0000 {
 218                 compatible = "samsung,s5pv210-keypad";
 219                 reg = <0x100A0000 0x100>;
 220                 interrupts = <0 109 0>;
 221                 clocks = <&clock CLK_KEYIF>;
 222                 clock-names = "keypad";
 223                 status = "disabled";
 224         };
 225
 226         sdhci@12510000 {
 227                 compatible = "samsung,exynos4210-sdhci";
 228                 reg = <0x12510000 0x100>;
 229                 interrupts = <0 73 0>;
 230                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 231                 clock-names = "hsmmc", "mmc_busclk.2";
 232                 status = "disabled";
 233         };
 234
 235         sdhci@12520000 {
 236                 compatible = "samsung,exynos4210-sdhci";
 237                 reg = <0x12520000 0x100>;
 238                 interrupts = <0 74 0>;
 239                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 240                 clock-names = "hsmmc", "mmc_busclk.2";
 241                 status = "disabled";
 242         };
 243
 244         sdhci@12530000 {
 245                 compatible = "samsung,exynos4210-sdhci";
 246                 reg = <0x12530000 0x100>;
 247                 interrupts = <0 75 0>;
 248                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 249                 clock-names = "hsmmc", "mmc_busclk.2";
 250                 status = "disabled";
 251         };
 252
 253         sdhci@12540000 {
 254                 compatible = "samsung,exynos4210-sdhci";
 255                 reg = <0x12540000 0x100>;
 256                 interrupts = <0 76 0>;
 257                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 258                 clock-names = "hsmmc", "mmc_busclk.2";
 259                 status = "disabled";
 260         };
 261
 262         ehci@12580000 {
 263                 compatible = "samsung,exynos4210-ehci";
 264                 reg = <0x12580000 0x100>;
 265                 interrupts = <0 70 0>;
 266                 clocks = <&clock CLK_USB_HOST>;
 267                 clock-names = "usbhost";
 268                 status = "disabled";
 269         };
 270
 271         ohci@12590000 {
 272                 compatible = "samsung,exynos4210-ohci";
 273                 reg = <0x12590000 0x100>;
 274                 interrupts = <0 70 0>;
 275                 clocks = <&clock CLK_USB_HOST>;
 276                 clock-names = "usbhost";
 277                 status = "disabled";
 278         };
 279
 280         mfc: codec@13400000 {
 281                 compatible = "samsung,mfc-v5";
 282                 reg = <0x13400000 0x10000>;
 283                 interrupts = <0 94 0>;
 284                 samsung,power-domain = <&pd_mfc>;
 285                 clocks = <&clock CLK_MFC>;
 286                 clock-names = "mfc";
 287                 status = "disabled";
 288         };
 289
 290         serial@13800000 {
 291                 compatible = "samsung,exynos4210-uart";
 292                 reg = <0x13800000 0x100>;
 293                 interrupts = <0 52 0>;
 294                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 295                 clock-names = "uart", "clk_uart_baud0";
 296                 status = "disabled";
 297         };
 298
 299         serial@13810000 {
 300                 compatible = "samsung,exynos4210-uart";
 301                 reg = <0x13810000 0x100>;
 302                 interrupts = <0 53 0>;
 303                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 304                 clock-names = "uart", "clk_uart_baud0";
 305                 status = "disabled";
 306         };
 307
 308         serial@13820000 {
 309                 compatible = "samsung,exynos4210-uart";
 310                 reg = <0x13820000 0x100>;
 311                 interrupts = <0 54 0>;
 312                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 313                 clock-names = "uart", "clk_uart_baud0";
 314                 status = "disabled";
 315         };
 316
 317         serial@13830000 {
 318                 compatible = "samsung,exynos4210-uart";
 319                 reg = <0x13830000 0x100>;
 320                 interrupts = <0 55 0>;
 321                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 322                 clock-names = "uart", "clk_uart_baud0";
 323                 status = "disabled";
 324         };
 325
 326         i2c_0: i2c@13860000 {
 327                 #address-cells = <1>;
 328                 #size-cells = <0>;
 329                 compatible = "samsung,s3c2440-i2c";
 330                 reg = <0x13860000 0x100>;
 331                 interrupts = <0 58 0>;
 332                 clocks = <&clock CLK_I2C0>;
 333                 clock-names = "i2c";
 334                 pinctrl-names = "default";
 335                 pinctrl-0 = <&i2c0_bus>;
 336                 status = "disabled";
 337         };
 338
 339         i2c_1: i2c@13870000 {
 340                 #address-cells = <1>;
 341                 #size-cells = <0>;
 342                 compatible = "samsung,s3c2440-i2c";
 343                 reg = <0x13870000 0x100>;
 344                 interrupts = <0 59 0>;
 345                 clocks = <&clock CLK_I2C1>;
 346                 clock-names = "i2c";
 347                 pinctrl-names = "default";
 348                 pinctrl-0 = <&i2c1_bus>;
 349                 status = "disabled";
 350         };
 351
 352         i2c_2: i2c@13880000 {
 353                 #address-cells = <1>;
 354                 #size-cells = <0>;
 355                 compatible = "samsung,s3c2440-i2c";
 356                 reg = <0x13880000 0x100>;
 357                 interrupts = <0 60 0>;
 358                 clocks = <&clock CLK_I2C2>;
 359                 clock-names = "i2c";
 360                 status = "disabled";
 361         };
 362
 363         i2c_3: i2c@13890000 {
 364                 #address-cells = <1>;
 365                 #size-cells = <0>;
 366                 compatible = "samsung,s3c2440-i2c";
 367                 reg = <0x13890000 0x100>;
 368                 interrupts = <0 61 0>;
 369                 clocks = <&clock CLK_I2C3>;
 370                 clock-names = "i2c";
 371                 status = "disabled";
 372         };
 373
 374         i2c_4: i2c@138A0000 {
 375                 #address-cells = <1>;
 376                 #size-cells = <0>;
 377                 compatible = "samsung,s3c2440-i2c";
 378                 reg = <0x138A0000 0x100>;
 379                 interrupts = <0 62 0>;
 380                 clocks = <&clock CLK_I2C4>;
 381                 clock-names = "i2c";
 382                 status = "disabled";
 383         };
 384
 385         i2c_5: i2c@138B0000 {
 386                 #address-cells = <1>;
 387                 #size-cells = <0>;
 388                 compatible = "samsung,s3c2440-i2c";
 389                 reg = <0x138B0000 0x100>;
 390                 interrupts = <0 63 0>;
 391                 clocks = <&clock CLK_I2C5>;
 392                 clock-names = "i2c";
 393                 status = "disabled";
 394         };
 395
 396         i2c_6: i2c@138C0000 {
 397                 #address-cells = <1>;
 398                 #size-cells = <0>;
 399                 compatible = "samsung,s3c2440-i2c";
 400                 reg = <0x138C0000 0x100>;
 401                 interrupts = <0 64 0>;
 402                 clocks = <&clock CLK_I2C6>;
 403                 clock-names = "i2c";
 404                 status = "disabled";
 405         };
 406
 407         i2c_7: i2c@138D0000 {
 408                 #address-cells = <1>;
 409                 #size-cells = <0>;
 410                 compatible = "samsung,s3c2440-i2c";
 411                 reg = <0x138D0000 0x100>;
 412                 interrupts = <0 65 0>;
 413                 clocks = <&clock CLK_I2C7>;
 414                 clock-names = "i2c";
 415                 status = "disabled";
 416         };
 417
 418         spi_0: spi@13920000 {
 419                 compatible = "samsung,exynos4210-spi";
 420                 reg = <0x13920000 0x100>;
 421                 interrupts = <0 66 0>;
 422                 dmas = <&pdma0 7>, <&pdma0 6>;
 423                 dma-names = "tx", "rx";
 424                 #address-cells = <1>;
 425                 #size-cells = <0>;
 426                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 427                 clock-names = "spi", "spi_busclk0";
 428                 pinctrl-names = "default";
 429                 pinctrl-0 = <&spi0_bus>;
 430                 status = "disabled";
 431         };
 432
 433         spi_1: spi@13930000 {
 434                 compatible = "samsung,exynos4210-spi";
 435                 reg = <0x13930000 0x100>;
 436                 interrupts = <0 67 0>;
 437                 dmas = <&pdma1 7>, <&pdma1 6>;
 438                 dma-names = "tx", "rx";
 439                 #address-cells = <1>;
 440                 #size-cells = <0>;
 441                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 442                 clock-names = "spi", "spi_busclk0";
 443                 pinctrl-names = "default";
 444                 pinctrl-0 = <&spi1_bus>;
 445                 status = "disabled";
 446         };
 447
 448         spi_2: spi@13940000 {
 449                 compatible = "samsung,exynos4210-spi";
 450                 reg = <0x13940000 0x100>;
 451                 interrupts = <0 68 0>;
 452                 dmas = <&pdma0 9>, <&pdma0 8>;
 453                 dma-names = "tx", "rx";
 454                 #address-cells = <1>;
 455                 #size-cells = <0>;
 456                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 457                 clock-names = "spi", "spi_busclk0";
 458                 pinctrl-names = "default";
 459                 pinctrl-0 = <&spi2_bus>;
 460                 status = "disabled";
 461         };
 462
 463         pwm@139D0000 {
 464                 compatible = "samsung,exynos4210-pwm";
 465                 reg = <0x139D0000 0x1000>;
 466                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 467                 clocks = <&clock CLK_PWM>;
 468                 clock-names = "timers";
 469                 #pwm-cells = <2>;
 470                 status = "disabled";
 471         };
 472
 473         amba {
 474                 #address-cells = <1>;
 475                 #size-cells = <1>;
 476                 compatible = "arm,amba-bus";
 477                 interrupt-parent = <&gic>;
 478                 ranges;
 479
 480                 pdma0: pdma@12680000 {
 481                         compatible = "arm,pl330", "arm,primecell";
 482                         reg = <0x12680000 0x1000>;
 483                         interrupts = <0 35 0>;
 484                         clocks = <&clock CLK_PDMA0>;
 485                         clock-names = "apb_pclk";
 486                         #dma-cells = <1>;
 487                         #dma-channels = <8>;
 488                         #dma-requests = <32>;
 489                 };
 490
 491                 pdma1: pdma@12690000 {
 492                         compatible = "arm,pl330", "arm,primecell";
 493                         reg = <0x12690000 0x1000>;
 494                         interrupts = <0 36 0>;
 495                         clocks = <&clock CLK_PDMA1>;
 496                         clock-names = "apb_pclk";
 497                         #dma-cells = <1>;
 498                         #dma-channels = <8>;
 499                         #dma-requests = <32>;
 500                 };
 501
 502                 mdma1: mdma@12850000 {
 503                         compatible = "arm,pl330", "arm,primecell";
 504                         reg = <0x12850000 0x1000>;
 505                         interrupts = <0 34 0>;
 506                         clocks = <&clock CLK_MDMA>;
 507                         clock-names = "apb_pclk";
 508                         #dma-cells = <1>;
 509                         #dma-channels = <8>;
 510                         #dma-requests = <1>;
 511                 };
 512         };
 513
 514         fimd: fimd@11c00000 {
 515                 compatible = "samsung,exynos4210-fimd";
 516                 interrupt-parent = <&combiner>;
 517                 reg = <0x11c00000 0x20000>;
 518                 interrupt-names = "fifo", "vsync", "lcd_sys";
 519                 interrupts = <11 0>, <11 1>, <11 2>;
 520                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 521                 clock-names = "sclk_fimd", "fimd";
 522                 samsung,power-domain = <&pd_lcd0>;
 523                 status = "disabled";
 524         };
 525 };