arch/arm/boot/dts/dra7-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5 /dts-v1/;
   6
   7 #include "dra74x.dtsi"
   8 #include "dra7-evm-common.dtsi"
   9 #include "dra74x-mmc-iodelay.dtsi"
  10
  11 / {
  12         model = "TI DRA742";
  13         compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
  14
  15         memory@0 {
  16                 device_type = "memory";
  17                 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
  18         };
  19
  20         evm_12v0: fixedregulator-evm_12v0 {
  21                 /* main supply */
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "evm_12v0";
  24                 regulator-min-microvolt = <12000000>;
  25                 regulator-max-microvolt = <12000000>;
  26                 regulator-always-on;
  27                 regulator-boot-on;
  28         };
  29
  30         evm_1v8_sw: fixedregulator-evm_1v8 {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "evm_1v8";
  33                 vin-supply = <&smps9_reg>;
  34                 regulator-min-microvolt = <1800000>;
  35                 regulator-max-microvolt = <1800000>;
  36         };
  37
  38         evm_3v3_sd: fixedregulator-sd {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "evm_3v3_sd";
  41                 regulator-min-microvolt = <3300000>;
  42                 regulator-max-microvolt = <3300000>;
  43                 enable-active-high;
  44                 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
  45         };
  46
  47         evm_3v3_sw: fixedregulator-evm_3v3_sw {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "evm_3v3_sw";
  50                 vin-supply = <&sysen1>;
  51                 regulator-min-microvolt = <3300000>;
  52                 regulator-max-microvolt = <3300000>;
  53         };
  54
  55         aic_dvdd: fixedregulator-aic_dvdd {
  56                 /* TPS77018DBVT */
  57                 compatible = "regulator-fixed";
  58                 regulator-name = "aic_dvdd";
  59                 vin-supply = <&evm_3v3_sw>;
  60                 regulator-min-microvolt = <1800000>;
  61                 regulator-max-microvolt = <1800000>;
  62         };
  63
  64         evm_3v3: fixedregulator-evm3v3 {
  65                 /* Output of Cntlr A of TPS43351-Q1 on dra7-evm */
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "evm_3v3";
  68                 regulator-min-microvolt = <3300000>;
  69                 regulator-max-microvolt = <3300000>;
  70                 vin-supply = <&evm_12v0>;
  71                 regulator-always-on;
  72                 regulator-boot-on;
  73         };
  74
  75         evm_5v0: fixedregulator-evm_5v0 {
  76                 /* Output of Cntlr B of TPS43351-Q1 on dra7-evm */
  77                 compatible = "regulator-fixed";
  78                 regulator-name = "evm_5v0";
  79                 regulator-min-microvolt = <5000000>;
  80                 regulator-max-microvolt = <5000000>;
  81                 vin-supply = <&evm_12v0>;
  82                 regulator-always-on;
  83                 regulator-boot-on;
  84         };
  85
  86         evm_3v6: fixedregulator-evm_3v6 {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "evm_3v6";
  89                 regulator-min-microvolt = <3600000>;
  90                 regulator-max-microvolt = <3600000>;
  91                 vin-supply = <&evm_5v0>;
  92                 regulator-always-on;
  93                 regulator-boot-on;
  94         };
  95
  96         vmmcwl_fixed: fixedregulator-mmcwl {
  97                 compatible = "regulator-fixed";
  98                 regulator-name = "vmmcwl_fixed";
  99                 regulator-min-microvolt = <1800000>;
 100                 regulator-max-microvolt = <1800000>;
 101                 gpio = <&gpio5 8 0>;
 102                 startup-delay-us = <70000>;
 103                 enable-active-high;
 104         };
 105
 106         vtt_fixed: fixedregulator-vtt {
 107                 compatible = "regulator-fixed";
 108                 regulator-name = "vtt_fixed";
 109                 regulator-min-microvolt = <1350000>;
 110                 regulator-max-microvolt = <1350000>;
 111                 regulator-always-on;
 112                 regulator-boot-on;
 113                 enable-active-high;
 114                 vin-supply = <&sysen2>;
 115                 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 116         };
 117
 118 };
 119
 120 &dra7_pmx_core {
 121         dcan1_pins_default: dcan1_pins_default {
 122                 pinctrl-single,pins = <
 123                         DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
 124                         DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
 125                 >;
 126         };
 127
 128         dcan1_pins_sleep: dcan1_pins_sleep {
 129                 pinctrl-single,pins = <
 130                         DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
 131                         DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
 132                 >;
 133         };
 134 };
 135
 136 &i2c1 {
 137         status = "okay";
 138         clock-frequency = <400000>;
 139
 140         tps659038: tps659038@58 {
 141                 compatible = "ti,tps659038";
 142                 reg = <0x58>;
 143                 ti,palmas-override-powerhold;
 144                 ti,system-power-controller;
 145
 146                 tps659038_pmic {
 147                         compatible = "ti,tps659038-pmic";
 148
 149                         regulators {
 150                                 smps123_reg: smps123 {
 151                                         /* VDD_MPU */
 152                                         regulator-name = "smps123";
 153                                         regulator-min-microvolt = < 850000>;
 154                                         regulator-max-microvolt = <1250000>;
 155                                         regulator-always-on;
 156                                         regulator-boot-on;
 157                                 };
 158
 159                                 smps45_reg: smps45 {
 160                                         /* VDD_DSPEVE */
 161                                         regulator-name = "smps45";
 162                                         regulator-min-microvolt = < 850000>;
 163                                         regulator-max-microvolt = <1250000>;
 164                                         regulator-always-on;
 165                                         regulator-boot-on;
 166                                 };
 167
 168                                 smps6_reg: smps6 {
 169                                         /* VDD_GPU - over VDD_SMPS6 */
 170                                         regulator-name = "smps6";
 171                                         regulator-min-microvolt = <850000>;
 172                                         regulator-max-microvolt = <1250000>;
 173                                         regulator-always-on;
 174                                         regulator-boot-on;
 175                                 };
 176
 177                                 smps7_reg: smps7 {
 178                                         /* CORE_VDD */
 179                                         regulator-name = "smps7";
 180                                         regulator-min-microvolt = <850000>;
 181                                         regulator-max-microvolt = <1150000>;
 182                                         regulator-always-on;
 183                                         regulator-boot-on;
 184                                 };
 185
 186                                 smps8_reg: smps8 {
 187                                         /* VDD_IVAHD */
 188                                         regulator-name = "smps8";
 189                                         regulator-min-microvolt = < 850000>;
 190                                         regulator-max-microvolt = <1250000>;
 191                                         regulator-always-on;
 192                                         regulator-boot-on;
 193                                 };
 194
 195                                 smps9_reg: smps9 {
 196                                         /* VDDS1V8 */
 197                                         regulator-name = "smps9";
 198                                         regulator-min-microvolt = <1800000>;
 199                                         regulator-max-microvolt = <1800000>;
 200                                         regulator-always-on;
 201                                         regulator-boot-on;
 202                                 };
 203
 204                                 ldo1_reg: ldo1 {
 205                                         /* LDO1_OUT --> SDIO  */
 206                                         regulator-name = "ldo1";
 207                                         regulator-min-microvolt = <1800000>;
 208                                         regulator-max-microvolt = <3300000>;
 209                                         regulator-always-on;
 210                                         regulator-boot-on;
 211                                 };
 212
 213                                 ldo2_reg: ldo2 {
 214                                         /* VDD_RTCIO */
 215                                         /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
 216                                         regulator-name = "ldo2";
 217                                         regulator-min-microvolt = <3300000>;
 218                                         regulator-max-microvolt = <3300000>;
 219                                         regulator-always-on;
 220                                         regulator-boot-on;
 221                                 };
 222
 223                                 ldo3_reg: ldo3 {
 224                                         /* VDDA_1V8_PHY */
 225                                         regulator-name = "ldo3";
 226                                         regulator-min-microvolt = <1800000>;
 227                                         regulator-max-microvolt = <1800000>;
 228                                         regulator-always-on;
 229                                         regulator-boot-on;
 230                                 };
 231
 232                                 ldo9_reg: ldo9 {
 233                                         /* VDD_RTC */
 234                                         regulator-name = "ldo9";
 235                                         regulator-min-microvolt = <1050000>;
 236                                         regulator-max-microvolt = <1050000>;
 237                                         regulator-always-on;
 238                                         regulator-boot-on;
 239                                         regulator-allow-bypass;
 240                                 };
 241
 242                                 ldoln_reg: ldoln {
 243                                         /* VDDA_1V8_PLL */
 244                                         regulator-name = "ldoln";
 245                                         regulator-min-microvolt = <1800000>;
 246                                         regulator-max-microvolt = <1800000>;
 247                                         regulator-always-on;
 248                                         regulator-boot-on;
 249                                 };
 250
 251                                 ldousb_reg: ldousb {
 252                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 253                                         regulator-name = "ldousb";
 254                                         regulator-min-microvolt = <3300000>;
 255                                         regulator-max-microvolt = <3300000>;
 256                                         regulator-boot-on;
 257                                 };
 258
 259                                 /* REGEN1 is unused */
 260
 261                                 regen2: regen2 {
 262                                         /* Needed for PMIC internal resources */
 263                                         regulator-name = "regen2";
 264                                         regulator-boot-on;
 265                                         regulator-always-on;
 266                                 };
 267
 268                                 /* REGEN3 is unused */
 269
 270                                 sysen1: sysen1 {
 271                                         /* PMIC_REGEN_3V3 */
 272                                         regulator-name = "sysen1";
 273                                         regulator-boot-on;
 274                                         regulator-always-on;
 275                                 };
 276
 277                                 sysen2: sysen2 {
 278                                         /* PMIC_REGEN_DDR */
 279                                         regulator-name = "sysen2";
 280                                         regulator-boot-on;
 281                                         regulator-always-on;
 282                                 };
 283                         };
 284                 };
 285         };
 286
 287         pcf_lcd: gpio@20 {
 288                 compatible = "ti,pcf8575", "nxp,pcf8575";
 289                 reg = <0x20>;
 290                 gpio-controller;
 291                 #gpio-cells = <2>;
 292                 interrupt-parent = <&gpio6>;
 293                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 294                 interrupt-controller;
 295                 #interrupt-cells = <2>;
 296         };
 297
 298         pcf_gpio_21: gpio@21 {
 299                 compatible = "ti,pcf8575", "nxp,pcf8575";
 300                 reg = <0x21>;
 301                 lines-initial-states = <0x1408>;
 302                 gpio-controller;
 303                 #gpio-cells = <2>;
 304                 interrupt-parent = <&gpio6>;
 305                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 306                 interrupt-controller;
 307                 #interrupt-cells = <2>;
 308         };
 309
 310         tlv320aic3106: tlv320aic3106@19 {
 311                 #sound-dai-cells = <0>;
 312                 compatible = "ti,tlv320aic3106";
 313                 reg = <0x19>;
 314                 adc-settle-ms = <40>;
 315                 ai3x-micbias-vg = <1>;          /* 2.0V */
 316                 status = "okay";
 317
 318                 /* Regulators */
 319                 AVDD-supply = <&evm_3v3_sw>;
 320                 IOVDD-supply = <&evm_3v3_sw>;
 321                 DRVDD-supply = <&evm_3v3_sw>;
 322                 DVDD-supply = <&aic_dvdd>;
 323         };
 324 };
 325
 326 &i2c2 {
 327         status = "okay";
 328         clock-frequency = <400000>;
 329
 330         pcf_hdmi: gpio@26 {
 331                 compatible = "ti,pcf8575", "nxp,pcf8575";
 332                 reg = <0x26>;
 333                 gpio-controller;
 334                 #gpio-cells = <2>;
 335                 p1 {
 336                         /* vin6_sel_s0: high: VIN6, low: audio */
 337                         gpio-hog;
 338                         gpios = <1 GPIO_ACTIVE_HIGH>;
 339                         output-low;
 340                         line-name = "vin6_sel_s0";
 341                 };
 342         };
 343 };
 344
 345 &mmc1 {
 346         status = "okay";
 347         vmmc-supply = <&evm_3v3_sd>;
 348         vqmmc-supply = <&ldo1_reg>;
 349         bus-width = <4>;
 350         /*
 351          * SDCD signal is not being used here - using the fact that GPIO mode
 352          * is always hardwired.
 353          */
 354         cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
 355         pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104";
 356         pinctrl-0 = <&mmc1_pins_default>;
 357         pinctrl-1 = <&mmc1_pins_hs>;
 358         pinctrl-2 = <&mmc1_pins_sdr12>;
 359         pinctrl-3 = <&mmc1_pins_sdr25>;
 360         pinctrl-4 = <&mmc1_pins_sdr50>;
 361         pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
 362         pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
 363         pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
 364         pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 365 };
 366
 367 &mmc2 {
 368         status = "okay";
 369         vmmc-supply = <&evm_1v8_sw>;
 370         vqmmc-supply = <&evm_1v8_sw>;
 371         bus-width = <8>;
 372         non-removable;
 373         pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
 374         pinctrl-0 = <&mmc2_pins_default>;
 375         pinctrl-1 = <&mmc2_pins_hs>;
 376         pinctrl-2 = <&mmc2_pins_ddr_1_8v_rev11 &mmc2_iodelay_ddr_1_8v_rev11_conf>;
 377         pinctrl-3 = <&mmc2_pins_ddr_rev20>;
 378         pinctrl-4 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev11_conf>;
 379         pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
 380 };
 381
 382 &mmc4 {
 383         status = "okay";
 384         vmmc-supply = <&evm_3v6>;
 385         vqmmc-supply = <&vmmcwl_fixed>;
 386         pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25";
 387         pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>;
 388         pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>;
 389         pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 390         pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 391         pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 392         pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 393         pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 394         pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 395 };
 396
 397 &cpu0 {
 398         vdd-supply = <&smps123_reg>;
 399 };
 400
 401 &elm {
 402         status = "okay";
 403 };
 404
 405 &gpmc {
 406         /*
 407         * For the existing IOdelay configuration via U-Boot we don't
 408         * support NAND on dra7-evm. Keep it disabled. Enabling it
 409         * requires a different configuration by U-Boot.
 410         */
 411         status = "disabled";
 412         ranges = <0 0 0x08000000 0x01000000>;   /* minimum GPMC partition = 16MB */
 413         nand@0,0 {
 414                 compatible = "ti,omap2-nand";
 415                 reg = <0 0 4>;          /* device IO registers */
 416                 interrupt-parent = <&gpmc>;
 417                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 418                              <1 IRQ_TYPE_NONE>; /* termcount */
 419                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 420                 ti,nand-xfer-type = "prefetch-dma";
 421                 ti,nand-ecc-opt = "bch8";
 422                 ti,elm-id = <&elm>;
 423                 nand-bus-width = <16>;
 424                 gpmc,device-width = <2>;
 425                 gpmc,sync-clk-ps = <0>;
 426                 gpmc,cs-on-ns = <0>;
 427                 gpmc,cs-rd-off-ns = <80>;
 428                 gpmc,cs-wr-off-ns = <80>;
 429                 gpmc,adv-on-ns = <0>;
 430                 gpmc,adv-rd-off-ns = <60>;
 431                 gpmc,adv-wr-off-ns = <60>;
 432                 gpmc,we-on-ns = <10>;
 433                 gpmc,we-off-ns = <50>;
 434                 gpmc,oe-on-ns = <4>;
 435                 gpmc,oe-off-ns = <40>;
 436                 gpmc,access-ns = <40>;
 437                 gpmc,wr-access-ns = <80>;
 438                 gpmc,rd-cycle-ns = <80>;
 439                 gpmc,wr-cycle-ns = <80>;
 440                 gpmc,bus-turnaround-ns = <0>;
 441                 gpmc,cycle2cycle-delay-ns = <0>;
 442                 gpmc,clk-activation-ns = <0>;
 443                 gpmc,wr-data-mux-bus-ns = <0>;
 444                 /* MTD partition table */
 445                 /* All SPL-* partitions are sized to minimal length
 446                  * which can be independently programmable. For
 447                  * NAND flash this is equal to size of erase-block */
 448                 #address-cells = <1>;
 449                 #size-cells = <1>;
 450                 partition@0 {
 451                         label = "NAND.SPL";
 452                         reg = <0x00000000 0x000020000>;
 453                 };
 454                 partition@1 {
 455                         label = "NAND.SPL.backup1";
 456                         reg = <0x00020000 0x00020000>;
 457                 };
 458                 partition@2 {
 459                         label = "NAND.SPL.backup2";
 460                         reg = <0x00040000 0x00020000>;
 461                 };
 462                 partition@3 {
 463                         label = "NAND.SPL.backup3";
 464                         reg = <0x00060000 0x00020000>;
 465                 };
 466                 partition@4 {
 467                         label = "NAND.u-boot-spl-os";
 468                         reg = <0x00080000 0x00040000>;
 469                 };
 470                 partition@5 {
 471                         label = "NAND.u-boot";
 472                         reg = <0x000c0000 0x00100000>;
 473                 };
 474                 partition@6 {
 475                         label = "NAND.u-boot-env";
 476                         reg = <0x001c0000 0x00020000>;
 477                 };
 478                 partition@7 {
 479                         label = "NAND.u-boot-env.backup1";
 480                         reg = <0x001e0000 0x00020000>;
 481                 };
 482                 partition@8 {
 483                         label = "NAND.kernel";
 484                         reg = <0x00200000 0x00800000>;
 485                 };
 486                 partition@9 {
 487                         label = "NAND.file-system";
 488                         reg = <0x00a00000 0x0f600000>;
 489                 };
 490         };
 491 };
 492
 493 &usb2_phy1 {
 494         phy-supply = <&ldousb_reg>;
 495 };
 496
 497 &usb2_phy2 {
 498         phy-supply = <&ldousb_reg>;
 499 };
 500
 501 &gpio7_target {
 502         ti,no-reset-on-init;
 503         ti,no-idle-on-init;
 504 };
 505
 506 &mac {
 507         status = "okay";
 508         dual_emac;
 509 };
 510
 511 &cpsw_emac0 {
 512         phy-handle = <&ethphy0>;
 513         phy-mode = "rgmii";
 514         dual_emac_res_vlan = <1>;
 515 };
 516
 517 &cpsw_emac1 {
 518         phy-handle = <&ethphy1>;
 519         phy-mode = "rgmii";
 520         dual_emac_res_vlan = <2>;
 521 };
 522
 523 &davinci_mdio {
 524         ethphy0: ethernet-phy@2 {
 525                 reg = <2>;
 526         };
 527
 528         ethphy1: ethernet-phy@3 {
 529                 reg = <3>;
 530         };
 531 };
 532
 533 &dcan1 {
 534         status = "ok";
 535         pinctrl-names = "default", "sleep", "active";
 536         pinctrl-0 = <&dcan1_pins_sleep>;
 537         pinctrl-1 = <&dcan1_pins_sleep>;
 538         pinctrl-2 = <&dcan1_pins_default>;
 539 };