arch/arm/boot/dts/dra7-evm.dts

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "dra74x.dtsi"
  11 #include "dra7-evm-common.dtsi"
  12 #include "dra74x-mmc-iodelay.dtsi"
  13
  14 / {
  15         model = "TI DRA742";
  16         compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
  17
  18         memory@0 {
  19                 device_type = "memory";
  20                 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
  21         };
  22
  23         evm_12v0: fixedregulator-evm_12v0 {
  24                 /* main supply */
  25                 compatible = "regulator-fixed";
  26                 regulator-name = "evm_12v0";
  27                 regulator-min-microvolt = <12000000>;
  28                 regulator-max-microvolt = <12000000>;
  29                 regulator-always-on;
  30                 regulator-boot-on;
  31         };
  32
  33         evm_1v8_sw: fixedregulator-evm_1v8 {
  34                 compatible = "regulator-fixed";
  35                 regulator-name = "evm_1v8";
  36                 vin-supply = <&smps9_reg>;
  37                 regulator-min-microvolt = <1800000>;
  38                 regulator-max-microvolt = <1800000>;
  39         };
  40
  41         evm_3v3_sd: fixedregulator-sd {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "evm_3v3_sd";
  44                 regulator-min-microvolt = <3300000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 enable-active-high;
  47                 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
  48         };
  49
  50         evm_3v3_sw: fixedregulator-evm_3v3_sw {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "evm_3v3_sw";
  53                 vin-supply = <&sysen1>;
  54                 regulator-min-microvolt = <3300000>;
  55                 regulator-max-microvolt = <3300000>;
  56         };
  57
  58         aic_dvdd: fixedregulator-aic_dvdd {
  59                 /* TPS77018DBVT */
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "aic_dvdd";
  62                 vin-supply = <&evm_3v3_sw>;
  63                 regulator-min-microvolt = <1800000>;
  64                 regulator-max-microvolt = <1800000>;
  65         };
  66
  67         evm_3v3: fixedregulator-evm3v3 {
  68                 /* Output of Cntlr A of TPS43351-Q1 on dra7-evm */
  69                 compatible = "regulator-fixed";
  70                 regulator-name = "evm_3v3";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73                 vin-supply = <&evm_12v0>;
  74                 regulator-always-on;
  75                 regulator-boot-on;
  76         };
  77
  78         evm_5v0: fixedregulator-evm_5v0 {
  79                 /* Output of Cntlr B of TPS43351-Q1 on dra7-evm */
  80                 compatible = "regulator-fixed";
  81                 regulator-name = "evm_5v0";
  82                 regulator-min-microvolt = <5000000>;
  83                 regulator-max-microvolt = <5000000>;
  84                 vin-supply = <&evm_12v0>;
  85                 regulator-always-on;
  86                 regulator-boot-on;
  87         };
  88
  89         evm_3v6: fixedregulator-evm_3v6 {
  90                 compatible = "regulator-fixed";
  91                 regulator-name = "evm_3v6";
  92                 regulator-min-microvolt = <3600000>;
  93                 regulator-max-microvolt = <3600000>;
  94                 vin-supply = <&evm_5v0>;
  95                 regulator-always-on;
  96                 regulator-boot-on;
  97         };
  98
  99         vmmcwl_fixed: fixedregulator-mmcwl {
 100                 compatible = "regulator-fixed";
 101                 regulator-name = "vmmcwl_fixed";
 102                 regulator-min-microvolt = <1800000>;
 103                 regulator-max-microvolt = <1800000>;
 104                 gpio = <&gpio5 8 0>;
 105                 startup-delay-us = <70000>;
 106                 enable-active-high;
 107         };
 108
 109         extcon_usb2: extcon_usb2 {
 110                 compatible = "linux,extcon-usb-gpio";
 111                 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
 112         };
 113
 114         vtt_fixed: fixedregulator-vtt {
 115                 compatible = "regulator-fixed";
 116                 regulator-name = "vtt_fixed";
 117                 regulator-min-microvolt = <1350000>;
 118                 regulator-max-microvolt = <1350000>;
 119                 regulator-always-on;
 120                 regulator-boot-on;
 121                 enable-active-high;
 122                 vin-supply = <&sysen2>;
 123                 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 124         };
 125
 126 };
 127
 128 &dra7_pmx_core {
 129         dcan1_pins_default: dcan1_pins_default {
 130                 pinctrl-single,pins = <
 131                         DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
 132                         DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
 133                 >;
 134         };
 135
 136         dcan1_pins_sleep: dcan1_pins_sleep {
 137                 pinctrl-single,pins = <
 138                         DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
 139                         DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
 140                 >;
 141         };
 142 };
 143
 144 &i2c1 {
 145         status = "okay";
 146         clock-frequency = <400000>;
 147
 148         tps659038: tps659038@58 {
 149                 compatible = "ti,tps659038";
 150                 reg = <0x58>;
 151                 ti,palmas-override-powerhold;
 152                 ti,system-power-controller;
 153
 154                 tps659038_pmic {
 155                         compatible = "ti,tps659038-pmic";
 156
 157                         regulators {
 158                                 smps123_reg: smps123 {
 159                                         /* VDD_MPU */
 160                                         regulator-name = "smps123";
 161                                         regulator-min-microvolt = < 850000>;
 162                                         regulator-max-microvolt = <1250000>;
 163                                         regulator-always-on;
 164                                         regulator-boot-on;
 165                                 };
 166
 167                                 smps45_reg: smps45 {
 168                                         /* VDD_DSPEVE */
 169                                         regulator-name = "smps45";
 170                                         regulator-min-microvolt = < 850000>;
 171                                         regulator-max-microvolt = <1250000>;
 172                                         regulator-always-on;
 173                                         regulator-boot-on;
 174                                 };
 175
 176                                 smps6_reg: smps6 {
 177                                         /* VDD_GPU - over VDD_SMPS6 */
 178                                         regulator-name = "smps6";
 179                                         regulator-min-microvolt = <850000>;
 180                                         regulator-max-microvolt = <1250000>;
 181                                         regulator-always-on;
 182                                         regulator-boot-on;
 183                                 };
 184
 185                                 smps7_reg: smps7 {
 186                                         /* CORE_VDD */
 187                                         regulator-name = "smps7";
 188                                         regulator-min-microvolt = <850000>;
 189                                         regulator-max-microvolt = <1150000>;
 190                                         regulator-always-on;
 191                                         regulator-boot-on;
 192                                 };
 193
 194                                 smps8_reg: smps8 {
 195                                         /* VDD_IVAHD */
 196                                         regulator-name = "smps8";
 197                                         regulator-min-microvolt = < 850000>;
 198                                         regulator-max-microvolt = <1250000>;
 199                                         regulator-always-on;
 200                                         regulator-boot-on;
 201                                 };
 202
 203                                 smps9_reg: smps9 {
 204                                         /* VDDS1V8 */
 205                                         regulator-name = "smps9";
 206                                         regulator-min-microvolt = <1800000>;
 207                                         regulator-max-microvolt = <1800000>;
 208                                         regulator-always-on;
 209                                         regulator-boot-on;
 210                                 };
 211
 212                                 ldo1_reg: ldo1 {
 213                                         /* LDO1_OUT --> SDIO  */
 214                                         regulator-name = "ldo1";
 215                                         regulator-min-microvolt = <1800000>;
 216                                         regulator-max-microvolt = <3300000>;
 217                                         regulator-always-on;
 218                                         regulator-boot-on;
 219                                 };
 220
 221                                 ldo2_reg: ldo2 {
 222                                         /* VDD_RTCIO */
 223                                         /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
 224                                         regulator-name = "ldo2";
 225                                         regulator-min-microvolt = <3300000>;
 226                                         regulator-max-microvolt = <3300000>;
 227                                         regulator-always-on;
 228                                         regulator-boot-on;
 229                                 };
 230
 231                                 ldo3_reg: ldo3 {
 232                                         /* VDDA_1V8_PHY */
 233                                         regulator-name = "ldo3";
 234                                         regulator-min-microvolt = <1800000>;
 235                                         regulator-max-microvolt = <1800000>;
 236                                         regulator-always-on;
 237                                         regulator-boot-on;
 238                                 };
 239
 240                                 ldo9_reg: ldo9 {
 241                                         /* VDD_RTC */
 242                                         regulator-name = "ldo9";
 243                                         regulator-min-microvolt = <1050000>;
 244                                         regulator-max-microvolt = <1050000>;
 245                                         regulator-always-on;
 246                                         regulator-boot-on;
 247                                         regulator-allow-bypass;
 248                                 };
 249
 250                                 ldoln_reg: ldoln {
 251                                         /* VDDA_1V8_PLL */
 252                                         regulator-name = "ldoln";
 253                                         regulator-min-microvolt = <1800000>;
 254                                         regulator-max-microvolt = <1800000>;
 255                                         regulator-always-on;
 256                                         regulator-boot-on;
 257                                 };
 258
 259                                 ldousb_reg: ldousb {
 260                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 261                                         regulator-name = "ldousb";
 262                                         regulator-min-microvolt = <3300000>;
 263                                         regulator-max-microvolt = <3300000>;
 264                                         regulator-boot-on;
 265                                 };
 266
 267                                 /* REGEN1 is unused */
 268
 269                                 regen2: regen2 {
 270                                         /* Needed for PMIC internal resources */
 271                                         regulator-name = "regen2";
 272                                         regulator-boot-on;
 273                                         regulator-always-on;
 274                                 };
 275
 276                                 /* REGEN3 is unused */
 277
 278                                 sysen1: sysen1 {
 279                                         /* PMIC_REGEN_3V3 */
 280                                         regulator-name = "sysen1";
 281                                         regulator-boot-on;
 282                                         regulator-always-on;
 283                                 };
 284
 285                                 sysen2: sysen2 {
 286                                         /* PMIC_REGEN_DDR */
 287                                         regulator-name = "sysen2";
 288                                         regulator-boot-on;
 289                                         regulator-always-on;
 290                                 };
 291                         };
 292                 };
 293         };
 294
 295         pcf_lcd: gpio@20 {
 296                 compatible = "ti,pcf8575", "nxp,pcf8575";
 297                 reg = <0x20>;
 298                 gpio-controller;
 299                 #gpio-cells = <2>;
 300                 interrupt-parent = <&gpio6>;
 301                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 302                 interrupt-controller;
 303                 #interrupt-cells = <2>;
 304         };
 305
 306         pcf_gpio_21: gpio@21 {
 307                 compatible = "ti,pcf8575", "nxp,pcf8575";
 308                 reg = <0x21>;
 309                 lines-initial-states = <0x1408>;
 310                 gpio-controller;
 311                 #gpio-cells = <2>;
 312                 interrupt-parent = <&gpio6>;
 313                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 314                 interrupt-controller;
 315                 #interrupt-cells = <2>;
 316         };
 317
 318         tlv320aic3106: tlv320aic3106@19 {
 319                 #sound-dai-cells = <0>;
 320                 compatible = "ti,tlv320aic3106";
 321                 reg = <0x19>;
 322                 adc-settle-ms = <40>;
 323                 ai3x-micbias-vg = <1>;          /* 2.0V */
 324                 status = "okay";
 325
 326                 /* Regulators */
 327                 AVDD-supply = <&evm_3v3_sw>;
 328                 IOVDD-supply = <&evm_3v3_sw>;
 329                 DRVDD-supply = <&evm_3v3_sw>;
 330                 DVDD-supply = <&aic_dvdd>;
 331         };
 332 };
 333
 334 &i2c2 {
 335         status = "okay";
 336         clock-frequency = <400000>;
 337
 338         pcf_hdmi: gpio@26 {
 339                 compatible = "ti,pcf8575", "nxp,pcf8575";
 340                 reg = <0x26>;
 341                 gpio-controller;
 342                 #gpio-cells = <2>;
 343                 p1 {
 344                         /* vin6_sel_s0: high: VIN6, low: audio */
 345                         gpio-hog;
 346                         gpios = <1 GPIO_ACTIVE_HIGH>;
 347                         output-low;
 348                         line-name = "vin6_sel_s0";
 349                 };
 350         };
 351 };
 352
 353 &mmc1 {
 354         status = "okay";
 355         vmmc-supply = <&evm_3v3_sd>;
 356         vqmmc-supply = <&ldo1_reg>;
 357         bus-width = <4>;
 358         /*
 359          * SDCD signal is not being used here - using the fact that GPIO mode
 360          * is always hardwired.
 361          */
 362         cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
 363         pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104";
 364         pinctrl-0 = <&mmc1_pins_default>;
 365         pinctrl-1 = <&mmc1_pins_hs>;
 366         pinctrl-2 = <&mmc1_pins_sdr12>;
 367         pinctrl-3 = <&mmc1_pins_sdr25>;
 368         pinctrl-4 = <&mmc1_pins_sdr50>;
 369         pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
 370         pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
 371         pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
 372         pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 373 };
 374
 375 &mmc2 {
 376         status = "okay";
 377         vmmc-supply = <&evm_1v8_sw>;
 378         vqmmc-supply = <&evm_1v8_sw>;
 379         bus-width = <8>;
 380         non-removable;
 381         pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
 382         pinctrl-0 = <&mmc2_pins_default>;
 383         pinctrl-1 = <&mmc2_pins_hs>;
 384         pinctrl-2 = <&mmc2_pins_ddr_1_8v_rev11 &mmc2_iodelay_ddr_1_8v_rev11_conf>;
 385         pinctrl-3 = <&mmc2_pins_ddr_rev20>;
 386         pinctrl-4 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev11_conf>;
 387         pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
 388 };
 389
 390 &mmc4 {
 391         status = "okay";
 392         vmmc-supply = <&evm_3v6>;
 393         vqmmc-supply = <&vmmcwl_fixed>;
 394         pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25";
 395         pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>;
 396         pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>;
 397         pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 398         pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 399         pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 400         pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 401         pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
 402         pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
 403 };
 404
 405 &cpu0 {
 406         vdd-supply = <&smps123_reg>;
 407 };
 408
 409 &omap_dwc3_2 {
 410         extcon = <&extcon_usb2>;
 411 };
 412
 413 &elm {
 414         status = "okay";
 415 };
 416
 417 &gpmc {
 418         /*
 419         * For the existing IOdelay configuration via U-Boot we don't
 420         * support NAND on dra7-evm. Keep it disabled. Enabling it
 421         * requires a different configuration by U-Boot.
 422         */
 423         status = "disabled";
 424         ranges = <0 0 0x08000000 0x01000000>;   /* minimum GPMC partition = 16MB */
 425         nand@0,0 {
 426                 compatible = "ti,omap2-nand";
 427                 reg = <0 0 4>;          /* device IO registers */
 428                 interrupt-parent = <&gpmc>;
 429                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 430                              <1 IRQ_TYPE_NONE>; /* termcount */
 431                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
 432                 ti,nand-xfer-type = "prefetch-dma";
 433                 ti,nand-ecc-opt = "bch8";
 434                 ti,elm-id = <&elm>;
 435                 nand-bus-width = <16>;
 436                 gpmc,device-width = <2>;
 437                 gpmc,sync-clk-ps = <0>;
 438                 gpmc,cs-on-ns = <0>;
 439                 gpmc,cs-rd-off-ns = <80>;
 440                 gpmc,cs-wr-off-ns = <80>;
 441                 gpmc,adv-on-ns = <0>;
 442                 gpmc,adv-rd-off-ns = <60>;
 443                 gpmc,adv-wr-off-ns = <60>;
 444                 gpmc,we-on-ns = <10>;
 445                 gpmc,we-off-ns = <50>;
 446                 gpmc,oe-on-ns = <4>;
 447                 gpmc,oe-off-ns = <40>;
 448                 gpmc,access-ns = <40>;
 449                 gpmc,wr-access-ns = <80>;
 450                 gpmc,rd-cycle-ns = <80>;
 451                 gpmc,wr-cycle-ns = <80>;
 452                 gpmc,bus-turnaround-ns = <0>;
 453                 gpmc,cycle2cycle-delay-ns = <0>;
 454                 gpmc,clk-activation-ns = <0>;
 455                 gpmc,wr-data-mux-bus-ns = <0>;
 456                 /* MTD partition table */
 457                 /* All SPL-* partitions are sized to minimal length
 458                  * which can be independently programmable. For
 459                  * NAND flash this is equal to size of erase-block */
 460                 #address-cells = <1>;
 461                 #size-cells = <1>;
 462                 partition@0 {
 463                         label = "NAND.SPL";
 464                         reg = <0x00000000 0x000020000>;
 465                 };
 466                 partition@1 {
 467                         label = "NAND.SPL.backup1";
 468                         reg = <0x00020000 0x00020000>;
 469                 };
 470                 partition@2 {
 471                         label = "NAND.SPL.backup2";
 472                         reg = <0x00040000 0x00020000>;
 473                 };
 474                 partition@3 {
 475                         label = "NAND.SPL.backup3";
 476                         reg = <0x00060000 0x00020000>;
 477                 };
 478                 partition@4 {
 479                         label = "NAND.u-boot-spl-os";
 480                         reg = <0x00080000 0x00040000>;
 481                 };
 482                 partition@5 {
 483                         label = "NAND.u-boot";
 484                         reg = <0x000c0000 0x00100000>;
 485                 };
 486                 partition@6 {
 487                         label = "NAND.u-boot-env";
 488                         reg = <0x001c0000 0x00020000>;
 489                 };
 490                 partition@7 {
 491                         label = "NAND.u-boot-env.backup1";
 492                         reg = <0x001e0000 0x00020000>;
 493                 };
 494                 partition@8 {
 495                         label = "NAND.kernel";
 496                         reg = <0x00200000 0x00800000>;
 497                 };
 498                 partition@9 {
 499                         label = "NAND.file-system";
 500                         reg = <0x00a00000 0x0f600000>;
 501                 };
 502         };
 503 };
 504
 505 &usb2_phy1 {
 506         phy-supply = <&ldousb_reg>;
 507 };
 508
 509 &usb2_phy2 {
 510         phy-supply = <&ldousb_reg>;
 511 };
 512
 513 &gpio7 {
 514         ti,no-reset-on-init;
 515         ti,no-idle-on-init;
 516 };
 517
 518 &mac {
 519         status = "okay";
 520         dual_emac;
 521 };
 522
 523 &cpsw_emac0 {
 524         phy_id = <&davinci_mdio>, <2>;
 525         phy-mode = "rgmii";
 526         dual_emac_res_vlan = <1>;
 527 };
 528
 529 &cpsw_emac1 {
 530         phy_id = <&davinci_mdio>, <3>;
 531         phy-mode = "rgmii";
 532         dual_emac_res_vlan = <2>;
 533 };
 534
 535 &dcan1 {
 536         status = "ok";
 537         pinctrl-names = "default", "sleep", "active";
 538         pinctrl-0 = <&dcan1_pins_sleep>;
 539         pinctrl-1 = <&dcan1_pins_sleep>;
 540         pinctrl-2 = <&dcan1_pins_default>;
 541 };