2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/dm814x.h>
11 compatible = "ti,dm814";
12 interrupt-parent = <&intc>;
23 ethernet0 = &cpsw_emac0;
24 ethernet1 = &cpsw_emac1;
35 compatible = "arm,cortex-a8";
42 compatible = "arm,cortex-a8-pmu";
47 * The soc node represents the soc top level view. It is used for IPs
48 * that are not memory mapped in the MPU view or for the MPU itself.
51 compatible = "ti,omap-infra";
53 compatible = "ti,omap3-mpu";
59 compatible = "simple-bus";
63 ti,hwmods = "l3_main";
66 compatible = "ti,am33xx-usb";
67 reg = <0x47400000 0x1000>;
71 ti,hwmods = "usb_otg_hs";
73 usb0_phy: usb-phy@47401300 {
74 compatible = "ti,am335x-usb-phy";
75 reg = <0x47401300 0x100>;
77 ti,ctrl_mod = <&usb_ctrl_mod>;
82 compatible = "ti,musb-am33xx";
83 reg = <0x47401400 0x400
85 reg-names = "mc", "control";
88 interrupt-names = "mc";
90 mentor,multipoint = <1>;
91 mentor,num-eps = <16>;
92 mentor,ram-bits = <12>;
96 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
97 &cppi41dma 2 0 &cppi41dma 3 0
98 &cppi41dma 4 0 &cppi41dma 5 0
99 &cppi41dma 6 0 &cppi41dma 7 0
100 &cppi41dma 8 0 &cppi41dma 9 0
101 &cppi41dma 10 0 &cppi41dma 11 0
102 &cppi41dma 12 0 &cppi41dma 13 0
103 &cppi41dma 14 0 &cppi41dma 0 1
104 &cppi41dma 1 1 &cppi41dma 2 1
105 &cppi41dma 3 1 &cppi41dma 4 1
106 &cppi41dma 5 1 &cppi41dma 6 1
107 &cppi41dma 7 1 &cppi41dma 8 1
108 &cppi41dma 9 1 &cppi41dma 10 1
109 &cppi41dma 11 1 &cppi41dma 12 1
110 &cppi41dma 13 1 &cppi41dma 14 1>;
112 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
113 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
115 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
116 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
121 compatible = "ti,musb-am33xx";
122 reg = <0x47401c00 0x400
124 reg-names = "mc", "control";
126 interrupt-names = "mc";
128 mentor,multipoint = <1>;
129 mentor,num-eps = <16>;
130 mentor,ram-bits = <12>;
131 mentor,power = <500>;
134 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
135 &cppi41dma 17 0 &cppi41dma 18 0
136 &cppi41dma 19 0 &cppi41dma 20 0
137 &cppi41dma 21 0 &cppi41dma 22 0
138 &cppi41dma 23 0 &cppi41dma 24 0
139 &cppi41dma 25 0 &cppi41dma 26 0
140 &cppi41dma 27 0 &cppi41dma 28 0
141 &cppi41dma 29 0 &cppi41dma 15 1
142 &cppi41dma 16 1 &cppi41dma 17 1
143 &cppi41dma 18 1 &cppi41dma 19 1
144 &cppi41dma 20 1 &cppi41dma 21 1
145 &cppi41dma 22 1 &cppi41dma 23 1
146 &cppi41dma 24 1 &cppi41dma 25 1
147 &cppi41dma 26 1 &cppi41dma 27 1
148 &cppi41dma 28 1 &cppi41dma 29 1>;
150 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
151 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
153 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
154 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
158 cppi41dma: dma-controller@47402000 {
159 compatible = "ti,am3359-cppi41";
160 reg = <0x47400000 0x1000
164 reg-names = "glue", "controller", "scheduler", "queuemgr";
166 interrupt-names = "glue";
168 #dma-channels = <30>;
169 #dma-requests = <256>;
174 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
175 * It shows the module target agent registers though, so the
176 * actual device is typically 0x1000 before the target agent
177 * except in cases where the module is larger than 0x1000.
179 l4ls: l4ls@48000000 {
180 compatible = "ti,dm814-l4ls", "simple-bus";
181 #address-cells = <1>;
183 ranges = <0 0x48000000 0x2000000>;
186 compatible = "ti,omap4-i2c";
187 #address-cells = <1>;
190 reg = <0x28000 0x1000>;
195 compatible = "ti,814-elm";
197 reg = <0x80000 0x2000>;
202 compatible = "ti,omap4-gpio";
205 reg = <0x32000 0x2000>;
209 interrupt-controller;
210 #interrupt-cells = <2>;
214 compatible = "ti,omap4-gpio";
217 reg = <0x4c000 0x2000>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
226 compatible = "ti,omap4-i2c";
227 #address-cells = <1>;
230 reg = <0x2a000 0x1000>;
235 compatible = "ti,omap4-mcspi";
236 reg = <0x30000 0x1000>;
237 #address-cells = <1>;
241 ti,hwmods = "mcspi1";
242 dmas = <&edma 16 0 &edma 17 0
243 &edma 18 0 &edma 19 0>;
244 dma-names = "tx0", "rx0", "tx1", "rx1";
247 timer1: timer@2e000 {
248 compatible = "ti,dm814-timer";
249 reg = <0x2e000 0x2000>;
251 ti,hwmods = "timer1";
256 compatible = "ti,am3352-uart", "ti,omap3-uart";
258 reg = <0x20000 0x2000>;
259 clock-frequency = <48000000>;
261 dmas = <&edma 26 0 &edma 27 0>;
262 dma-names = "tx", "rx";
266 compatible = "ti,am3352-uart", "ti,omap3-uart";
268 reg = <0x22000 0x2000>;
269 clock-frequency = <48000000>;
271 dmas = <&edma 28 0 &edma 29 0>;
272 dma-names = "tx", "rx";
276 compatible = "ti,am3352-uart", "ti,omap3-uart";
278 reg = <0x24000 0x2000>;
279 clock-frequency = <48000000>;
281 dmas = <&edma 30 0 &edma 31 0>;
282 dma-names = "tx", "rx";
285 timer2: timer@40000 {
286 compatible = "ti,dm814-timer";
287 reg = <0x40000 0x2000>;
289 ti,hwmods = "timer2";
292 timer3: timer@42000 {
293 compatible = "ti,dm814-timer";
294 reg = <0x42000 0x2000>;
296 ti,hwmods = "timer3";
300 compatible = "ti,omap4-hsmmc";
304 dma-names = "tx", "rx";
306 interrupt-parent = <&intc>;
307 reg = <0x60000 0x1000>;
311 compatible = "ti,am3352-rtc", "ti,da830-rtc";
312 reg = <0xc0000 0x1000>;
313 interrupts = <75 76>;
318 compatible = "ti,omap4-hsmmc";
322 dma-names = "tx", "rx";
324 interrupt-parent = <&intc>;
325 reg = <0x1d8000 0x1000>;
328 control: control@140000 {
329 compatible = "ti,dm814-scm", "simple-bus";
330 reg = <0x140000 0x20000>;
331 #address-cells = <1>;
333 ranges = <0 0x140000 0x20000>;
335 scm_conf: scm_conf@0 {
336 compatible = "syscon", "simple-bus";
338 #address-cells = <1>;
340 ranges = <0 0 0x800>;
343 #address-cells = <1>;
347 scm_clockdomains: clockdomains {
351 usb_ctrl_mod: control@620 {
352 compatible = "ti,am335x-usb-ctrl-module";
355 reg-names = "phy_ctrl", "wakeup";
358 edma_xbar: dma-router@f90 {
359 compatible = "ti,am335x-edma-crossbar";
363 dma-masters = <&edma>;
367 * Note that silicon revision 2.1 and older
368 * require input enabled (bit 18 set) for all
369 * 3.3V I/Os to avoid cumulative hardware damage.
370 * For more info, see errata advisory 2.1.87.
371 * We leave bit 18 out of function-mask and rely
372 * on the bootloader for it.
374 pincntl: pinmux@800 {
375 compatible = "pinctrl-single";
377 #address-cells = <1>;
379 #pinctrl-cells = <1>;
380 pinctrl-single,register-width = <32>;
381 pinctrl-single,function-mask = <0x307ff>;
384 usb1_phy: usb-phy@1b00 {
385 compatible = "ti,am335x-usb-phy";
386 reg = <0x1b00 0x100>;
388 ti,ctrl_mod = <&usb_ctrl_mod>;
394 compatible = "ti,dm814-prcm", "simple-bus";
395 reg = <0x180000 0x2000>;
396 #address-cells = <1>;
398 ranges = <0 0x180000 0x2000>;
400 prcm_clocks: clocks {
401 #address-cells = <1>;
405 prcm_clockdomains: clockdomains {
409 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
410 pllss: pllss@1c5000 {
411 compatible = "ti,dm814-pllss", "simple-bus";
412 reg = <0x1c5000 0x1000>;
413 #address-cells = <1>;
415 ranges = <0 0x1c5000 0x1000>;
417 pllss_clocks: clocks {
418 #address-cells = <1>;
422 pllss_clockdomains: clockdomains {
427 compatible = "ti,omap3-wdt";
428 ti,hwmods = "wd_timer";
429 reg = <0x1c7000 0x1000>;
434 intc: interrupt-controller@48200000 {
435 compatible = "ti,dm814-intc";
436 interrupt-controller;
437 #interrupt-cells = <1>;
438 reg = <0x48200000 0x1000>;
441 /* Board must configure evtmux with edma_xbar for EDMA */
443 compatible = "ti,omap4-hsmmc";
446 interrupt-parent = <&intc>;
447 reg = <0x47810000 0x1000>;
450 edma: edma@49000000 {
451 compatible = "ti,edma3-tpcc";
453 reg = <0x49000000 0x10000>;
454 reg-names = "edma3_cc";
455 interrupts = <12 13 14>;
456 interrupt-names = "edma3_ccint", "edma3_mperr",
461 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
462 <&edma_tptc2 3>, <&edma_tptc3 0>;
464 ti,edma-memcpy-channels = <20 21>;
467 edma_tptc0: tptc@49800000 {
468 compatible = "ti,edma3-tptc";
470 reg = <0x49800000 0x100000>;
472 interrupt-names = "edma3_tcerrint";
475 edma_tptc1: tptc@49900000 {
476 compatible = "ti,edma3-tptc";
478 reg = <0x49900000 0x100000>;
480 interrupt-names = "edma3_tcerrint";
483 edma_tptc2: tptc@49a00000 {
484 compatible = "ti,edma3-tptc";
486 reg = <0x49a00000 0x100000>;
488 interrupt-names = "edma3_tcerrint";
491 edma_tptc3: tptc@49b00000 {
492 compatible = "ti,edma3-tptc";
494 reg = <0x49b00000 0x100000>;
496 interrupt-names = "edma3_tcerrint";
499 /* See TRM "Table 1-318. L4HS Instance Summary" */
500 l4hs: l4hs@4a000000 {
501 compatible = "ti,dm814-l4hs", "simple-bus";
502 #address-cells = <1>;
504 ranges = <0 0x4a000000 0x1b4040>;
507 /* REVISIT: Move to live under l4hs once driver is fixed */
508 mac: ethernet@4a100000 {
509 compatible = "ti,cpsw";
510 ti,hwmods = "cpgmac0";
511 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
512 clock-names = "fck", "cpts";
513 cpdma_channels = <8>;
514 ale_entries = <1024>;
515 bd_ram_size = <0x2000>;
516 mac_control = <0x20>;
519 cpts_clock_mult = <0x80000000>;
520 cpts_clock_shift = <29>;
521 reg = <0x4a100000 0x800
523 #address-cells = <1>;
525 interrupt-parent = <&intc>;
532 interrupts = <40 41 42 43>;
534 syscon = <&scm_conf>;
536 davinci_mdio: mdio@4a100800 {
537 compatible = "ti,davinci_mdio";
538 #address-cells = <1>;
540 ti,hwmods = "davinci_mdio";
541 bus_freq = <1000000>;
542 reg = <0x4a100800 0x100>;
545 cpsw_emac0: slave@4a100200 {
546 /* Filled in by U-Boot */
547 mac-address = [ 00 00 00 00 00 00 ];
550 cpsw_emac1: slave@4a100300 {
551 /* Filled in by U-Boot */
552 mac-address = [ 00 00 00 00 00 00 ];
555 phy_sel: cpsw-phy-sel@48140650 {
556 compatible = "ti,am3352-cpsw-phy-sel";
557 reg= <0x48140650 0x4>;
558 reg-names = "gmii-sel";
562 gpmc: gpmc@50000000 {
563 compatible = "ti,am3352-gpmc";
566 reg = <0x50000000 0x2000>;
569 gpmc,num-waitpins = <2>;
570 #address-cells = <2>;
572 interrupt-controller;
573 #interrupt-cells = <2>;
580 #include "dm814x-clocks.dtsi"