arch/arm/boot/dts/da850.dtsi

   1 /*
   2  * Copyright 2012 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15         chosen { };
  16         aliases { };
  17
  18         memory@c0000000 {
  19                 device_type = "memory";
  20                 reg = <0xc0000000 0x0>;
  21         };
  22
  23         arm {
  24                 #address-cells = <1>;
  25                 #size-cells = <1>;
  26                 ranges;
  27                 intc: interrupt-controller@fffee000 {
  28                         compatible = "ti,cp-intc";
  29                         interrupt-controller;
  30                         #interrupt-cells = <1>;
  31                         ti,intc-size = <101>;
  32                         reg = <0xfffee000 0x2000>;
  33                 };
  34         };
  35         dsp: dsp@11800000 {
  36                 compatible = "ti,da850-dsp";
  37                 reg = <0x11800000 0x40000>,
  38                       <0x11e00000 0x8000>,
  39                       <0x11f00000 0x8000>,
  40                       <0x01c14044 0x4>,
  41                       <0x01c14174 0x8>;
  42                 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
  43                 interrupt-parent = <&intc>;
  44                 interrupts = <28>;
  45                 status = "disabled";
  46         };
  47         soc@1c00000 {
  48                 compatible = "simple-bus";
  49                 model = "da850";
  50                 #address-cells = <1>;
  51                 #size-cells = <1>;
  52                 ranges = <0x0 0x01c00000 0x400000>;
  53                 interrupt-parent = <&intc>;
  54
  55                 pmx_core: pinmux@14120 {
  56                         compatible = "pinctrl-single";
  57                         reg = <0x14120 0x50>;
  58                         #pinctrl-cells = <2>;
  59                         pinctrl-single,bit-per-mux;
  60                         pinctrl-single,register-width = <32>;
  61                         pinctrl-single,function-mask = <0xf>;
  62                         /* pin base, nr pins & gpio function */
  63                         pinctrl-single,gpio-range = <&range   0 17 0x8>,
  64                                                     <&range  17  8 0x4>,
  65                                                     <&range  26  8 0x4>,
  66                                                     <&range  34 80 0x8>,
  67                                                     <&range 129 31 0x8>;
  68                         status = "disabled";
  69
  70                         range: gpio-range {
  71                                 #pinctrl-single,gpio-range-cells = <3>;
  72                         };
  73
  74                         serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
  75                                 pinctrl-single,bits = <
  76                                         /* UART0_RTS UART0_CTS */
  77                                         0x0c 0x22000000 0xff000000
  78                                 >;
  79                         };
  80                         serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
  81                                 pinctrl-single,bits = <
  82                                         /* UART0_TXD UART0_RXD */
  83                                         0x0c 0x00220000 0x00ff0000
  84                                 >;
  85                         };
  86                         serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
  87                                 pinctrl-single,bits = <
  88                                         /* UART1_CTS UART1_RTS */
  89                                         0x00 0x00440000 0x00ff0000
  90                                 >;
  91                         };
  92                         serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
  93                                 pinctrl-single,bits = <
  94                                         /* UART1_TXD UART1_RXD */
  95                                         0x10 0x22000000 0xff000000
  96                                 >;
  97                         };
  98                         serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
  99                                 pinctrl-single,bits = <
 100                                         /* UART2_CTS UART2_RTS */
 101                                         0x00 0x44000000 0xff000000
 102                                 >;
 103                         };
 104                         serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
 105                                 pinctrl-single,bits = <
 106                                         /* UART2_TXD UART2_RXD */
 107                                         0x10 0x00220000 0x00ff0000
 108                                 >;
 109                         };
 110                         i2c0_pins: pinmux_i2c0_pins {
 111                                 pinctrl-single,bits = <
 112                                         /* I2C0_SDA,I2C0_SCL */
 113                                         0x10 0x00002200 0x0000ff00
 114                                 >;
 115                         };
 116                         i2c1_pins: pinmux_i2c1_pins {
 117                                 pinctrl-single,bits = <
 118                                         /* I2C1_SDA, I2C1_SCL */
 119                                         0x10 0x00440000 0x00ff0000
 120                                 >;
 121                         };
 122                         mmc0_pins: pinmux_mmc_pins {
 123                                 pinctrl-single,bits = <
 124                                         /* MMCSD0_DAT[3] MMCSD0_DAT[2]
 125                                          * MMCSD0_DAT[1] MMCSD0_DAT[0]
 126                                          * MMCSD0_CMD    MMCSD0_CLK
 127                                          */
 128                                         0x28 0x00222222  0x00ffffff
 129                                 >;
 130                         };
 131                         ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
 132                                 pinctrl-single,bits = <
 133                                         /* EPWM0A */
 134                                         0xc 0x00000002 0x0000000f
 135                                 >;
 136                         };
 137                         ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
 138                                 pinctrl-single,bits = <
 139                                         /* EPWM0B */
 140                                         0xc 0x00000020 0x000000f0
 141                                 >;
 142                         };
 143                         ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
 144                                 pinctrl-single,bits = <
 145                                         /* EPWM1A */
 146                                         0x14 0x00000002 0x0000000f
 147                                 >;
 148                         };
 149                         ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
 150                                 pinctrl-single,bits = <
 151                                         /* EPWM1B */
 152                                         0x14 0x00000020 0x000000f0
 153                                 >;
 154                         };
 155                         ecap0_pins: pinmux_ecap0_pins {
 156                                 pinctrl-single,bits = <
 157                                         /* ECAP0_APWM0 */
 158                                         0x8 0x20000000 0xf0000000
 159                                 >;
 160                         };
 161                         ecap1_pins: pinmux_ecap1_pins {
 162                                 pinctrl-single,bits = <
 163                                         /* ECAP1_APWM1 */
 164                                         0x4 0x40000000 0xf0000000
 165                                 >;
 166                         };
 167                         ecap2_pins: pinmux_ecap2_pins {
 168                                 pinctrl-single,bits = <
 169                                         /* ECAP2_APWM2 */
 170                                         0x4 0x00000004 0x0000000f
 171                                 >;
 172                         };
 173                         spi0_pins: pinmux_spi0_pins {
 174                                 pinctrl-single,bits = <
 175                                         /* SIMO, SOMI, CLK */
 176                                         0xc 0x00001101 0x0000ff0f
 177                                 >;
 178                         };
 179                         spi0_cs0_pin: pinmux_spi0_cs0 {
 180                                 pinctrl-single,bits = <
 181                                         /* CS0 */
 182                                         0x10 0x00000010 0x000000f0
 183                                 >;
 184                         };
 185                         spi0_cs3_pin: pinmux_spi0_cs3_pin {
 186                                 pinctrl-single,bits = <
 187                                         /* CS3 */
 188                                         0xc 0x01000000 0x0f000000
 189                                 >;
 190                         };
 191                         spi1_pins: pinmux_spi1_pins {
 192                                 pinctrl-single,bits = <
 193                                         /* SIMO, SOMI, CLK */
 194                                         0x14 0x00110100 0x00ff0f00
 195                                 >;
 196                         };
 197                         spi1_cs0_pin: pinmux_spi1_cs0 {
 198                                 pinctrl-single,bits = <
 199                                         /* CS0 */
 200                                         0x14 0x00000010 0x000000f0
 201                                 >;
 202                         };
 203                         mdio_pins: pinmux_mdio_pins {
 204                                 pinctrl-single,bits = <
 205                                         /* MDIO_CLK, MDIO_D */
 206                                         0x10 0x00000088 0x000000ff
 207                                 >;
 208                         };
 209                         mii_pins: pinmux_mii_pins {
 210                                 pinctrl-single,bits = <
 211                                         /*
 212                                          * MII_TXEN, MII_TXCLK, MII_COL
 213                                          * MII_TXD_3, MII_TXD_2, MII_TXD_1
 214                                          * MII_TXD_0
 215                                          */
 216                                         0x8 0x88888880 0xfffffff0
 217                                         /*
 218                                          * MII_RXER, MII_CRS, MII_RXCLK
 219                                          * MII_RXDV, MII_RXD_3, MII_RXD_2
 220                                          * MII_RXD_1, MII_RXD_0
 221                                          */
 222                                         0xc 0x88888888 0xffffffff
 223                                 >;
 224                         };
 225                         lcd_pins: pinmux_lcd_pins {
 226                                 pinctrl-single,bits = <
 227                                         /*
 228                                          * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
 229                                          * LCD_D[6], LCD_D[7]
 230                                          */
 231                                         0x40 0x22222200 0xffffff00
 232                                         /*
 233                                          * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
 234                                          * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
 235                                          */
 236                                         0x44 0x22222222 0xffffffff
 237                                         /* LCD_D[8], LCD_D[9] */
 238                                         0x48 0x00000022 0x000000ff
 239
 240                                         /* LCD_PCLK */
 241                                         0x48 0x02000000 0x0f000000
 242                                         /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
 243                                         0x4c 0x02000022 0x0f0000ff
 244                                 >;
 245                         };
 246                         vpif_capture_pins: vpif_capture_pins {
 247                                 pinctrl-single,bits = <
 248                                         /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
 249                                         0x38 0x11111111 0xffffffff
 250                                         /* VP_DIN[10..15,0..1] */
 251                                         0x3c 0x11111111 0xffffffff
 252                                         /* VP_DIN[8..9] */
 253                                         0x40 0x00000011 0x000000ff
 254                                 >;
 255                         };
 256                         vpif_display_pins: vpif_display_pins {
 257                                 pinctrl-single,bits = <
 258                                         /* VP_DOUT[2..7] */
 259                                         0x40 0x11111100 0xffffff00
 260                                         /* VP_DOUT[10..15,0..1] */
 261                                         0x44 0x11111111 0xffffffff
 262                                         /*  VP_DOUT[8..9] */
 263                                         0x48 0x00000011 0x000000ff
 264                                         /*
 265                                          * VP_CLKOUT3, VP_CLKIN3,
 266                                          * VP_CLKOUT2, VP_CLKIN2
 267                                          */
 268                                         0x4c 0x00111100 0x00ffff00
 269                                 >;
 270                         };
 271                 };
 272                 prictrl: priority-controller@14110 {
 273                         compatible = "ti,da850-mstpri";
 274                         reg = <0x14110 0x0c>;
 275                         status = "disabled";
 276                 };
 277                 cfgchip: chip-controller@1417c {
 278                         compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
 279                         reg = <0x1417c 0x14>;
 280
 281                         usb_phy: usb-phy {
 282                                 compatible = "ti,da830-usb-phy";
 283                                 #phy-cells = <1>;
 284                                 status = "disabled";
 285                         };
 286                 };
 287                 edma0: edma@0 {
 288                         compatible = "ti,edma3-tpcc";
 289                         /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
 290                         reg =   <0x0 0x8000>;
 291                         reg-names = "edma3_cc";
 292                         interrupts = <11 12>;
 293                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 294                         #dma-cells = <2>;
 295
 296                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 297                 };
 298                 edma0_tptc0: tptc@8000 {
 299                         compatible = "ti,edma3-tptc";
 300                         reg =   <0x8000 0x400>;
 301                         interrupts = <13>;
 302                         interrupt-names = "edm3_tcerrint";
 303                 };
 304                 edma0_tptc1: tptc@8400 {
 305                         compatible = "ti,edma3-tptc";
 306                         reg =   <0x8400 0x400>;
 307                         interrupts = <32>;
 308                         interrupt-names = "edm3_tcerrint";
 309                 };
 310                 edma1: edma@230000 {
 311                         compatible = "ti,edma3-tpcc";
 312                         /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
 313                         reg =   <0x230000 0x8000>;
 314                         reg-names = "edma3_cc";
 315                         interrupts = <93 94>;
 316                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 317                         #dma-cells = <2>;
 318
 319                         ti,tptcs = <&edma1_tptc0 7>;
 320                 };
 321                 edma1_tptc0: tptc@238000 {
 322                         compatible = "ti,edma3-tptc";
 323                         reg =   <0x238000 0x400>;
 324                         interrupts = <95>;
 325                         interrupt-names = "edm3_tcerrint";
 326                 };
 327                 serial0: serial@42000 {
 328                         compatible = "ti,da830-uart", "ns16550a";
 329                         reg = <0x42000 0x100>;
 330                         reg-io-width = <4>;
 331                         reg-shift = <2>;
 332                         interrupts = <25>;
 333                         status = "disabled";
 334                 };
 335                 serial1: serial@10c000 {
 336                         compatible = "ti,da830-uart", "ns16550a";
 337                         reg = <0x10c000 0x100>;
 338                         reg-io-width = <4>;
 339                         reg-shift = <2>;
 340                         interrupts = <53>;
 341                         status = "disabled";
 342                 };
 343                 serial2: serial@10d000 {
 344                         compatible = "ti,da830-uart", "ns16550a";
 345                         reg = <0x10d000 0x100>;
 346                         reg-io-width = <4>;
 347                         reg-shift = <2>;
 348                         interrupts = <61>;
 349                         status = "disabled";
 350                 };
 351                 rtc0: rtc@23000 {
 352                         compatible = "ti,da830-rtc";
 353                         reg = <0x23000 0x1000>;
 354                         interrupts = <19
 355                                       19>;
 356                         status = "disabled";
 357                 };
 358                 i2c0: i2c@22000 {
 359                         compatible = "ti,davinci-i2c";
 360                         reg = <0x22000 0x1000>;
 361                         interrupts = <15>;
 362                         #address-cells = <1>;
 363                         #size-cells = <0>;
 364                         status = "disabled";
 365                 };
 366                 i2c1: i2c@228000 {
 367                         compatible = "ti,davinci-i2c";
 368                         reg = <0x228000 0x1000>;
 369                         interrupts = <51>;
 370                         #address-cells = <1>;
 371                         #size-cells = <0>;
 372                         status = "disabled";
 373                 };
 374                 wdt: wdt@21000 {
 375                         compatible = "ti,davinci-wdt";
 376                         reg = <0x21000 0x1000>;
 377                         status = "disabled";
 378                 };
 379                 mmc0: mmc@40000 {
 380                         compatible = "ti,da830-mmc";
 381                         reg = <0x40000 0x1000>;
 382                         cap-sd-highspeed;
 383                         cap-mmc-highspeed;
 384                         interrupts = <16>;
 385                         dmas = <&edma0 16 0>, <&edma0 17 0>;
 386                         dma-names = "rx", "tx";
 387                         status = "disabled";
 388                 };
 389                 vpif: video@217000 {
 390                         compatible = "ti,da850-vpif";
 391                         reg = <0x217000 0x1000>;
 392                         interrupts = <92>;
 393                         status = "disabled";
 394
 395                         /* VPIF capture port */
 396                         port@0 {
 397                                 #address-cells = <1>;
 398                                 #size-cells = <0>;
 399                         };
 400
 401                         /* VPIF display port */
 402                         port@1 {
 403                                 #address-cells = <1>;
 404                                 #size-cells = <0>;
 405                         };
 406                 };
 407                 mmc1: mmc@21b000 {
 408                         compatible = "ti,da830-mmc";
 409                         reg = <0x21b000 0x1000>;
 410                         cap-sd-highspeed;
 411                         cap-mmc-highspeed;
 412                         interrupts = <72>;
 413                         dmas = <&edma1 28 0>, <&edma1 29 0>;
 414                         dma-names = "rx", "tx";
 415                         status = "disabled";
 416                 };
 417                 ehrpwm0: pwm@300000 {
 418                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 419                                      "ti,am33xx-ehrpwm";
 420                         #pwm-cells = <3>;
 421                         reg = <0x300000 0x2000>;
 422                         status = "disabled";
 423                 };
 424                 ehrpwm1: pwm@302000 {
 425                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 426                                      "ti,am33xx-ehrpwm";
 427                         #pwm-cells = <3>;
 428                         reg = <0x302000 0x2000>;
 429                         status = "disabled";
 430                 };
 431                 ecap0: ecap@306000 {
 432                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 433                                      "ti,am33xx-ecap";
 434                         #pwm-cells = <3>;
 435                         reg = <0x306000 0x80>;
 436                         status = "disabled";
 437                 };
 438                 ecap1: ecap@307000 {
 439                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 440                                      "ti,am33xx-ecap";
 441                         #pwm-cells = <3>;
 442                         reg = <0x307000 0x80>;
 443                         status = "disabled";
 444                 };
 445                 ecap2: ecap@308000 {
 446                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 447                                      "ti,am33xx-ecap";
 448                         #pwm-cells = <3>;
 449                         reg = <0x308000 0x80>;
 450                         status = "disabled";
 451                 };
 452                 spi0: spi@41000 {
 453                         #address-cells = <1>;
 454                         #size-cells = <0>;
 455                         compatible = "ti,da830-spi";
 456                         reg = <0x41000 0x1000>;
 457                         num-cs = <6>;
 458                         ti,davinci-spi-intr-line = <1>;
 459                         interrupts = <20>;
 460                         dmas = <&edma0 14 0>, <&edma0 15 0>;
 461                         dma-names = "rx", "tx";
 462                         status = "disabled";
 463                 };
 464                 spi1: spi@30e000 {
 465                         #address-cells = <1>;
 466                         #size-cells = <0>;
 467                         compatible = "ti,da830-spi";
 468                         reg = <0x30e000 0x1000>;
 469                         num-cs = <4>;
 470                         ti,davinci-spi-intr-line = <1>;
 471                         interrupts = <56>;
 472                         dmas = <&edma0 18 0>, <&edma0 19 0>;
 473                         dma-names = "rx", "tx";
 474                         status = "disabled";
 475                 };
 476                 usb0: usb@200000 {
 477                         compatible = "ti,da830-musb";
 478                         reg = <0x200000 0x1000>;
 479                         ranges;
 480                         interrupts = <58>;
 481                         interrupt-names = "mc";
 482                         dr_mode = "otg";
 483                         phys = <&usb_phy 0>;
 484                         phy-names = "usb-phy";
 485                         status = "disabled";
 486
 487                         #address-cells = <1>;
 488                         #size-cells = <1>;
 489
 490                         dmas = <&cppi41dma 0 0 &cppi41dma 1 0
 491                                 &cppi41dma 2 0 &cppi41dma 3 0
 492                                 &cppi41dma 0 1 &cppi41dma 1 1
 493                                 &cppi41dma 2 1 &cppi41dma 3 1>;
 494                         dma-names =
 495                                 "rx1", "rx2", "rx3", "rx4",
 496                                 "tx1", "tx2", "tx3", "tx4";
 497
 498                         cppi41dma: dma-controller@201000 {
 499                                 compatible = "ti,da830-cppi41";
 500                                 reg =  <0x201000 0x1000
 501                                         0x202000 0x1000
 502                                         0x204000 0x4000>;
 503                                 reg-names = "controller",
 504                                             "scheduler", "queuemgr";
 505                                 interrupts = <58>;
 506                                 #dma-cells = <2>;
 507                                 #dma-channels = <4>;
 508                                 status = "okay";
 509                         };
 510                 };
 511                 sata: sata@218000 {
 512                         compatible = "ti,da850-ahci";
 513                         reg = <0x218000 0x2000>, <0x22c018 0x4>;
 514                         interrupts = <67>;
 515                         status = "disabled";
 516                 };
 517                 mdio: mdio@224000 {
 518                         compatible = "ti,davinci_mdio";
 519                         #address-cells = <1>;
 520                         #size-cells = <0>;
 521                         reg = <0x224000 0x1000>;
 522                         status = "disabled";
 523                 };
 524                 eth0: ethernet@220000 {
 525                         compatible = "ti,davinci-dm6467-emac";
 526                         reg = <0x220000 0x4000>;
 527                         ti,davinci-ctrl-reg-offset = <0x3000>;
 528                         ti,davinci-ctrl-mod-reg-offset = <0x2000>;
 529                         ti,davinci-ctrl-ram-offset = <0>;
 530                         ti,davinci-ctrl-ram-size = <0x2000>;
 531                         local-mac-address = [ 00 00 00 00 00 00 ];
 532                         interrupts = <33
 533                                         34
 534                                         35
 535                                         36
 536                                         >;
 537                         status = "disabled";
 538                 };
 539                 usb1: usb@225000 {
 540                         compatible = "ti,da830-ohci";
 541                         reg = <0x225000 0x1000>;
 542                         interrupts = <59>;
 543                         phys = <&usb_phy 1>;
 544                         phy-names = "usb-phy";
 545                         status = "disabled";
 546                 };
 547                 gpio: gpio@226000 {
 548                         compatible = "ti,dm6441-gpio";
 549                         gpio-controller;
 550                         #gpio-cells = <2>;
 551                         reg = <0x226000 0x1000>;
 552                         interrupts = <42 IRQ_TYPE_EDGE_BOTH
 553                                 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
 554                                 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
 555                                 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
 556                                 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
 557                         ti,ngpio = <144>;
 558                         ti,davinci-gpio-unbanked = <0>;
 559                         status = "disabled";
 560                         interrupt-controller;
 561                         #interrupt-cells = <2>;
 562                         gpio-ranges = <&pmx_core   0  15 1>,
 563                                       <&pmx_core   1  14 1>,
 564                                       <&pmx_core   2  13 1>,
 565                                       <&pmx_core   3  12 1>,
 566                                       <&pmx_core   4  11 1>,
 567                                       <&pmx_core   5  10 1>,
 568                                       <&pmx_core   6   9 1>,
 569                                       <&pmx_core   7   8 1>,
 570                                       <&pmx_core   8   7 1>,
 571                                       <&pmx_core   9   6 1>,
 572                                       <&pmx_core  10   5 1>,
 573                                       <&pmx_core  11   4 1>,
 574                                       <&pmx_core  12   3 1>,
 575                                       <&pmx_core  13   2 1>,
 576                                       <&pmx_core  14   1 1>,
 577                                       <&pmx_core  15   0 1>,
 578                                       <&pmx_core  16  39 1>,
 579                                       <&pmx_core  17  38 1>,
 580                                       <&pmx_core  18  37 1>,
 581                                       <&pmx_core  19  36 1>,
 582                                       <&pmx_core  20  35 1>,
 583                                       <&pmx_core  21  34 1>,
 584                                       <&pmx_core  22  33 1>,
 585                                       <&pmx_core  23  32 1>,
 586                                       <&pmx_core  24  24 1>,
 587                                       <&pmx_core  25  22 1>,
 588                                       <&pmx_core  26  21 1>,
 589                                       <&pmx_core  27  20 1>,
 590                                       <&pmx_core  28  19 1>,
 591                                       <&pmx_core  29  18 1>,
 592                                       <&pmx_core  30  17 1>,
 593                                       <&pmx_core  31  16 1>,
 594                                       <&pmx_core  32  55 1>,
 595                                       <&pmx_core  33  54 1>,
 596                                       <&pmx_core  34  53 1>,
 597                                       <&pmx_core  35  52 1>,
 598                                       <&pmx_core  36  51 1>,
 599                                       <&pmx_core  37  50 1>,
 600                                       <&pmx_core  38  49 1>,
 601                                       <&pmx_core  39  48 1>,
 602                                       <&pmx_core  40  47 1>,
 603                                       <&pmx_core  41  46 1>,
 604                                       <&pmx_core  42  45 1>,
 605                                       <&pmx_core  43  44 1>,
 606                                       <&pmx_core  44  43 1>,
 607                                       <&pmx_core  45  42 1>,
 608                                       <&pmx_core  46  41 1>,
 609                                       <&pmx_core  47  40 1>,
 610                                       <&pmx_core  48  71 1>,
 611                                       <&pmx_core  49  70 1>,
 612                                       <&pmx_core  50  69 1>,
 613                                       <&pmx_core  51  68 1>,
 614                                       <&pmx_core  52  67 1>,
 615                                       <&pmx_core  53  66 1>,
 616                                       <&pmx_core  54  65 1>,
 617                                       <&pmx_core  55  64 1>,
 618                                       <&pmx_core  56  63 1>,
 619                                       <&pmx_core  57  62 1>,
 620                                       <&pmx_core  58  61 1>,
 621                                       <&pmx_core  59  60 1>,
 622                                       <&pmx_core  60  59 1>,
 623                                       <&pmx_core  61  58 1>,
 624                                       <&pmx_core  62  57 1>,
 625                                       <&pmx_core  63  56 1>,
 626                                       <&pmx_core  64  87 1>,
 627                                       <&pmx_core  65  86 1>,
 628                                       <&pmx_core  66  85 1>,
 629                                       <&pmx_core  67  84 1>,
 630                                       <&pmx_core  68  83 1>,
 631                                       <&pmx_core  69  82 1>,
 632                                       <&pmx_core  70  81 1>,
 633                                       <&pmx_core  71  80 1>,
 634                                       <&pmx_core  72  70 1>,
 635                                       <&pmx_core  73  78 1>,
 636                                       <&pmx_core  74  77 1>,
 637                                       <&pmx_core  75  76 1>,
 638                                       <&pmx_core  76  75 1>,
 639                                       <&pmx_core  77  74 1>,
 640                                       <&pmx_core  78  73 1>,
 641                                       <&pmx_core  79  72 1>,
 642                                       <&pmx_core  80 103 1>,
 643                                       <&pmx_core  81 102 1>,
 644                                       <&pmx_core  82 101 1>,
 645                                       <&pmx_core  83 100 1>,
 646                                       <&pmx_core  84  99 1>,
 647                                       <&pmx_core  85  98 1>,
 648                                       <&pmx_core  86  97 1>,
 649                                       <&pmx_core  87  96 1>,
 650                                       <&pmx_core  88  95 1>,
 651                                       <&pmx_core  89  94 1>,
 652                                       <&pmx_core  90  93 1>,
 653                                       <&pmx_core  91  92 1>,
 654                                       <&pmx_core  92  91 1>,
 655                                       <&pmx_core  93  90 1>,
 656                                       <&pmx_core  94  89 1>,
 657                                       <&pmx_core  95  88 1>,
 658                                       <&pmx_core  96 158 1>,
 659                                       <&pmx_core  97 157 1>,
 660                                       <&pmx_core  98 156 1>,
 661                                       <&pmx_core  99 155 1>,
 662                                       <&pmx_core 100 154 1>,
 663                                       <&pmx_core 101 129 1>,
 664                                       <&pmx_core 102 113 1>,
 665                                       <&pmx_core 103 112 1>,
 666                                       <&pmx_core 104 111 1>,
 667                                       <&pmx_core 105 110 1>,
 668                                       <&pmx_core 106 109 1>,
 669                                       <&pmx_core 107 108 1>,
 670                                       <&pmx_core 108 107 1>,
 671                                       <&pmx_core 109 106 1>,
 672                                       <&pmx_core 110 105 1>,
 673                                       <&pmx_core 111 104 1>,
 674                                       <&pmx_core 112 145 1>,
 675                                       <&pmx_core 113 144 1>,
 676                                       <&pmx_core 114 143 1>,
 677                                       <&pmx_core 115 142 1>,
 678                                       <&pmx_core 116 141 1>,
 679                                       <&pmx_core 117 140 1>,
 680                                       <&pmx_core 118 139 1>,
 681                                       <&pmx_core 119 138 1>,
 682                                       <&pmx_core 120 137 1>,
 683                                       <&pmx_core 121 136 1>,
 684                                       <&pmx_core 122 135 1>,
 685                                       <&pmx_core 123 134 1>,
 686                                       <&pmx_core 124 133 1>,
 687                                       <&pmx_core 125 132 1>,
 688                                       <&pmx_core 126 131 1>,
 689                                       <&pmx_core 127 130 1>,
 690                                       <&pmx_core 128 159 1>,
 691                                       <&pmx_core 129  31 1>,
 692                                       <&pmx_core 130  30 1>,
 693                                       <&pmx_core 131  20 1>,
 694                                       <&pmx_core 132  28 1>,
 695                                       <&pmx_core 133  27 1>,
 696                                       <&pmx_core 134  26 1>,
 697                                       <&pmx_core 135  23 1>,
 698                                       <&pmx_core 136 153 1>,
 699                                       <&pmx_core 137 152 1>,
 700                                       <&pmx_core 138 151 1>,
 701                                       <&pmx_core 139 150 1>,
 702                                       <&pmx_core 140 149 1>,
 703                                       <&pmx_core 141 148 1>,
 704                                       <&pmx_core 142 147 1>,
 705                                       <&pmx_core 143 146 1>;
 706                 };
 707                 pinconf: pin-controller@22c00c {
 708                         compatible = "ti,da850-pupd";
 709                         reg = <0x22c00c 0x8>;
 710                         status = "disabled";
 711                 };
 712
 713                 mcasp0: mcasp@100000 {
 714                         compatible = "ti,da830-mcasp-audio";
 715                         reg = <0x100000 0x2000>,
 716                               <0x102000 0x400000>;
 717                         reg-names = "mpu", "dat";
 718                         interrupts = <54>;
 719                         interrupt-names = "common";
 720                         status = "disabled";
 721                         dmas = <&edma0 1 1>,
 722                                 <&edma0 0 1>;
 723                         dma-names = "tx", "rx";
 724                 };
 725
 726                 lcdc: display@213000 {
 727                         compatible = "ti,da850-tilcdc";
 728                         reg = <0x213000 0x1000>;
 729                         interrupts = <52>;
 730                         max-pixelclock = <37500>;
 731                         status = "disabled";
 732                 };
 733         };
 734         aemif: aemif@68000000 {
 735                 compatible = "ti,da850-aemif";
 736                 #address-cells = <2>;
 737                 #size-cells = <1>;
 738
 739                 reg = <0x68000000 0x00008000>;
 740                 ranges = <0 0 0x60000000 0x08000000
 741                           1 0 0x68000000 0x00008000>;
 742                 status = "disabled";
 743         };
 744         memctrl: memory-controller@b0000000 {
 745                 compatible = "ti,da850-ddr-controller";
 746                 reg = <0xb0000000 0xe8>;
 747                 status = "disabled";
 748         };
 749 };