arch/arm/boot/dts/da850-lcdk.dts

   1 /*
   2  * Copyright (c) 2016 BayLibre, Inc.
   3  *
   4  * Licensed under GPLv2.
   5  */
   6 /dts-v1/;
   7 #include "da850.dtsi"
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "DA850/AM1808/OMAP-L138 LCDK";
  13         compatible = "ti,da850-lcdk", "ti,da850";
  14
  15         aliases {
  16                 serial2 = &serial2;
  17                 ethernet0 = &eth0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial2:115200n8";
  22         };
  23
  24         memory@c0000000 {
  25                 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
  26                 reg = <0xc0000000 0x08000000>;
  27         };
  28
  29         reserved-memory {
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 ranges;
  33
  34                 dsp_memory_region: dsp-memory@c3000000 {
  35                         compatible = "shared-dma-pool";
  36                         reg = <0xc3000000 0x1000000>;
  37                         reusable;
  38                         status = "okay";
  39                 };
  40         };
  41
  42         vcc_5vd: fixedregulator-vcc_5vd {
  43                 compatible = "regulator-fixed";
  44                 regulator-name = "vcc_5vd";
  45                 regulator-min-microvolt = <5000000>;
  46                 regulator-max-microvolt = <5000000>;
  47                 regulator-boot-on;
  48         };
  49
  50         vcc_3v3d: fixedregulator-vcc_3v3d {
  51                 /* TPS650250 - VDCDC1 */
  52                 compatible = "regulator-fixed";
  53                 regulator-name = "vcc_3v3d";
  54                 regulator-min-microvolt = <3300000>;
  55                 regulator-max-microvolt = <3300000>;
  56                 vin-supply = <&vcc_5vd>;
  57                 regulator-always-on;
  58                 regulator-boot-on;
  59         };
  60
  61         vcc_1v8d: fixedregulator-vcc_1v8d {
  62                 /* TPS650250 - VDCDC2 */
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "vcc_1v8d";
  65                 regulator-min-microvolt = <1800000>;
  66                 regulator-max-microvolt = <1800000>;
  67                 vin-supply = <&vcc_5vd>;
  68                 regulator-always-on;
  69                 regulator-boot-on;
  70         };
  71
  72         sound {
  73                 compatible = "simple-audio-card";
  74                 simple-audio-card,name = "DA850-OMAPL138 LCDK";
  75                 simple-audio-card,widgets =
  76                         "Line", "Line In",
  77                         "Line", "Line Out";
  78                 simple-audio-card,routing =
  79                         "LINE1L", "Line In",
  80                         "LINE1R", "Line In",
  81                         "Line Out", "LLOUT",
  82                         "Line Out", "RLOUT";
  83                 simple-audio-card,format = "dsp_b";
  84                 simple-audio-card,bitclock-master = <&link0_codec>;
  85                 simple-audio-card,frame-master = <&link0_codec>;
  86                 simple-audio-card,bitclock-inversion;
  87
  88                 simple-audio-card,cpu {
  89                         sound-dai = <&mcasp0>;
  90                         system-clock-frequency = <24576000>;
  91                 };
  92
  93                 link0_codec: simple-audio-card,codec {
  94                         sound-dai = <&tlv320aic3106>;
  95                         system-clock-frequency = <24576000>;
  96                 };
  97         };
  98
  99         gpio-keys {
 100                 compatible = "gpio-keys";
 101                 autorepeat;
 102
 103                 user1 {
 104                         label = "GPIO Key USER1";
 105                         linux,code = <BTN_0>;
 106                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
 107                 };
 108
 109                 user2 {
 110                         label = "GPIO Key USER2";
 111                         linux,code = <BTN_1>;
 112                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
 113                 };
 114         };
 115
 116         vga-bridge {
 117                 compatible = "ti,ths8135";
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120
 121                 ports {
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124
 125                         port@0 {
 126                                 reg = <0>;
 127
 128                                 vga_bridge_in: endpoint {
 129                                         remote-endpoint = <&lcdc_out_vga>;
 130                                 };
 131                         };
 132
 133                         port@1 {
 134                                 reg = <1>;
 135
 136                                 vga_bridge_out: endpoint {
 137                                         remote-endpoint = <&vga_con_in>;
 138                                 };
 139                         };
 140                 };
 141         };
 142
 143         vga {
 144                 compatible = "vga-connector";
 145
 146                 ddc-i2c-bus = <&i2c0>;
 147
 148                 port {
 149                         vga_con_in: endpoint {
 150                                 remote-endpoint = <&vga_bridge_out>;
 151                         };
 152                 };
 153         };
 154 };
 155
 156 &ref_clk {
 157         clock-frequency = <24000000>;
 158 };
 159
 160 &pmx_core {
 161         status = "okay";
 162
 163         mcasp0_pins: pinmux_mcasp0_pins {
 164                 pinctrl-single,bits = <
 165                         /* AHCLKX AFSX ACLKX */
 166                         0x00 0x00101010 0x00f0f0f0
 167                         /* ARX13 ARX14 */
 168                         0x04 0x00000110 0x00000ff0
 169                 >;
 170         };
 171
 172         nand_pins: nand_pins {
 173                 pinctrl-single,bits = <
 174                         /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
 175                         0x1c 0x10110010  0xf0ff00f0
 176                         /*
 177                          * EMA_D[0], EMA_D[1], EMA_D[2],
 178                          * EMA_D[3], EMA_D[4], EMA_D[5],
 179                          * EMA_D[6], EMA_D[7]
 180                          */
 181                         0x24 0x11111111  0xffffffff
 182                         /*
 183                          * EMA_D[8],  EMA_D[9],  EMA_D[10],
 184                          * EMA_D[11], EMA_D[12], EMA_D[13],
 185                          * EMA_D[14], EMA_D[15]
 186                          */
 187                         0x20 0x11111111  0xffffffff
 188                         /* EMA_A[1], EMA_A[2] */
 189                         0x30 0x01100000  0x0ff00000
 190                 >;
 191         };
 192 };
 193
 194 &serial2 {
 195         pinctrl-names = "default";
 196         pinctrl-0 = <&serial2_rxtx_pins>;
 197         status = "okay";
 198 };
 199
 200 &wdt {
 201         status = "okay";
 202 };
 203
 204 &rtc0 {
 205         status = "okay";
 206 };
 207
 208 &gpio {
 209         status = "okay";
 210 };
 211
 212 &sata_refclk {
 213         status = "okay";
 214         clock-frequency = <100000000>;
 215 };
 216
 217 &sata {
 218         status = "okay";
 219 };
 220
 221 &mdio {
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&mdio_pins>;
 224         bus_freq = <2200000>;
 225         status = "okay";
 226 };
 227
 228 &eth0 {
 229         pinctrl-names = "default";
 230         pinctrl-0 = <&mii_pins>;
 231         status = "okay";
 232 };
 233
 234 &mmc0 {
 235         max-frequency = <50000000>;
 236         bus-width = <4>;
 237         pinctrl-names = "default";
 238         pinctrl-0 = <&mmc0_pins>;
 239         cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
 240         status = "okay";
 241 };
 242
 243 &i2c0 {
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&i2c0_pins>;
 246         clock-frequency = <100000>;
 247         status = "okay";
 248
 249         tlv320aic3106: tlv320aic3106@18 {
 250                 #sound-dai-cells = <0>;
 251                 compatible = "ti,tlv320aic3106";
 252                 reg = <0x18>;
 253                 status = "okay";
 254
 255                 /* Regulators */
 256                 IOVDD-supply = <&vcc_3v3d>;
 257                 AVDD-supply = <&vcc_3v3d>;
 258                 DRVDD-supply = <&vcc_3v3d>;
 259                 DVDD-supply = <&vcc_1v8d>;
 260         };
 261 };
 262
 263 &mcasp0 {
 264         #sound-dai-cells = <0>;
 265         pinctrl-names = "default";
 266         pinctrl-0 = <&mcasp0_pins>;
 267         status = "okay";
 268
 269         op-mode = <0>;   /* DAVINCI_MCASP_IIS_MODE */
 270         tdm-slots = <2>;
 271         serial-dir = <   /* 0: INACTIVE, 1: TX, 2: RX */
 272                 0 0 0 0
 273                 0 0 0 0
 274                 0 0 0 0
 275                 0 1 2 0
 276         >;
 277         tx-num-evt = <32>;
 278         rx-num-evt = <32>;
 279 };
 280
 281 &usb_phy {
 282         status = "okay";
 283 };
 284
 285 &usb0 {
 286         status = "okay";
 287 };
 288
 289 &usb1 {
 290         status = "okay";
 291 };
 292
 293 &aemif {
 294         pinctrl-names = "default";
 295         pinctrl-0 = <&nand_pins>;
 296         status = "okay";
 297         cs3 {
 298                 #address-cells = <2>;
 299                 #size-cells = <1>;
 300                 clock-ranges;
 301                 ranges;
 302
 303                 ti,cs-chipselect = <3>;
 304
 305                 nand@2000000,0 {
 306                         compatible = "ti,davinci-nand";
 307                         #address-cells = <1>;
 308                         #size-cells = <1>;
 309                         reg = <0 0x02000000 0x02000000
 310                                1 0x00000000 0x00008000>;
 311
 312                         ti,davinci-chipselect = <1>;
 313                         ti,davinci-mask-ale = <0>;
 314                         ti,davinci-mask-cle = <0>;
 315                         ti,davinci-mask-chipsel = <0>;
 316
 317                         ti,davinci-nand-buswidth = <16>;
 318                         ti,davinci-ecc-mode = "hw";
 319                         ti,davinci-ecc-bits = <4>;
 320                         ti,davinci-nand-use-bbt;
 321
 322                         /*
 323                          * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
 324                          * "To boot from NAND Flash, the AIS should be written
 325                          * to NAND block 1 (NAND block 0 is not used by default)".
 326                          * The same doc mentions that for ROM "Silicon Revision 2.1",
 327                          * "Updated NAND boot mode to offer boot from block 0 or block 1".
 328                          * However the limitaion is left here by default for compatibility
 329                          * with older silicon and because it needs new boot pin settings
 330                          * not possible in stock LCDK.
 331                          */
 332                         partitions {
 333                                 compatible = "fixed-partitions";
 334                                 #address-cells = <1>;
 335                                 #size-cells = <1>;
 336
 337                                 partition@0 {
 338                                         label = "u-boot env";
 339                                         reg = <0 0x020000>;
 340                                 };
 341                                 partition@20000 {
 342                                         /* The LCDK defaults to booting from this partition */
 343                                         label = "u-boot";
 344                                         reg = <0x020000 0x080000>;
 345                                 };
 346                                 partition@a0000 {
 347                                         label = "free space";
 348                                         reg = <0x0a0000 0>;
 349                                 };
 350                         };
 351                 };
 352         };
 353 };
 354
 355 &prictrl {
 356         status = "okay";
 357 };
 358
 359 &memctrl {
 360         status = "okay";
 361 };
 362
 363 &lcdc {
 364         status = "okay";
 365         pinctrl-names = "default";
 366         pinctrl-0 = <&lcd_pins>;
 367
 368         port {
 369                 lcdc_out_vga: endpoint {
 370                         remote-endpoint = <&vga_bridge_in>;
 371                 };
 372         };
 373 };
 374
 375 &vpif {
 376         pinctrl-names = "default";
 377         pinctrl-0 = <&vpif_capture_pins>;
 378         status = "okay";
 379 };
 380
 381 &dsp {
 382         memory-region = <&dsp_memory_region>;
 383         status = "okay";
 384 };