arch/arm/boot/dts/bcm53573.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         interrupt-parent = <&gic>;
  14
  15         aliases {
  16                 serial0 = &uart0;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 cpu@0 {
  28                         device_type = "cpu";
  29                         compatible = "arm,cortex-a7";
  30                         reg = <0x0>;
  31                 };
  32         };
  33
  34         mpcore {
  35                 compatible = "simple-bus";
  36                 ranges = <0x00000000 0x18310000 0x00008000>;
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39
  40                 gic: interrupt-controller@1000 {
  41                         compatible = "arm,cortex-a7-gic";
  42                         #interrupt-cells = <3>;
  43                         #address-cells = <0>;
  44                         interrupt-controller;
  45                         reg = <0x1000 0x1000>,
  46                               <0x2000 0x0100>;
  47                 };
  48         };
  49
  50         timer {
  51                 compatible = "arm,armv7-timer";
  52                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
  53                              <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
  54                              <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
  55                              <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
  56         };
  57
  58         clocks {
  59                 #address-cells = <1>;
  60                 #size-cells = <1>;
  61                 ranges;
  62
  63                 alp: oscillator {
  64                         #clock-cells = <0>;
  65                         compatible = "fixed-clock";
  66                         clock-frequency = <40000000>;
  67                 };
  68         };
  69
  70         axi@18000000 {
  71                 compatible = "brcm,bus-axi";
  72                 reg = <0x18000000 0x1000>;
  73                 ranges = <0x00000000 0x18000000 0x00100000>;
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76
  77                 #interrupt-cells = <1>;
  78                 interrupt-map-mask = <0x000fffff 0xffff>;
  79                 interrupt-map =
  80                         /* ChipCommon */
  81                         <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  82
  83                         /* IEEE 802.11 0 */
  84                         <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  85
  86                         /* PCIe Controller 0 */
  87                         <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  88                         <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  89                         <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  90                         <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  91                         <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  92                         <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  93
  94                         /* USB 2.0 Controller */
  95                         <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  96
  97                         /* Ethernet Controller 0 */
  98                         <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
  99
 100                         /* IEEE 802.11 1 */
 101                         <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 102
 103                         /* Ethernet Controller 1 */
 104                         <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 105
 106                 chipcommon: chipcommon@0 {
 107                         compatible = "simple-bus";
 108                         reg = <0x00000000 0x1000>;
 109                         ranges;
 110
 111                         #address-cells = <1>;
 112                         #size-cells = <1>;
 113
 114                         gpio-controller;
 115                         #gpio-cells = <2>;
 116
 117                         uart0: serial@300 {
 118                                 compatible = "ns16550a";
 119                                 reg = <0x0300 0x100>;
 120                                 interrupt-parent = <&gic>;
 121                                 interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
 122                                 clocks = <&alp>;
 123                                 status = "okay";
 124                         };
 125                 };
 126
 127                 pcie0: pcie@2000 {
 128                         reg = <0x00002000 0x1000>;
 129                 };
 130
 131                 usb2: usb2@4000 {
 132                         reg = <0x4000 0x1000>;
 133                         ranges;
 134                         #address-cells = <1>;
 135                         #size-cells = <1>;
 136
 137                         ehci: ehci@4000 {
 138                                 compatible = "generic-ehci";
 139                                 reg = <0x4000 0x1000>;
 140                                 interrupt-parent = <&gic>;
 141                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 142
 143                                 #address-cells = <1>;
 144                                 #size-cells = <0>;
 145
 146                                 ehci_port1: port@1 {
 147                                         reg = <1>;
 148                                         #trigger-source-cells = <0>;
 149                                 };
 150
 151                                 ehci_port2: port@2 {
 152                                         reg = <2>;
 153                                         #trigger-source-cells = <0>;
 154                                 };
 155                         };
 156
 157                         ohci: ohci@d000 {
 158                                 #usb-cells = <0>;
 159
 160                                 compatible = "generic-ohci";
 161                                 reg = <0xd000 0x1000>;
 162                                 interrupt-parent = <&gic>;
 163                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 164
 165                                 #address-cells = <1>;
 166                                 #size-cells = <0>;
 167
 168                                 ohci_port1: port@1 {
 169                                         reg = <1>;
 170                                         #trigger-source-cells = <0>;
 171                                 };
 172
 173                                 ohci_port2: port@2 {
 174                                         reg = <2>;
 175                                         #trigger-source-cells = <0>;
 176                                 };
 177                         };
 178                 };
 179
 180                 gmac0: ethernet@5000 {
 181                         reg = <0x5000 0x1000>;
 182                 };
 183
 184                 gmac1: ethernet@b000 {
 185                         reg = <0xb000 0x1000>;
 186                 };
 187
 188                 pmu@12000 {
 189                         compatible = "simple-mfd", "syscon";
 190                         reg = <0x00012000 0x00001000>;
 191
 192                         ilp: ilp {
 193                                 compatible = "brcm,bcm53573-ilp";
 194                                 clocks = <&alp>;
 195                                 #clock-cells = <0>;
 196                                 clock-output-names = "ilp";
 197                         };
 198                 };
 199         };
 200 };