arch/arm/boot/dts/bcm47189-luxul-xap-810.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright 2017 Luxul Inc.
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "bcm53573.dtsi"
   9
  10 / {
  11         compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573";
  12         model = "Luxul XAP-810 V1";
  13
  14         chosen {
  15                 bootargs = "earlycon";
  16         };
  17
  18         memory {
  19                 device_type = "memory";
  20                 reg = <0x00000000 0x08000000>;
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25
  26                 5ghz {
  27                         label = "bcm53xx:blue:5ghz";
  28                         gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
  29                         linux,default-trigger = "default-off";
  30                 };
  31
  32                 system {
  33                         label = "bcm53xx:green:system";
  34                         gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
  35                         linux,default-trigger = "timer";
  36                 };
  37         };
  38
  39         pcie0_leds {
  40                 compatible = "gpio-leds";
  41
  42                 2ghz {
  43                         label = "bcm53xx:blue:2ghz";
  44                         gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
  45                         linux,default-trigger = "default-off";
  46                 };
  47         };
  48
  49         gpio-keys {
  50                 compatible = "gpio-keys";
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53
  54                 restart {
  55                         label = "Reset";
  56                         linux,code = <KEY_RESTART>;
  57                         gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
  58                 };
  59         };
  60 };
  61
  62 &pcie0 {
  63         ranges = <0x00000000 0 0 0 0 0x00100000>;
  64         #address-cells = <3>;
  65         #size-cells = <2>;
  66
  67         bridge@0,0,0 {
  68                 reg = <0x0000 0 0 0 0>;
  69                 ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
  70                 #address-cells = <3>;
  71                 #size-cells = <2>;
  72
  73                 wifi@0,1,0 {
  74                         reg = <0x0000 0 0 0 0>;
  75                         ranges = <0x00000000 0 0 0 0x00100000>;
  76                         #address-cells = <1>;
  77                         #size-cells = <1>;
  78
  79                         pcie0_chipcommon: chipcommon@0 {
  80                                 reg = <0 0x1000>;
  81
  82                                 gpio-controller;
  83                                 #gpio-cells = <2>;
  84                         };
  85                 };
  86         };
  87 };