arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 /* firmware-provided startup stubs live here, where the secondary CPUs are
   8  * spinning.
   9  */
  10 /memreserve/ 0x00000000 0x00001000;
  11
  12 /* This include file covers the common peripherals and configuration between
  13  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
  14  * bcm2835.dtsi and bcm2836.dtsi.
  15  */
  16
  17 / {
  18         compatible = "brcm,bcm2835";
  19         model = "BCM2835";
  20         interrupt-parent = <&intc>;
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23
  24         aliases {
  25                 serial0 = &uart0;
  26                 serial1 = &uart1;
  27         };
  28
  29         chosen {
  30                 stdout-path = "serial0:115200n8";
  31         };
  32
  33         thermal-zones {
  34                 cpu_thermal: cpu-thermal {
  35                         polling-delay-passive = <0>;
  36                         polling-delay = <1000>;
  37
  38                         thermal-sensors = <&thermal>;
  39
  40                         trips {
  41                                 cpu-crit {
  42                                         temperature     = <80000>;
  43                                         hysteresis      = <0>;
  44                                         type            = "critical";
  45                                 };
  46                         };
  47
  48                         cooling-maps {
  49                         };
  50                 };
  51         };
  52
  53         soc {
  54                 compatible = "simple-bus";
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57
  58                 timer@7e003000 {
  59                         compatible = "brcm,bcm2835-system-timer";
  60                         reg = <0x7e003000 0x1000>;
  61                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  62                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  63                          * but we don't have the driver using the common clock
  64                          * support yet.
  65                          */
  66                         clock-frequency = <1000000>;
  67                 };
  68
  69                 dma: dma@7e007000 {
  70                         compatible = "brcm,bcm2835-dma";
  71                         reg = <0x7e007000 0xf00>;
  72                         interrupts = <1 16>,
  73                                      <1 17>,
  74                                      <1 18>,
  75                                      <1 19>,
  76                                      <1 20>,
  77                                      <1 21>,
  78                                      <1 22>,
  79                                      <1 23>,
  80                                      <1 24>,
  81                                      <1 25>,
  82                                      <1 26>,
  83                                      /* dma channel 11-14 share one irq */
  84                                      <1 27>,
  85                                      <1 27>,
  86                                      <1 27>,
  87                                      <1 27>,
  88                                      /* unused shared irq for all channels */
  89                                      <1 28>;
  90                         interrupt-names = "dma0",
  91                                           "dma1",
  92                                           "dma2",
  93                                           "dma3",
  94                                           "dma4",
  95                                           "dma5",
  96                                           "dma6",
  97                                           "dma7",
  98                                           "dma8",
  99                                           "dma9",
 100                                           "dma10",
 101                                           "dma11",
 102                                           "dma12",
 103                                           "dma13",
 104                                           "dma14",
 105                                           "dma-shared-all";
 106                         #dma-cells = <1>;
 107                         brcm,dma-channel-mask = <0x7f35>;
 108                 };
 109
 110                 intc: interrupt-controller@7e00b200 {
 111                         compatible = "brcm,bcm2835-armctrl-ic";
 112                         reg = <0x7e00b200 0x200>;
 113                         interrupt-controller;
 114                         #interrupt-cells = <2>;
 115                 };
 116
 117                 watchdog@7e100000 {
 118                         compatible = "brcm,bcm2835-pm-wdt";
 119                         reg = <0x7e100000 0x28>;
 120                 };
 121
 122                 clocks: cprman@7e101000 {
 123                         compatible = "brcm,bcm2835-cprman";
 124                         #clock-cells = <1>;
 125                         reg = <0x7e101000 0x2000>;
 126
 127                         /* CPRMAN derives almost everything from the
 128                          * platform's oscillator.  However, the DSI
 129                          * pixel clocks come from the DSI analog PHY.
 130                          */
 131                         clocks = <&clk_osc>,
 132                                 <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
 133                                 <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
 134                 };
 135
 136                 rng@7e104000 {
 137                         compatible = "brcm,bcm2835-rng";
 138                         reg = <0x7e104000 0x10>;
 139                 };
 140
 141                 mailbox: mailbox@7e00b880 {
 142                         compatible = "brcm,bcm2835-mbox";
 143                         reg = <0x7e00b880 0x40>;
 144                         interrupts = <0 1>;
 145                         #mbox-cells = <0>;
 146                 };
 147
 148                 gpio: gpio@7e200000 {
 149                         compatible = "brcm,bcm2835-gpio";
 150                         reg = <0x7e200000 0xb4>;
 151                         /*
 152                          * The GPIO IP block is designed for 3 banks of GPIOs.
 153                          * Each bank has a GPIO interrupt for itself.
 154                          * There is an overall "any bank" interrupt.
 155                          * In order, these are GIC interrupts 17, 18, 19, 20.
 156                          * Since the BCM2835 only has 2 banks, the 2nd bank
 157                          * interrupt output appears to be mirrored onto the
 158                          * 3rd bank's interrupt signal.
 159                          * So, a bank0 interrupt shows up on 17, 20, and
 160                          * a bank1 interrupt shows up on 18, 19, 20!
 161                          */
 162                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 163
 164                         gpio-controller;
 165                         #gpio-cells = <2>;
 166
 167                         interrupt-controller;
 168                         #interrupt-cells = <2>;
 169
 170                         /* Defines pin muxing groups according to
 171                          * BCM2835-ARM-Peripherals.pdf page 102.
 172                          *
 173                          * While each pin can have its mux selected
 174                          * for various functions individually, some
 175                          * groups only make sense to switch to a
 176                          * particular function together.
 177                          */
 178                         dpi_gpio0: dpi_gpio0 {
 179                                 brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
 180                                              12 13 14 15 16 17 18 19
 181                                              20 21 22 23 24 25 26 27>;
 182                                 brcm,function = <BCM2835_FSEL_ALT2>;
 183                         };
 184                         emmc_gpio22: emmc_gpio22 {
 185                                 brcm,pins = <22 23 24 25 26 27>;
 186                                 brcm,function = <BCM2835_FSEL_ALT3>;
 187                         };
 188                         emmc_gpio34: emmc_gpio34 {
 189                                 brcm,pins = <34 35 36 37 38 39>;
 190                                 brcm,function = <BCM2835_FSEL_ALT3>;
 191                                 brcm,pull = <BCM2835_PUD_OFF
 192                                              BCM2835_PUD_UP
 193                                              BCM2835_PUD_UP
 194                                              BCM2835_PUD_UP
 195                                              BCM2835_PUD_UP
 196                                              BCM2835_PUD_UP>;
 197                         };
 198                         emmc_gpio48: emmc_gpio48 {
 199                                 brcm,pins = <48 49 50 51 52 53>;
 200                                 brcm,function = <BCM2835_FSEL_ALT3>;
 201                         };
 202
 203                         gpclk0_gpio4: gpclk0_gpio4 {
 204                                 brcm,pins = <4>;
 205                                 brcm,function = <BCM2835_FSEL_ALT0>;
 206                         };
 207                         gpclk1_gpio5: gpclk1_gpio5 {
 208                                 brcm,pins = <5>;
 209                                 brcm,function = <BCM2835_FSEL_ALT0>;
 210                         };
 211                         gpclk1_gpio42: gpclk1_gpio42 {
 212                                 brcm,pins = <42>;
 213                                 brcm,function = <BCM2835_FSEL_ALT0>;
 214                         };
 215                         gpclk1_gpio44: gpclk1_gpio44 {
 216                                 brcm,pins = <44>;
 217                                 brcm,function = <BCM2835_FSEL_ALT0>;
 218                         };
 219                         gpclk2_gpio6: gpclk2_gpio6 {
 220                                 brcm,pins = <6>;
 221                                 brcm,function = <BCM2835_FSEL_ALT0>;
 222                         };
 223                         gpclk2_gpio43: gpclk2_gpio43 {
 224                                 brcm,pins = <43>;
 225                                 brcm,function = <BCM2835_FSEL_ALT0>;
 226                         };
 227
 228                         i2c0_gpio0: i2c0_gpio0 {
 229                                 brcm,pins = <0 1>;
 230                                 brcm,function = <BCM2835_FSEL_ALT0>;
 231                         };
 232                         i2c0_gpio28: i2c0_gpio28 {
 233                                 brcm,pins = <28 29>;
 234                                 brcm,function = <BCM2835_FSEL_ALT0>;
 235                         };
 236                         i2c0_gpio44: i2c0_gpio44 {
 237                                 brcm,pins = <44 45>;
 238                                 brcm,function = <BCM2835_FSEL_ALT1>;
 239                         };
 240                         i2c1_gpio2: i2c1_gpio2 {
 241                                 brcm,pins = <2 3>;
 242                                 brcm,function = <BCM2835_FSEL_ALT0>;
 243                         };
 244                         i2c1_gpio44: i2c1_gpio44 {
 245                                 brcm,pins = <44 45>;
 246                                 brcm,function = <BCM2835_FSEL_ALT2>;
 247                         };
 248                         i2c_slave_gpio18: i2c_slave_gpio18 {
 249                                 brcm,pins = <18 19 20 21>;
 250                                 brcm,function = <BCM2835_FSEL_ALT3>;
 251                         };
 252
 253                         jtag_gpio4: jtag_gpio4 {
 254                                 brcm,pins = <4 5 6 12 13>;
 255                                 brcm,function = <BCM2835_FSEL_ALT4>;
 256                         };
 257                         jtag_gpio22: jtag_gpio22 {
 258                                 brcm,pins = <22 23 24 25 26 27>;
 259                                 brcm,function = <BCM2835_FSEL_ALT4>;
 260                         };
 261
 262                         pcm_gpio18: pcm_gpio18 {
 263                                 brcm,pins = <18 19 20 21>;
 264                                 brcm,function = <BCM2835_FSEL_ALT0>;
 265                         };
 266                         pcm_gpio28: pcm_gpio28 {
 267                                 brcm,pins = <28 29 30 31>;
 268                                 brcm,function = <BCM2835_FSEL_ALT2>;
 269                         };
 270
 271                         pwm0_gpio12: pwm0_gpio12 {
 272                                 brcm,pins = <12>;
 273                                 brcm,function = <BCM2835_FSEL_ALT0>;
 274                         };
 275                         pwm0_gpio18: pwm0_gpio18 {
 276                                 brcm,pins = <18>;
 277                                 brcm,function = <BCM2835_FSEL_ALT5>;
 278                         };
 279                         pwm0_gpio40: pwm0_gpio40 {
 280                                 brcm,pins = <40>;
 281                                 brcm,function = <BCM2835_FSEL_ALT0>;
 282                         };
 283                         pwm1_gpio13: pwm1_gpio13 {
 284                                 brcm,pins = <13>;
 285                                 brcm,function = <BCM2835_FSEL_ALT0>;
 286                         };
 287                         pwm1_gpio19: pwm1_gpio19 {
 288                                 brcm,pins = <19>;
 289                                 brcm,function = <BCM2835_FSEL_ALT5>;
 290                         };
 291                         pwm1_gpio41: pwm1_gpio41 {
 292                                 brcm,pins = <41>;
 293                                 brcm,function = <BCM2835_FSEL_ALT0>;
 294                         };
 295                         pwm1_gpio45: pwm1_gpio45 {
 296                                 brcm,pins = <45>;
 297                                 brcm,function = <BCM2835_FSEL_ALT0>;
 298                         };
 299
 300                         sdhost_gpio48: sdhost_gpio48 {
 301                                 brcm,pins = <48 49 50 51 52 53>;
 302                                 brcm,function = <BCM2835_FSEL_ALT0>;
 303                         };
 304
 305                         spi0_gpio7: spi0_gpio7 {
 306                                 brcm,pins = <7 8 9 10 11>;
 307                                 brcm,function = <BCM2835_FSEL_ALT0>;
 308                         };
 309                         spi0_gpio35: spi0_gpio35 {
 310                                 brcm,pins = <35 36 37 38 39>;
 311                                 brcm,function = <BCM2835_FSEL_ALT0>;
 312                         };
 313                         spi1_gpio16: spi1_gpio16 {
 314                                 brcm,pins = <16 17 18 19 20 21>;
 315                                 brcm,function = <BCM2835_FSEL_ALT4>;
 316                         };
 317                         spi2_gpio40: spi2_gpio40 {
 318                                 brcm,pins = <40 41 42 43 44 45>;
 319                                 brcm,function = <BCM2835_FSEL_ALT4>;
 320                         };
 321
 322                         uart0_gpio14: uart0_gpio14 {
 323                                 brcm,pins = <14 15>;
 324                                 brcm,function = <BCM2835_FSEL_ALT0>;
 325                         };
 326                         /* Separate from the uart0_gpio14 group
 327                          * because it conflicts with spi1_gpio16, and
 328                          * people often run uart0 on the two pins
 329                          * without flow control.
 330                          */
 331                         uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
 332                                 brcm,pins = <16 17>;
 333                                 brcm,function = <BCM2835_FSEL_ALT3>;
 334                         };
 335                         uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
 336                                 brcm,pins = <30 31>;
 337                                 brcm,function = <BCM2835_FSEL_ALT3>;
 338                         };
 339                         uart0_gpio32: uart0_gpio32 {
 340                                 brcm,pins = <32 33>;
 341                                 brcm,function = <BCM2835_FSEL_ALT3>;
 342                         };
 343                         uart0_gpio36: uart0_gpio36 {
 344                                 brcm,pins = <36 37>;
 345                                 brcm,function = <BCM2835_FSEL_ALT2>;
 346                         };
 347                         uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
 348                                 brcm,pins = <38 39>;
 349                                 brcm,function = <BCM2835_FSEL_ALT2>;
 350                         };
 351
 352                         uart1_gpio14: uart1_gpio14 {
 353                                 brcm,pins = <14 15>;
 354                                 brcm,function = <BCM2835_FSEL_ALT5>;
 355                         };
 356                         uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
 357                                 brcm,pins = <16 17>;
 358                                 brcm,function = <BCM2835_FSEL_ALT5>;
 359                         };
 360                         uart1_gpio32: uart1_gpio32 {
 361                                 brcm,pins = <32 33>;
 362                                 brcm,function = <BCM2835_FSEL_ALT5>;
 363                         };
 364                         uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
 365                                 brcm,pins = <30 31>;
 366                                 brcm,function = <BCM2835_FSEL_ALT5>;
 367                         };
 368                         uart1_gpio40: uart1_gpio40 {
 369                                 brcm,pins = <40 41>;
 370                                 brcm,function = <BCM2835_FSEL_ALT5>;
 371                         };
 372                         uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
 373                                 brcm,pins = <42 43>;
 374                                 brcm,function = <BCM2835_FSEL_ALT5>;
 375                         };
 376                 };
 377
 378                 uart0: serial@7e201000 {
 379                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 380                         reg = <0x7e201000 0x1000>;
 381                         interrupts = <2 25>;
 382                         clocks = <&clocks BCM2835_CLOCK_UART>,
 383                                  <&clocks BCM2835_CLOCK_VPU>;
 384                         clock-names = "uartclk", "apb_pclk";
 385                         arm,primecell-periphid = <0x00241011>;
 386                 };
 387
 388                 sdhost: mmc@7e202000 {
 389                         compatible = "brcm,bcm2835-sdhost";
 390                         reg = <0x7e202000 0x100>;
 391                         interrupts = <2 24>;
 392                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 393                         dmas = <&dma 13>;
 394                         dma-names = "rx-tx";
 395                         status = "disabled";
 396                 };
 397
 398                 i2s: i2s@7e203000 {
 399                         compatible = "brcm,bcm2835-i2s";
 400                         reg = <0x7e203000 0x20>,
 401                               <0x7e101098 0x02>;
 402
 403                         dmas = <&dma 2>,
 404                                <&dma 3>;
 405                         dma-names = "tx", "rx";
 406                         status = "disabled";
 407                 };
 408
 409                 spi: spi@7e204000 {
 410                         compatible = "brcm,bcm2835-spi";
 411                         reg = <0x7e204000 0x1000>;
 412                         interrupts = <2 22>;
 413                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 414                         #address-cells = <1>;
 415                         #size-cells = <0>;
 416                         status = "disabled";
 417                 };
 418
 419                 i2c0: i2c@7e205000 {
 420                         compatible = "brcm,bcm2835-i2c";
 421                         reg = <0x7e205000 0x1000>;
 422                         interrupts = <2 21>;
 423                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                         status = "disabled";
 427                 };
 428
 429                 pixelvalve@7e206000 {
 430                         compatible = "brcm,bcm2835-pixelvalve0";
 431                         reg = <0x7e206000 0x100>;
 432                         interrupts = <2 13>; /* pwa0 */
 433                 };
 434
 435                 pixelvalve@7e207000 {
 436                         compatible = "brcm,bcm2835-pixelvalve1";
 437                         reg = <0x7e207000 0x100>;
 438                         interrupts = <2 14>; /* pwa1 */
 439                 };
 440
 441                 dsi0: dsi@7e209000 {
 442                         compatible = "brcm,bcm2835-dsi0";
 443                         reg = <0x7e209000 0x78>;
 444                         interrupts = <2 4>;
 445                         #address-cells = <1>;
 446                         #size-cells = <0>;
 447                         #clock-cells = <1>;
 448
 449                         clocks = <&clocks BCM2835_PLLA_DSI0>,
 450                                  <&clocks BCM2835_CLOCK_DSI0E>,
 451                                  <&clocks BCM2835_CLOCK_DSI0P>;
 452                         clock-names = "phy", "escape", "pixel";
 453
 454                         clock-output-names = "dsi0_byte",
 455                                              "dsi0_ddr2",
 456                                              "dsi0_ddr";
 457
 458                 };
 459
 460                 thermal: thermal@7e212000 {
 461                         compatible = "brcm,bcm2835-thermal";
 462                         reg = <0x7e212000 0x8>;
 463                         clocks = <&clocks BCM2835_CLOCK_TSENS>;
 464                         #thermal-sensor-cells = <0>;
 465                         status = "disabled";
 466                 };
 467
 468                 aux: aux@0x7e215000 {
 469                         compatible = "brcm,bcm2835-aux";
 470                         #clock-cells = <1>;
 471                         reg = <0x7e215000 0x8>;
 472                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 473                 };
 474
 475                 uart1: serial@7e215040 {
 476                         compatible = "brcm,bcm2835-aux-uart";
 477                         reg = <0x7e215040 0x40>;
 478                         interrupts = <1 29>;
 479                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
 480                         status = "disabled";
 481                 };
 482
 483                 spi1: spi@7e215080 {
 484                         compatible = "brcm,bcm2835-aux-spi";
 485                         reg = <0x7e215080 0x40>;
 486                         interrupts = <1 29>;
 487                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 488                         #address-cells = <1>;
 489                         #size-cells = <0>;
 490                         status = "disabled";
 491                 };
 492
 493                 spi2: spi@7e2150c0 {
 494                         compatible = "brcm,bcm2835-aux-spi";
 495                         reg = <0x7e2150c0 0x40>;
 496                         interrupts = <1 29>;
 497                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 498                         #address-cells = <1>;
 499                         #size-cells = <0>;
 500                         status = "disabled";
 501                 };
 502
 503                 pwm: pwm@7e20c000 {
 504                         compatible = "brcm,bcm2835-pwm";
 505                         reg = <0x7e20c000 0x28>;
 506                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 507                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 508                         assigned-clock-rates = <10000000>;
 509                         #pwm-cells = <2>;
 510                         status = "disabled";
 511                 };
 512
 513                 sdhci: sdhci@7e300000 {
 514                         compatible = "brcm,bcm2835-sdhci";
 515                         reg = <0x7e300000 0x100>;
 516                         interrupts = <2 30>;
 517                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 518                         status = "disabled";
 519                 };
 520
 521                 hvs@7e400000 {
 522                         compatible = "brcm,bcm2835-hvs";
 523                         reg = <0x7e400000 0x6000>;
 524                         interrupts = <2 1>;
 525                 };
 526
 527                 dsi1: dsi@7e700000 {
 528                         compatible = "brcm,bcm2835-dsi1";
 529                         reg = <0x7e700000 0x8c>;
 530                         interrupts = <2 12>;
 531                         #address-cells = <1>;
 532                         #size-cells = <0>;
 533                         #clock-cells = <1>;
 534
 535                         clocks = <&clocks BCM2835_PLLD_DSI1>,
 536                                  <&clocks BCM2835_CLOCK_DSI1E>,
 537                                  <&clocks BCM2835_CLOCK_DSI1P>;
 538                         clock-names = "phy", "escape", "pixel";
 539
 540                         clock-output-names = "dsi1_byte",
 541                                              "dsi1_ddr2",
 542                                              "dsi1_ddr";
 543
 544                         status = "disabled";
 545                 };
 546
 547                 i2c1: i2c@7e804000 {
 548                         compatible = "brcm,bcm2835-i2c";
 549                         reg = <0x7e804000 0x1000>;
 550                         interrupts = <2 21>;
 551                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 552                         #address-cells = <1>;
 553                         #size-cells = <0>;
 554                         status = "disabled";
 555                 };
 556
 557                 i2c2: i2c@7e805000 {
 558                         compatible = "brcm,bcm2835-i2c";
 559                         reg = <0x7e805000 0x1000>;
 560                         interrupts = <2 21>;
 561                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 562                         #address-cells = <1>;
 563                         #size-cells = <0>;
 564                         status = "disabled";
 565                 };
 566
 567                 vec: vec@7e806000 {
 568                         compatible = "brcm,bcm2835-vec";
 569                         reg = <0x7e806000 0x1000>;
 570                         clocks = <&clocks BCM2835_CLOCK_VEC>;
 571                         interrupts = <2 27>;
 572                         status = "disabled";
 573                 };
 574
 575                 pixelvalve@7e807000 {
 576                         compatible = "brcm,bcm2835-pixelvalve2";
 577                         reg = <0x7e807000 0x100>;
 578                         interrupts = <2 10>; /* pixelvalve */
 579                 };
 580
 581                 hdmi: hdmi@7e902000 {
 582                         compatible = "brcm,bcm2835-hdmi";
 583                         reg = <0x7e902000 0x600>,
 584                               <0x7e808000 0x100>;
 585                         interrupts = <2 8>, <2 9>;
 586                         ddc = <&i2c2>;
 587                         clocks = <&clocks BCM2835_PLLH_PIX>,
 588                                  <&clocks BCM2835_CLOCK_HSM>;
 589                         clock-names = "pixel", "hdmi";
 590                         dmas = <&dma 17>;
 591                         dma-names = "audio-rx";
 592                         status = "disabled";
 593                 };
 594
 595                 usb: usb@7e980000 {
 596                         compatible = "brcm,bcm2835-usb";
 597                         reg = <0x7e980000 0x10000>;
 598                         interrupts = <1 9>;
 599                         #address-cells = <1>;
 600                         #size-cells = <0>;
 601                         clocks = <&clk_usb>;
 602                         clock-names = "otg";
 603                         phys = <&usbphy>;
 604                         phy-names = "usb2-phy";
 605                 };
 606
 607                 v3d: v3d@7ec00000 {
 608                         compatible = "brcm,bcm2835-v3d";
 609                         reg = <0x7ec00000 0x1000>;
 610                         interrupts = <1 10>;
 611                 };
 612
 613                 vc4: gpu {
 614                         compatible = "brcm,bcm2835-vc4";
 615                 };
 616         };
 617
 618         clocks {
 619                 compatible = "simple-bus";
 620                 #address-cells = <1>;
 621                 #size-cells = <0>;
 622
 623                 /* The oscillator is the root of the clock tree. */
 624                 clk_osc: clock@3 {
 625                         compatible = "fixed-clock";
 626                         reg = <3>;
 627                         #clock-cells = <0>;
 628                         clock-output-names = "osc";
 629                         clock-frequency = <19200000>;
 630                 };
 631
 632                 clk_usb: clock@4 {
 633                         compatible = "fixed-clock";
 634                         reg = <4>;
 635                         #clock-cells = <0>;
 636                         clock-output-names = "otg";
 637                         clock-frequency = <480000000>;
 638                 };
 639         };
 640
 641         usbphy: phy {
 642                 compatible = "usb-nop-xceiv";
 643                 #phy-cells = <0>;
 644         };
 645 };