Merge tag 'v4.15-rc1' into drm-misc-fixes
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / bcm2836.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 #include "bcm283x.dtsi"
3
4 / {
5         compatible = "brcm,bcm2836";
6
7         soc {
8                 ranges = <0x7e000000 0x3f000000 0x1000000>,
9                          <0x40000000 0x40000000 0x00001000>;
10                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
11
12                 local_intc: local_intc {
13                         compatible = "brcm,bcm2836-l1-intc";
14                         reg = <0x40000000 0x100>;
15                         interrupt-controller;
16                         #interrupt-cells = <1>;
17                         interrupt-parent = <&local_intc>;
18                 };
19
20                 arm-pmu {
21                         compatible = "arm,cortex-a7-pmu";
22                         interrupt-parent = <&local_intc>;
23                         interrupts = <9>;
24                 };
25         };
26
27         timer {
28                 compatible = "arm,armv7-timer";
29                 interrupt-parent = <&local_intc>;
30                 interrupts = <0>, // PHYS_SECURE_PPI
31                              <1>, // PHYS_NONSECURE_PPI
32                              <3>, // VIRT_PPI
33                              <2>; // HYP_PPI
34                 always-on;
35         };
36
37         cpus: cpus {
38                 #address-cells = <1>;
39                 #size-cells = <0>;
40                 enable-method = "brcm,bcm2836-smp";
41
42                 v7_cpu0: cpu@0 {
43                         device_type = "cpu";
44                         compatible = "arm,cortex-a7";
45                         reg = <0xf00>;
46                         clock-frequency = <800000000>;
47                 };
48
49                 v7_cpu1: cpu@1 {
50                         device_type = "cpu";
51                         compatible = "arm,cortex-a7";
52                         reg = <0xf01>;
53                         clock-frequency = <800000000>;
54                 };
55
56                 v7_cpu2: cpu@2 {
57                         device_type = "cpu";
58                         compatible = "arm,cortex-a7";
59                         reg = <0xf02>;
60                         clock-frequency = <800000000>;
61                 };
62
63                 v7_cpu3: cpu@3 {
64                         device_type = "cpu";
65                         compatible = "arm,cortex-a7";
66                         reg = <0xf03>;
67                         clock-frequency = <800000000>;
68                 };
69         };
70 };
71
72 /* Make the BCM2835-style global interrupt controller be a child of the
73  * CPU-local interrupt controller.
74  */
75 &intc {
76         compatible = "brcm,bcm2836-armctrl-ic";
77         reg = <0x7e00b200 0x200>;
78         interrupt-parent = <&local_intc>;
79         interrupts = <8>;
80 };
81
82 &cpu_thermal {
83         coefficients = <(-538)  407000>;
84 };
85
86 /* enable thermal sensor with the correct compatible property set */
87 &thermal {
88         compatible = "brcm,bcm2836-thermal";
89         status = "okay";
90 };