Merge tag 'md/3.15' of git://neil.brown.name/md
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / bcm2835.dtsi
1 /include/ "skeleton.dtsi"
2
3 / {
4         compatible = "brcm,bcm2835";
5         model = "BCM2835";
6         interrupt-parent = <&intc>;
7
8         chosen {
9                 bootargs = "earlyprintk console=ttyAMA0";
10         };
11
12         soc {
13                 compatible = "simple-bus";
14                 #address-cells = <1>;
15                 #size-cells = <1>;
16                 ranges = <0x7e000000 0x20000000 0x02000000>;
17
18                 timer@7e003000 {
19                         compatible = "brcm,bcm2835-system-timer";
20                         reg = <0x7e003000 0x1000>;
21                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
22                         clock-frequency = <1000000>;
23                 };
24
25                 dma: dma@7e007000 {
26                         compatible = "brcm,bcm2835-dma";
27                         reg = <0x7e007000 0xf00>;
28                         interrupts = <1 16>,
29                                      <1 17>,
30                                      <1 18>,
31                                      <1 19>,
32                                      <1 20>,
33                                      <1 21>,
34                                      <1 22>,
35                                      <1 23>,
36                                      <1 24>,
37                                      <1 25>,
38                                      <1 26>,
39                                      <1 27>,
40                                      <1 28>;
41
42                         #dma-cells = <1>;
43                         brcm,dma-channel-mask = <0x7f35>;
44                 };
45
46                 intc: interrupt-controller@7e00b200 {
47                         compatible = "brcm,bcm2835-armctrl-ic";
48                         reg = <0x7e00b200 0x200>;
49                         interrupt-controller;
50                         #interrupt-cells = <2>;
51                 };
52
53                 watchdog@7e100000 {
54                         compatible = "brcm,bcm2835-pm-wdt";
55                         reg = <0x7e100000 0x28>;
56                 };
57
58                 rng@7e104000 {
59                         compatible = "brcm,bcm2835-rng";
60                         reg = <0x7e104000 0x10>;
61                 };
62
63                 gpio: gpio@7e200000 {
64                         compatible = "brcm,bcm2835-gpio";
65                         reg = <0x7e200000 0xb4>;
66                         /*
67                          * The GPIO IP block is designed for 3 banks of GPIOs.
68                          * Each bank has a GPIO interrupt for itself.
69                          * There is an overall "any bank" interrupt.
70                          * In order, these are GIC interrupts 17, 18, 19, 20.
71                          * Since the BCM2835 only has 2 banks, the 2nd bank
72                          * interrupt output appears to be mirrored onto the
73                          * 3rd bank's interrupt signal.
74                          * So, a bank0 interrupt shows up on 17, 20, and
75                          * a bank1 interrupt shows up on 18, 19, 20!
76                          */
77                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
78
79                         gpio-controller;
80                         #gpio-cells = <2>;
81
82                         interrupt-controller;
83                         #interrupt-cells = <2>;
84                 };
85
86                 uart@7e201000 {
87                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
88                         reg = <0x7e201000 0x1000>;
89                         interrupts = <2 25>;
90                         clock-frequency = <3000000>;
91                         arm,primecell-periphid = <0x00241011>;
92                 };
93
94                 i2s: i2s@7e203000 {
95                         compatible = "brcm,bcm2835-i2s";
96                         reg = <0x7e203000 0x20>,
97                               <0x7e101098 0x02>;
98
99                         dmas = <&dma 2>,
100                                <&dma 3>;
101                         dma-names = "tx", "rx";
102                 };
103
104                 spi: spi@7e204000 {
105                         compatible = "brcm,bcm2835-spi";
106                         reg = <0x7e204000 0x1000>;
107                         interrupts = <2 22>;
108                         clocks = <&clk_spi>;
109                         #address-cells = <1>;
110                         #size-cells = <0>;
111                         status = "disabled";
112                 };
113
114                 i2c0: i2c@20205000 {
115                         compatible = "brcm,bcm2835-i2c";
116                         reg = <0x7e205000 0x1000>;
117                         interrupts = <2 21>;
118                         clocks = <&clk_i2c>;
119                         #address-cells = <1>;
120                         #size-cells = <0>;
121                         status = "disabled";
122                 };
123
124                 sdhci: sdhci@7e300000 {
125                         compatible = "brcm,bcm2835-sdhci";
126                         reg = <0x7e300000 0x100>;
127                         interrupts = <2 30>;
128                         clocks = <&clk_mmc>;
129                         status = "disabled";
130                 };
131
132                 i2c1: i2c@7e804000 {
133                         compatible = "brcm,bcm2835-i2c";
134                         reg = <0x7e804000 0x1000>;
135                         interrupts = <2 21>;
136                         clocks = <&clk_i2c>;
137                         #address-cells = <1>;
138                         #size-cells = <0>;
139                         status = "disabled";
140                 };
141
142                 usb@7e980000 {
143                         compatible = "brcm,bcm2835-usb";
144                         reg = <0x7e980000 0x10000>;
145                         interrupts = <1 9>;
146                 };
147
148                 arm-pmu {
149                         compatible = "arm,arm1176-pmu";
150                 };
151         };
152
153         clocks {
154                 compatible = "simple-bus";
155                 #address-cells = <1>;
156                 #size-cells = <0>;
157
158                 clk_mmc: clock@0 {
159                         compatible = "fixed-clock";
160                         reg = <0>;
161                         #clock-cells = <0>;
162                         clock-output-names = "mmc";
163                         clock-frequency = <100000000>;
164                 };
165
166                 clk_i2c: clock@1 {
167                         compatible = "fixed-clock";
168                         reg = <1>;
169                         #clock-cells = <0>;
170                         clock-output-names = "i2c";
171                         clock-frequency = <250000000>;
172                 };
173
174                 clk_spi: clock@2 {
175                         compatible = "fixed-clock";
176                         reg = <2>;
177                         #clock-cells = <0>;
178                         clock-output-names = "spi";
179                         clock-frequency = <250000000>;
180                 };
181         };
182 };