ARM: dts: bcm23550: Add device tree files
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / bcm23550.dtsi
1 /*
2  *  BSD LICENSE
3  *
4  *  Copyright(c) 2016 Broadcom.  All rights reserved.
5  *
6  *  Redistribution and use in source and binary forms, with or without
7  *  modification, are permitted provided that the following conditions
8  *  are met:
9  *
10  *    * Redistributions of source code must retain the above copyright
11  *      notice, this list of conditions and the following disclaimer.
12  *    * Redistributions in binary form must reproduce the above copyright
13  *      notice, this list of conditions and the following disclaimer in
14  *      the documentation and/or other materials provided with the
15  *      distribution.
16  *    * Neither the name of Broadcom Corporation nor the names of its
17  *      contributors may be used to endorse or promote products derived
18  *      from this software without specific prior written permission.
19  *
20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35
36 /* BCM23550 and BCM21664 have almost identical clocks */
37 #include "dt-bindings/clock/bcm21664.h"
38
39 #include "skeleton.dtsi"
40
41 / {
42         model = "BCM23550 SoC";
43         compatible = "brcm,bcm23550";
44         interrupt-parent = <&gic>;
45
46         cpus {
47                 #address-cells = <1>;
48                 #size-cells = <0>;
49
50                 cpu0: cpu@0 {
51                         device_type = "cpu";
52                         compatible = "arm,cortex-a7";
53                         reg = <0>;
54                         clock-frequency = <1000000000>;
55                 };
56
57                 cpu1: cpu@1 {
58                         device_type = "cpu";
59                         compatible = "arm,cortex-a7";
60                         enable-method = "brcm,bcm23550";
61                         secondary-boot-reg = <0x35004178>;
62                         reg = <1>;
63                         clock-frequency = <1000000000>;
64                 };
65
66                 cpu2: cpu@2 {
67                         device_type = "cpu";
68                         compatible = "arm,cortex-a7";
69                         enable-method = "brcm,bcm23550";
70                         secondary-boot-reg = <0x35004178>;
71                         reg = <2>;
72                         clock-frequency = <1000000000>;
73                 };
74
75                 cpu3: cpu@3 {
76                         device_type = "cpu";
77                         compatible = "arm,cortex-a7";
78                         enable-method = "brcm,bcm23550";
79                         secondary-boot-reg = <0x35004178>;
80                         reg = <3>;
81                         clock-frequency = <1000000000>;
82                 };
83         };
84
85         /* Hub bus */
86         hub@34000000 {
87                 compatible = "simple-bus";
88                 ranges = <0 0x34000000 0x102f83ac>;
89                 #address-cells = <1>;
90                 #size-cells = <1>;
91
92                 smc@4e000 {
93                         compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
94                         reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
95                 };
96
97                 resetmgr: reset-controller@1001f00 {
98                         compatible = "brcm,bcm21664-resetmgr";
99                         reg = <0x01001f00 0x24>;
100                 };
101
102                 gpio: gpio@1003000 {
103                         compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
104                         reg = <0x01003000 0x524>;
105                         interrupts =
106                                <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
107                                 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
108                                 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
109                                 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
110                         #gpio-cells = <2>;
111                         #interrupt-cells = <2>;
112                         gpio-controller;
113                         interrupt-controller;
114                 };
115
116                 timer@1006000 {
117                         compatible = "brcm,kona-timer";
118                         reg = <0x01006000 0x1c>;
119                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
120                         clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
121                 };
122         };
123
124         /* Slaves bus */
125         slaves@3e000000 {
126                 compatible = "simple-bus";
127                 ranges = <0 0x3e000000 0x0001c070>;
128                 #address-cells = <1>;
129                 #size-cells = <1>;
130
131                 uartb: serial@0 {
132                         compatible = "snps,dw-apb-uart";
133                         status = "disabled";
134                         reg = <0x00000000 0x118>;
135                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
136                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
137                         reg-shift = <2>;
138                         reg-io-width = <4>;
139                 };
140
141                 uartb2: serial@1000 {
142                         compatible = "snps,dw-apb-uart";
143                         status = "disabled";
144                         reg = <0x00001000 0x118>;
145                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
146                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
147                         reg-shift = <2>;
148                         reg-io-width = <4>;
149                 };
150
151                 uartb3: serial@2000 {
152                         compatible = "snps,dw-apb-uart";
153                         status = "disabled";
154                         reg = <0x00002000 0x118>;
155                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
156                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
157                         reg-shift = <2>;
158                         reg-io-width = <4>;
159                 };
160
161                 bsc1: i2c@16000 {
162                         compatible = "brcm,kona-i2c";
163                         reg = <0x00016000 0x70>;
164                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
165                         #address-cells = <1>;
166                         #size-cells = <0>;
167                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
168                         status = "disabled";
169                 };
170
171                 bsc2: i2c@17000 {
172                         compatible = "brcm,kona-i2c";
173                         reg = <0x00017000 0x70>;
174                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
175                         #address-cells = <1>;
176                         #size-cells = <0>;
177                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
178                         status = "disabled";
179                 };
180
181                 bsc3: i2c@18000 {
182                         compatible = "brcm,kona-i2c";
183                         reg = <0x00018000 0x70>;
184                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
185                         #address-cells = <1>;
186                         #size-cells = <0>;
187                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
188                         status = "disabled";
189                 };
190
191                 bsc4: i2c@1c000 {
192                         compatible = "brcm,kona-i2c";
193                         reg = <0x0001c000 0x70>;
194                         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
195                         #address-cells = <1>;
196                         #size-cells = <0>;
197                         clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
198                         status = "disabled";
199                 };
200         };
201
202         /* Apps bus */
203         apps@3e300000 {
204                 compatible = "simple-bus";
205                 ranges = <0 0x3e300000 0x01b77000>;
206                 #address-cells = <1>;
207                 #size-cells = <1>;
208
209                 usbotg: usb@e20000 {
210                         compatible = "snps,dwc2";
211                         reg = <0x00e20000 0x10000>;
212                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
213                         clocks = <&usb_otg_ahb_clk>;
214                         clock-names = "otg";
215                         phys = <&usbphy>;
216                         phy-names = "usb2-phy";
217                         status = "disabled";
218                 };
219
220                 usbphy: usb-phy@e30000 {
221                         compatible = "brcm,kona-usb2-phy";
222                         reg = <0x00e30000 0x28>;
223                         #phy-cells = <0>;
224                         status = "disabled";
225                 };
226
227                 sdio1: sdio@e80000 {
228                         compatible = "brcm,kona-sdhci";
229                         reg = <0x00e80000 0x801c>;
230                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
231                         clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
232                         status = "disabled";
233                 };
234
235                 sdio2: sdio@e90000 {
236                         compatible = "brcm,kona-sdhci";
237                         reg = <0x00e90000 0x801c>;
238                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
239                         clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
240                         status = "disabled";
241                 };
242
243                 sdio3: sdio@ea0000 {
244                         compatible = "brcm,kona-sdhci";
245                         reg = <0x00ea0000 0x801c>;
246                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
247                         clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
248                         status = "disabled";
249                 };
250
251                 sdio4: sdio@eb0000 {
252                         compatible = "brcm,kona-sdhci";
253                         reg = <0x00eb0000 0x801c>;
254                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
255                         clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
256                         status = "disabled";
257                 };
258
259                 cdc: cdc@1b0e000 {
260                         compatible = "brcm,bcm23550-cdc";
261                         reg = <0x01b0e000 0x78>;
262                 };
263
264                 gic: interrupt-controller@1b21000 {
265                         compatible = "arm,cortex-a9-gic";
266                         #interrupt-cells = <3>;
267                         #address-cells = <0>;
268                         interrupt-controller;
269                         reg = <0x01b21000 0x1000>,
270                               <0x01b22000 0x1000>;
271                 };
272         };
273
274         clocks {
275                 #address-cells = <1>;
276                 #size-cells = <1>;
277                 ranges;
278
279                 /*
280                  * Fixed clocks are defined before CCUs whose
281                  * clocks may depend on them.
282                  */
283
284                 ref_32k_clk: ref_32k {
285                         #clock-cells = <0>;
286                         compatible = "fixed-clock";
287                         clock-frequency = <32768>;
288                 };
289
290                 bbl_32k_clk: bbl_32k {
291                         #clock-cells = <0>;
292                         compatible = "fixed-clock";
293                         clock-frequency = <32768>;
294                 };
295
296                 ref_13m_clk: ref_13m {
297                         #clock-cells = <0>;
298                         compatible = "fixed-clock";
299                         clock-frequency = <13000000>;
300                 };
301
302                 var_13m_clk: var_13m {
303                         #clock-cells = <0>;
304                         compatible = "fixed-clock";
305                         clock-frequency = <13000000>;
306                 };
307
308                 dft_19_5m_clk: dft_19_5m {
309                         #clock-cells = <0>;
310                         compatible = "fixed-clock";
311                         clock-frequency = <19500000>;
312                 };
313
314                 ref_crystal_clk: ref_crystal {
315                         #clock-cells = <0>;
316                         compatible = "fixed-clock";
317                         clock-frequency = <26000000>;
318                 };
319
320                 ref_52m_clk: ref_52m {
321                         #clock-cells = <0>;
322                         compatible = "fixed-clock";
323                         clock-frequency = <52000000>;
324                 };
325
326                 var_52m_clk: var_52m {
327                         #clock-cells = <0>;
328                         compatible = "fixed-clock";
329                         clock-frequency = <52000000>;
330                 };
331
332                 usb_otg_ahb_clk: usb_otg_ahb {
333                         #clock-cells = <0>;
334                         compatible = "fixed-clock";
335                         clock-frequency = <52000000>;
336                 };
337
338                 ref_96m_clk: ref_96m {
339                         #clock-cells = <0>;
340                         compatible = "fixed-clock";
341                         clock-frequency = <96000000>;
342                 };
343
344                 var_96m_clk: var_96m {
345                         #clock-cells = <0>;
346                         compatible = "fixed-clock";
347                         clock-frequency = <96000000>;
348                 };
349
350                 ref_104m_clk: ref_104m {
351                         #clock-cells = <0>;
352                         compatible = "fixed-clock";
353                         clock-frequency = <104000000>;
354                 };
355
356                 var_104m_clk: var_104m {
357                         #clock-cells = <0>;
358                         compatible = "fixed-clock";
359                         clock-frequency = <104000000>;
360                 };
361
362                 ref_156m_clk: ref_156m {
363                         #clock-cells = <0>;
364                         compatible = "fixed-clock";
365                         clock-frequency = <156000000>;
366                 };
367
368                 var_156m_clk: var_156m {
369                         #clock-cells = <0>;
370                         compatible = "fixed-clock";
371                         clock-frequency = <156000000>;
372                 };
373
374                 root_ccu: root_ccu {
375                         compatible = BCM21664_DT_ROOT_CCU_COMPAT;
376                         reg = <0x35001000 0x0f00>;
377                         #clock-cells = <1>;
378                         clock-output-names = "frac_1m";
379                 };
380
381                 aon_ccu: aon_ccu {
382                         compatible = BCM21664_DT_AON_CCU_COMPAT;
383                         reg = <0x35002000 0x0f00>;
384                         #clock-cells = <1>;
385                         clock-output-names = "hub_timer";
386                 };
387
388                 slave_ccu: slave_ccu {
389                         compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
390                         reg = <0x3e011000 0x0f00>;
391                         #clock-cells = <1>;
392                         clock-output-names = "uartb",
393                                              "uartb2",
394                                              "uartb3",
395                                              "bsc1",
396                                              "bsc2",
397                                              "bsc3",
398                                              "bsc4";
399                 };
400
401                 master_ccu: master_ccu {
402                         compatible = BCM21664_DT_MASTER_CCU_COMPAT;
403                         reg = <0x3f001000 0x0f00>;
404                         #clock-cells = <1>;
405                         clock-output-names = "sdio1",
406                                              "sdio2",
407                                              "sdio3",
408                                              "sdio4",
409                                              "sdio1_sleep",
410                                              "sdio2_sleep",
411                                              "sdio3_sleep",
412                                              "sdio4_sleep";
413                 };
414         };
415 };