arch/arm/boot/dts/bcm11351.dtsi

   1 /*
   2  * Copyright (C) 2012-2013 Broadcom Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation version 2.
   7  *
   8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   9  * kind, whether express or implied; without even the implied warranty
  10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <dt-bindings/interrupt-controller/arm-gic.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16
  17 #include "dt-bindings/clock/bcm281xx.h"
  18
  19 #include "skeleton.dtsi"
  20
  21 / {
  22         model = "BCM11351 SoC";
  23         compatible = "brcm,bcm11351";
  24         interrupt-parent = <&gic>;
  25
  26         chosen {
  27                 bootargs = "console=ttyS0,115200n8";
  28         };
  29
  30         gic: interrupt-controller@3ff00100 {
  31                 compatible = "arm,cortex-a9-gic";
  32                 #interrupt-cells = <3>;
  33                 #address-cells = <0>;
  34                 interrupt-controller;
  35                 reg = <0x3ff01000 0x1000>,
  36                       <0x3ff00100 0x100>;
  37         };
  38
  39         smc@0x3404c000 {
  40                 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
  41                 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
  42         };
  43
  44         uart@3e000000 {
  45                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  46                 status = "disabled";
  47                 reg = <0x3e000000 0x1000>;
  48                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
  49                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
  50                 reg-shift = <2>;
  51                 reg-io-width = <4>;
  52         };
  53
  54         uart@3e001000 {
  55                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  56                 status = "disabled";
  57                 reg = <0x3e001000 0x1000>;
  58                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
  59                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
  60                 reg-shift = <2>;
  61                 reg-io-width = <4>;
  62         };
  63
  64         uart@3e002000 {
  65                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  66                 status = "disabled";
  67                 reg = <0x3e002000 0x1000>;
  68                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
  69                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
  70                 reg-shift = <2>;
  71                 reg-io-width = <4>;
  72         };
  73
  74         uart@3e003000 {
  75                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  76                 status = "disabled";
  77                 reg = <0x3e003000 0x1000>;
  78                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
  79                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
  80                 reg-shift = <2>;
  81                 reg-io-width = <4>;
  82         };
  83
  84         L2: l2-cache {
  85                 compatible = "brcm,bcm11351-a2-pl310-cache";
  86                 reg = <0x3ff20000 0x1000>;
  87                 cache-unified;
  88                 cache-level = <2>;
  89         };
  90
  91         watchdog@35002f40 {
  92                 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
  93                 reg = <0x35002f40 0x6c>;
  94         };
  95
  96         timer@35006000 {
  97                 compatible = "brcm,kona-timer";
  98                 reg = <0x35006000 0x1000>;
  99                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 100                 clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
 101         };
 102
 103         gpio: gpio@35003000 {
 104                 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
 105                 reg = <0x35003000 0x800>;
 106                 interrupts =
 107                        <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
 108                         GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
 109                         GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
 110                         GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 111                         GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
 112                         GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 113                 #gpio-cells = <2>;
 114                 #interrupt-cells = <2>;
 115                 gpio-controller;
 116                 interrupt-controller;
 117         };
 118
 119         sdio1: sdio@3f180000 {
 120                 compatible = "brcm,kona-sdhci";
 121                 reg = <0x3f180000 0x10000>;
 122                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 123                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
 124                 status = "disabled";
 125         };
 126
 127         sdio2: sdio@3f190000 {
 128                 compatible = "brcm,kona-sdhci";
 129                 reg = <0x3f190000 0x10000>;
 130                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 131                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
 132                 status = "disabled";
 133         };
 134
 135         sdio3: sdio@3f1a0000 {
 136                 compatible = "brcm,kona-sdhci";
 137                 reg = <0x3f1a0000 0x10000>;
 138                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 139                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
 140                 status = "disabled";
 141         };
 142
 143         sdio4: sdio@3f1b0000 {
 144                 compatible = "brcm,kona-sdhci";
 145                 reg = <0x3f1b0000 0x10000>;
 146                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 147                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
 148                 status = "disabled";
 149         };
 150
 151         pinctrl@35004800 {
 152                 compatible = "brcm,bcm11351-pinctrl";
 153                 reg = <0x35004800 0x430>;
 154         };
 155
 156         i2c@3e016000 {
 157                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 158                 reg = <0x3e016000 0x80>;
 159                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 160                 #address-cells = <1>;
 161                 #size-cells = <0>;
 162                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
 163                 status = "disabled";
 164         };
 165
 166         i2c@3e017000 {
 167                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 168                 reg = <0x3e017000 0x80>;
 169                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 170                 #address-cells = <1>;
 171                 #size-cells = <0>;
 172                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
 173                 status = "disabled";
 174         };
 175
 176         i2c@3e018000 {
 177                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 178                 reg = <0x3e018000 0x80>;
 179                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 180                 #address-cells = <1>;
 181                 #size-cells = <0>;
 182                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
 183                 status = "disabled";
 184         };
 185
 186         i2c@3500d000 {
 187                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 188                 reg = <0x3500d000 0x80>;
 189                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 190                 #address-cells = <1>;
 191                 #size-cells = <0>;
 192                 clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
 193                 status = "disabled";
 194         };
 195
 196         clocks {
 197                 #address-cells = <1>;
 198                 #size-cells = <1>;
 199                 ranges;
 200
 201                 root_ccu: root_ccu {
 202                         compatible = "brcm,bcm11351-root-ccu";
 203                         reg = <0x35001000 0x0f00>;
 204                         #clock-cells = <1>;
 205                         clock-output-names = "frac_1m";
 206                 };
 207
 208                 hub_ccu: hub_ccu {
 209                         compatible = "brcm,bcm11351-hub-ccu";
 210                         reg = <0x34000000 0x0f00>;
 211                         #clock-cells = <1>;
 212                         clock-output-names = "tmon_1m";
 213                 };
 214
 215                 aon_ccu: aon_ccu {
 216                         compatible = "brcm,bcm11351-aon-ccu";
 217                         reg = <0x35002000 0x0f00>;
 218                         #clock-cells = <1>;
 219                         clock-output-names = "hub_timer",
 220                                              "pmu_bsc",
 221                                              "pmu_bsc_var";
 222                 };
 223
 224                 master_ccu: master_ccu {
 225                         compatible = "brcm,bcm11351-master-ccu";
 226                         reg = <0x3f001000 0x0f00>;
 227                         #clock-cells = <1>;
 228                         clock-output-names = "sdio1",
 229                                              "sdio2",
 230                                              "sdio3",
 231                                              "sdio4",
 232                                              "usb_ic",
 233                                              "hsic2_48m",
 234                                              "hsic2_12m";
 235                 };
 236
 237                 slave_ccu: slave_ccu {
 238                         compatible = "brcm,bcm11351-slave-ccu";
 239                         reg = <0x3e011000 0x0f00>;
 240                         #clock-cells = <1>;
 241                         clock-output-names = "uartb",
 242                                              "uartb2",
 243                                              "uartb3",
 244                                              "uartb4",
 245                                              "ssp0",
 246                                              "ssp2",
 247                                              "bsc1",
 248                                              "bsc2",
 249                                              "bsc3",
 250                                              "pwm";
 251                 };
 252
 253                 ref_1m_clk: ref_1m {
 254                         #clock-cells = <0>;
 255                         compatible = "fixed-clock";
 256                         clock-frequency = <1000000>;
 257                 };
 258
 259                 ref_32k_clk: ref_32k {
 260                         #clock-cells = <0>;
 261                         compatible = "fixed-clock";
 262                         clock-frequency = <32768>;
 263                 };
 264
 265                 bbl_32k_clk: bbl_32k {
 266                         #clock-cells = <0>;
 267                         compatible = "fixed-clock";
 268                         clock-frequency = <32768>;
 269                 };
 270
 271                 ref_13m_clk: ref_13m {
 272                         #clock-cells = <0>;
 273                         compatible = "fixed-clock";
 274                         clock-frequency = <13000000>;
 275                 };
 276
 277                 var_13m_clk: var_13m {
 278                         #clock-cells = <0>;
 279                         compatible = "fixed-clock";
 280                         clock-frequency = <13000000>;
 281                 };
 282
 283                 dft_19_5m_clk: dft_19_5m {
 284                         #clock-cells = <0>;
 285                         compatible = "fixed-clock";
 286                         clock-frequency = <19500000>;
 287                 };
 288
 289                 ref_crystal_clk: ref_crystal {
 290                         #clock-cells = <0>;
 291                         compatible = "fixed-clock";
 292                         clock-frequency = <26000000>;
 293                 };
 294
 295                 ref_cx40_clk: ref_cx40 {
 296                         #clock-cells = <0>;
 297                         compatible = "fixed-clock";
 298                         clock-frequency = <40000000>;
 299                 };
 300
 301                 ref_52m_clk: ref_52m {
 302                         #clock-cells = <0>;
 303                         compatible = "fixed-clock";
 304                         clock-frequency = <52000000>;
 305                 };
 306
 307                 var_52m_clk: var_52m {
 308                         #clock-cells = <0>;
 309                         compatible = "fixed-clock";
 310                         clock-frequency = <52000000>;
 311                 };
 312
 313                 usb_otg_ahb_clk: usb_otg_ahb {
 314                         compatible = "fixed-clock";
 315                         clock-frequency = <52000000>;
 316                         #clock-cells = <0>;
 317                 };
 318
 319                 ref_96m_clk: ref_96m {
 320                         #clock-cells = <0>;
 321                         compatible = "fixed-clock";
 322                         clock-frequency = <96000000>;
 323                 };
 324
 325                 var_96m_clk: var_96m {
 326                         #clock-cells = <0>;
 327                         compatible = "fixed-clock";
 328                         clock-frequency = <96000000>;
 329                 };
 330
 331                 ref_104m_clk: ref_104m {
 332                         #clock-cells = <0>;
 333                         compatible = "fixed-clock";
 334                         clock-frequency = <104000000>;
 335                 };
 336
 337                 var_104m_clk: var_104m {
 338                         #clock-cells = <0>;
 339                         compatible = "fixed-clock";
 340                         clock-frequency = <104000000>;
 341                 };
 342
 343                 ref_156m_clk: ref_156m {
 344                         #clock-cells = <0>;
 345                         compatible = "fixed-clock";
 346                         clock-frequency = <156000000>;
 347                 };
 348
 349                 var_156m_clk: var_156m {
 350                         #clock-cells = <0>;
 351                         compatible = "fixed-clock";
 352                         clock-frequency = <156000000>;
 353                 };
 354
 355                 ref_208m_clk: ref_208m {
 356                         #clock-cells = <0>;
 357                         compatible = "fixed-clock";
 358                         clock-frequency = <208000000>;
 359                 };
 360
 361                 var_208m_clk: var_208m {
 362                         #clock-cells = <0>;
 363                         compatible = "fixed-clock";
 364                         clock-frequency = <208000000>;
 365                 };
 366
 367                 ref_312m_clk: ref_312m {
 368                         #clock-cells = <0>;
 369                         compatible = "fixed-clock";
 370                         clock-frequency = <312000000>;
 371                 };
 372
 373                 var_312m_clk: var_312m {
 374                         #clock-cells = <0>;
 375                         compatible = "fixed-clock";
 376                         clock-frequency = <312000000>;
 377                 };
 378         };
 379
 380         usbotg: usb@3f120000 {
 381                 compatible = "snps,dwc2";
 382                 reg = <0x3f120000 0x10000>;
 383                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 384                 clocks = <&usb_otg_ahb_clk>;
 385                 clock-names = "otg";
 386                 phys = <&usbphy>;
 387                 phy-names = "usb2-phy";
 388                 status = "disabled";
 389         };
 390
 391         usbphy: usb-phy@3f130000 {
 392                 compatible = "brcm,kona-usb2-phy";
 393                 reg = <0x3f130000 0x28>;
 394                 #phy-cells = <0>;
 395                 status = "disabled";
 396         };
 397 };