arch/arm/boot/dts/atlas7.dtsi

   1 /*
   2  * DTS file for CSR SiRFatlas7 SoC
   3  *
   4  * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
   5  *
   6  * Licensed under GPLv2 or later.
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10 / {
  11         compatible = "sirf,atlas7";
  12         #address-cells = <1>;
  13         #size-cells = <1>;
  14         interrupt-parent = <&gic>;
  15         aliases {
  16                 serial0 = &uart0;
  17                 serial1 = &uart1;
  18                 serial2 = &uart2;
  19                 serial3 = &uart3;
  20                 serial4 = &uart4;
  21                 serial5 = &uart5;
  22                 serial6 = &uart6;
  23                 serial9 = &usp2;
  24         };
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         reg = <0>;
  33                 };
  34                 cpu@1 {
  35                         device_type = "cpu";
  36                         compatible = "arm,cortex-a7";
  37                         reg = <1>;
  38                 };
  39         };
  40
  41         clocks {
  42                 xinw {
  43                         compatible = "fixed-clock";
  44                         #clock-cells = <0>;
  45                         clock-frequency = <32768>;
  46                         clock-output-names = "xinw";
  47                 };
  48                 xin {
  49                         compatible = "fixed-clock";
  50                         #clock-cells = <0>;
  51                         clock-frequency = <26000000>;
  52                         clock-output-names = "xin";
  53                 };
  54         };
  55
  56         noc {
  57                 compatible = "simple-bus";
  58                 #address-cells = <1>;
  59                 #size-cells = <1>;
  60                 ranges = <0x10000000 0x10000000 0xc0000000>;
  61
  62                 gic: interrupt-controller@10301000 {
  63                         compatible = "arm,cortex-a9-gic";
  64                         interrupt-controller;
  65                         #interrupt-cells = <3>;
  66                         reg = <0x10301000 0x1000>,
  67                              <0x10302000 0x0100>;
  68                 };
  69
  70                 pmu_regulator: pmu_regulator@10E30020 {
  71                         compatible = "sirf,atlas7-pmu-ldo";
  72                         reg = <0x10E30020 0x4>;
  73                         ldo: ldo {
  74                                 regulator-name = "ldo";
  75                         };
  76                 };
  77
  78                 atlas7_codec: atlas7_codec@10E30000 {
  79                         #sound-dai-cells = <0>;
  80                         compatible = "sirf,atlas7-codec";
  81                         reg = <0x10E30000 0x400>;
  82                         clocks = <&car 62>;
  83                         ldo-supply = <&ldo>;
  84                 };
  85
  86                 atlas7_iacc: atlas7_iacc@10D01000 {
  87                         #sound-dai-cells = <0>;
  88                         compatible = "sirf,atlas7-iacc";
  89                         reg = <0x10D01000 0x100>;
  90                         dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>,
  91                                 <&dmac3 3>, <&dmac3 9>;
  92                         dma-names = "rx", "tx0", "tx1", "tx2", "tx3";
  93                         clocks = <&car 62>;
  94                 };
  95
  96                 ipc@13240000 {
  97                         compatible = "sirf,atlas7-ipc";
  98                         ranges = <0x13240000 0x13240000 0x00010000>;
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101
 102                         hwspinlock {
 103                                 compatible = "sirf,hwspinlock";
 104                                 reg = <0x13240000 0x00010000>;
 105
 106                                 num-spinlocks = <30>;
 107                         };
 108
 109                         ns_m3_rproc@0 {
 110                                 compatible = "sirf,ns2m30-rproc";
 111                                 reg = <0x13240000 0x00010000>;
 112                                 interrupts = <0 123 0>;
 113                         };
 114
 115                         ns_m3_rproc@1 {
 116                                 compatible = "sirf,ns2m31-rproc";
 117                                 reg = <0x13240000 0x00010000>;
 118                                 interrupts = <0 126 0>;
 119                         };
 120
 121                         ns_kal_rproc@0 {
 122                                 compatible = "sirf,ns2kal0-rproc";
 123                                 reg = <0x13240000 0x00010000>;
 124                                 interrupts = <0 124 0>;
 125                         };
 126
 127                         ns_kal_rproc@1 {
 128                                 compatible = "sirf,ns2kal1-rproc";
 129                                 reg = <0x13240000 0x00010000>;
 130                                 interrupts = <0 127 0>;
 131                         };
 132                 };
 133
 134                 pinctrl: ioc@18880000 {
 135                         compatible = "sirf,atlas7-ioc";
 136                         reg = <0x18880000 0x1000>,
 137                                 <0x10E40000 0x1000>;
 138                 };
 139
 140                 pmipc {
 141                         compatible = "arteris, flexnoc", "simple-bus";
 142                         #address-cells = <1>;
 143                         #size-cells = <1>;
 144                         ranges = <0x13240000 0x13240000 0x00010000>;
 145                         pmipc@0x13240000 {
 146                                 compatible = "sirf,atlas7-pmipc";
 147                                 reg = <0x13240000 0x00010000>;
 148                         };
 149                 };
 150
 151                 dramfw {
 152                         compatible = "arteris, flexnoc", "simple-bus";
 153                         #address-cells = <1>;
 154                         #size-cells = <1>;
 155                         ranges = <0x10830000 0x10830000 0x18000>;
 156                         dramfw@10820000 {
 157                                 compatible = "sirf,nocfw-dramfw";
 158                                 reg = <0x10830000 0x18000>;
 159                         };
 160                 };
 161
 162                 spramfw {
 163                         compatible = "arteris, flexnoc", "simple-bus";
 164                         #address-cells = <1>;
 165                         #size-cells = <1>;
 166                         ranges = <0x10250000 0x10250000 0x3000>;
 167                         spramfw@10820000 {
 168                                 compatible = "sirf,nocfw-spramfw";
 169                                 reg = <0x10250000 0x3000>;
 170                         };
 171                 };
 172
 173                 cpum {
 174                         compatible = "arteris, flexnoc", "simple-bus";
 175                         #address-cells = <1>;
 176                         #size-cells = <1>;
 177                         ranges = <0x10200000 0x10200000 0x3000>;
 178                         cpum@10200000 {
 179                                 compatible = "sirf,nocfw-cpum";
 180                                 reg = <0x10200000 0x3000>;
 181                         };
 182                 };
 183
 184                 cgum {
 185                         compatible = "arteris, flexnoc", "simple-bus";
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188                         ranges = <0x18641000 0x18641000 0x3000>,
 189                                          <0x18620000 0x18620000 0x1000>;
 190
 191                         cgum@18641000 {
 192                                 compatible = "sirf,nocfw-cgum";
 193                                 reg = <0x18641000 0x3000>;
 194                         };
 195
 196                         car: clock-controller@18620000 {
 197                                 compatible = "sirf,atlas7-car";
 198                                 reg = <0x18620000 0x1000>;
 199                                 #clock-cells = <1>;
 200                                 #reset-cells = <1>;
 201                         };
 202                 };
 203
 204                 gnssm {
 205                         compatible = "arteris, flexnoc", "simple-bus";
 206                         #address-cells = <1>;
 207                         #size-cells = <1>;
 208                         ranges = <0x18000000 0x18000000 0x0000ffff>,
 209                                 <0x18010000 0x18010000 0x1000>,
 210                                 <0x18020000 0x18020000 0x1000>,
 211                                 <0x18030000 0x18030000 0x1000>,
 212                                 <0x18040000 0x18040000 0x1000>,
 213                                 <0x18050000 0x18050000 0x1000>,
 214                                 <0x18060000 0x18060000 0x1000>,
 215                                 <0x18100000 0x18100000 0x3000>,
 216                                 <0x18250000 0x18250000 0x10000>,
 217                                 <0x18200000 0x18200000 0x1000>;
 218
 219                         dmac0: dma-controller@18000000 {
 220                                 cell-index = <0>;
 221                                 compatible = "sirf,atlas7-dmac";
 222                                 reg = <0x18000000 0x1000>;
 223                                 interrupts = <0 12 0>;
 224                                 clocks = <&car 89>;
 225                                 dma-channels = <16>;
 226                                 #dma-cells = <1>;
 227                         };
 228
 229                         gnssmfw@0x18100000 {
 230                                 compatible = "sirf,nocfw-gnssm";
 231                                 reg = <0x18100000 0x3000>;
 232                         };
 233
 234                         uart0: uart@18010000 {
 235                                 cell-index = <0>;
 236                                 compatible = "sirf,atlas7-uart";
 237                                 reg = <0x18010000 0x1000>;
 238                                 interrupts = <0 17 0>;
 239                                 clocks = <&car 90>;
 240                                 fifosize = <128>;
 241                                 dmas = <&dmac0 3>, <&dmac0 2>;
 242                                 dma-names = "rx", "tx";
 243                         };
 244
 245                         uart1: uart@18020000 {
 246                                 cell-index = <1>;
 247                                 compatible = "sirf,atlas7-uart";
 248                                 reg = <0x18020000 0x1000>;
 249                                 interrupts = <0 18 0>;
 250                                 clocks = <&car 88>;
 251                                 fifosize = <32>;
 252                         };
 253
 254                         uart2: uart@18030000 {
 255                                 cell-index = <2>;
 256                                 compatible = "sirf,atlas7-uart";
 257                                 reg = <0x18030000 0x1000>;
 258                                 interrupts = <0 19 0>;
 259                                 clocks = <&car 91>;
 260                                 fifosize = <128>;
 261                                 dmas = <&dmac0 6>, <&dmac0 7>;
 262                                 dma-names = "rx", "tx";
 263                                 status = "disabled";
 264                         };
 265                         uart3: uart@18040000 {
 266                                 cell-index = <3>;
 267                                 compatible = "sirf,atlas7-uart";
 268                                 reg = <0x18040000 0x1000>;
 269                                 interrupts = <0 66 0>;
 270                                 clocks = <&car 92>;
 271                                 fifosize = <128>;
 272                                 dmas = <&dmac0 4>, <&dmac0 5>;
 273                                 dma-names = "rx", "tx";
 274                                 status = "disabled";
 275                         };
 276                         uart4: uart@18050000 {
 277                                 cell-index = <4>;
 278                                 compatible = "sirf,atlas7-uart";
 279                                 reg = <0x18050000 0x1000>;
 280                                 interrupts = <0 69 0>;
 281                                 clocks = <&car 93>;
 282                                 fifosize = <128>;
 283                                 dmas = <&dmac0 0>, <&dmac0 1>;
 284                                 dma-names = "rx", "tx";
 285                                 status = "disabled";
 286                         };
 287                         uart5: uart@18060000 {
 288                                 cell-index = <5>;
 289                                 compatible = "sirf,atlas7-uart";
 290                                 reg = <0x18060000 0x1000>;
 291                                 interrupts = <0 71 0>;
 292                                 clocks = <&car 94>;
 293                                 fifosize = <128>;
 294                                 dmas = <&dmac0 8>, <&dmac0 9>;
 295                                 dma-names = "rx", "tx";
 296                                 status = "disabled";
 297                         };
 298                         dspub@18250000 {
 299                                 compatible = "dx,cc44p";
 300                                 reg = <0x18250000 0x10000>;
 301                                 interrupts = <0 27 0>;
 302                         };
 303
 304                         spi1: spi@18200000 {
 305                                 compatible = "sirf,prima2-spi";
 306                                 reg = <0x18200000 0x1000>;
 307                                 interrupts = <0 16 0>;
 308                                 clocks = <&car 95>;
 309                                 #address-cells = <1>;
 310                                 #size-cells = <0>;
 311                                 dmas = <&dmac0 12>, <&dmac0 13>;
 312                                 dma-names = "rx", "tx";
 313                                 status = "disabled";
 314                         };
 315                 };
 316
 317
 318                 gpum {
 319                         compatible = "arteris, flexnoc", "simple-bus";
 320                         #address-cells = <1>;
 321                         #size-cells = <1>;
 322                         ranges = <0x13000000 0x13000000 0x3000>;
 323                         gpum@0x13000000 {
 324                                 compatible = "sirf,nocfw-gpum";
 325                                 reg = <0x13000000 0x3000>;
 326                         };
 327                 };
 328
 329                 mediam {
 330                         compatible = "arteris, flexnoc", "simple-bus";
 331                         #address-cells = <1>;
 332                         #size-cells = <1>;
 333                         ranges = <0x16000000 0x16000000 0x00200000>,
 334                                 <0x17020000 0x17020000 0x1000>,
 335                                 <0x17030000 0x17030000 0x1000>,
 336                                 <0x17040000 0x17040000 0x1000>,
 337                                 <0x17050000 0x17050000 0x10000>,
 338                                 <0x17060000 0x17060000 0x200>,
 339                                 <0x17060200 0x17060200 0x100>,
 340                                 <0x17070000 0x17070000 0x200>,
 341                                 <0x17070200 0x17070200 0x100>,
 342                                 <0x170A0000 0x170A0000 0x3000>;
 343
 344                         mediam@170A0000 {
 345                                 compatible = "sirf,nocfw-mediam";
 346                                 reg = <0x170A0000 0x3000>;
 347                         };
 348
 349                         gpio_0: gpio_mediam@17040000 {
 350                                 #gpio-cells = <2>;
 351                                 #interrupt-cells = <2>;
 352                                 compatible = "sirf,atlas7-gpio";
 353                                 reg = <0x17040000 0x1000>;
 354                                 interrupts = <0 13 0>, <0 14 0>;
 355                                 clocks = <&car 107>;
 356                                 clock-names = "gpio0_io";
 357                                 gpio-controller;
 358                                 interrupt-controller;
 359                         };
 360
 361                         nand@17050000 {
 362                                 compatible = "sirf,atlas7-nand";
 363                                 reg = <0x17050000 0x10000>;
 364                                 interrupts = <0 41 0>;
 365                                 clocks = <&car 108>, <&car 112>;
 366                                 clock-names = "nand_io", "nand_nand";
 367                         };
 368
 369                         sd0: sdhci@16000000 {
 370                                 cell-index = <0>;
 371                                 compatible = "sirf,atlas7-sdhc";
 372                                 reg = <0x16000000 0x100000>;
 373                                 interrupts = <0 38 0>;
 374                                 clocks = <&car 109>, <&car 111>;
 375                                 clock-names = "core", "iface";
 376                                 wp-inverted;
 377                                 non-removable;
 378                                 status = "disabled";
 379                                 bus-width = <8>;
 380                         };
 381
 382                         sd1: sdhci@16100000 {
 383                                 cell-index = <1>;
 384                                 compatible = "sirf,atlas7-sdhc";
 385                                 reg = <0x16100000 0x100000>;
 386                                 interrupts = <0 38 0>;
 387                                 clocks = <&car 109>, <&car 111>;
 388                                 clock-names = "core", "iface";
 389                                 non-removable;
 390                                 status = "disabled";
 391                                 bus-width = <8>;
 392                         };
 393
 394                         usb0: usb@17060000 {
 395                                 cell-index = <0>;
 396                                 compatible = "sirf,atlas7-usb";
 397                                 reg = <0x17060000 0x200>;
 398                                 interrupts = <0 10 0>;
 399                                 clocks = <&car 113>;
 400                                 sirf,usbphy = <&usbphy0>;
 401                                 phy_type = "utmi";
 402                                 dr_mode = "otg";
 403                                 maximum-speed = "high-speed";
 404                                 status = "okay";
 405                         };
 406
 407                         usb1: usb@17070000 {
 408                                 cell-index = <1>;
 409                                 compatible = "sirf,atlas7-usb";
 410                                 reg = <0x17070000 0x200>;
 411                                 interrupts = <0 11 0>;
 412                                 clocks = <&car 114>;
 413                                 sirf,usbphy = <&usbphy1>;
 414                                 phy_type = "utmi";
 415                                 dr_mode = "host";
 416                                 maximum-speed = "high-speed";
 417                                 status = "okay";
 418                         };
 419
 420                         usbphy0: usbphy@0 {
 421                                 compatible = "sirf,atlas7-usbphy";
 422                                 reg = <0x17060200 0x100>;
 423                                 clocks = <&car 115>;
 424                                 status = "okay";
 425                         };
 426
 427                         usbphy1: usbphy@1 {
 428                                 compatible = "sirf,atlas7-usbphy";
 429                                 reg = <0x17070200 0x100>;
 430                                 clocks = <&car 116>;
 431                                 status = "okay";
 432                         };
 433
 434                         i2c0: i2c@17020000 {
 435                                 cell-index = <0>;
 436                                 compatible = "sirf,prima2-i2c";
 437                                 reg = <0x17020000 0x1000>;
 438                                 interrupts = <0 24 0>;
 439                                 clocks = <&car 105>;
 440                                 #address-cells = <1>;
 441                                 #size-cells = <0>;
 442                         };
 443
 444                 };
 445
 446                 vdifm {
 447                         compatible = "arteris, flexnoc", "simple-bus";
 448                         #address-cells = <1>;
 449                         #size-cells = <1>;
 450                         ranges = <0x13290000 0x13290000 0x3000>,
 451                                 <0x13300000 0x13300000 0x1000>,
 452                                 <0x14200000 0x14200000 0x600000>;
 453
 454                         vdifm@13290000 {
 455                                 compatible = "sirf,nocfw-vdifm";
 456                                 reg = <0x13290000 0x3000>;
 457                         };
 458
 459                         gpio_1: gpio_vdifm@13300000 {
 460                                 #gpio-cells = <2>;
 461                                 #interrupt-cells = <2>;
 462                                 compatible = "sirf,atlas7-gpio";
 463                                 reg = <0x13300000 0x1000>;
 464                                 interrupts = <0 43 0>, <0 44 0>, <0 45 0>;
 465                                 clocks = <&car 84>;
 466                                 clock-names = "gpio1_io";
 467                                 gpio-controller;
 468                                 interrupt-controller;
 469                         };
 470
 471                         sd2: sdhci@14200000 {
 472                                 cell-index = <2>;
 473                                 compatible = "sirf,atlas7-sdhc";
 474                                 reg = <0x14200000 0x100000>;
 475                                 interrupts = <0 23 0>;
 476                                 clocks = <&car 70>, <&car 75>;
 477                                 clock-names = "core", "iface";
 478                                 status = "disabled";
 479                                 bus-width = <4>;
 480                                 sd-uhs-sdr50;
 481                                 vqmmc-supply = <&vqmmc>;
 482                                 vqmmc: vqmmc@2 {
 483                                         regulator-min-microvolt = <1650000>;
 484                                         regulator-max-microvolt = <1950000>;
 485                                         regulator-name = "vqmmc-ldo";
 486                                         regulator-type = "voltage";
 487                                         regulator-boot-on;
 488                                         regulator-allow-bypass;
 489                                 };
 490                         };
 491
 492                         sd3: sdhci@14300000 {
 493                                 cell-index = <3>;
 494                                 compatible = "sirf,atlas7-sdhc";
 495                                 reg = <0x14300000 0x100000>;
 496                                 interrupts = <0 23 0>;
 497                                 clocks = <&car 76>, <&car 81>;
 498                                 clock-names = "core", "iface";
 499                                 status = "disabled";
 500                                 bus-width = <4>;
 501                         };
 502
 503                         sd5: sdhci@14500000 {
 504                                 cell-index = <5>;
 505                                 compatible = "sirf,atlas7-sdhc";
 506                                 reg = <0x14500000 0x100000>;
 507                                 interrupts = <0 39 0>;
 508                                 clocks = <&car 71>, <&car 76>;
 509                                 clock-names = "core", "iface";
 510                                 status = "disabled";
 511                                 bus-width = <4>;
 512                                 loop-dma;
 513                         };
 514
 515                         sd6: sdhci@14600000 {
 516                                 cell-index = <6>;
 517                                 compatible = "sirf,atlas7-sdhc";
 518                                 reg = <0x14600000 0x100000>;
 519                                 interrupts = <0 98 0>;
 520                                 clocks = <&car 72>, <&car 77>;
 521                                 clock-names = "core", "iface";
 522                                 status = "disabled";
 523                                 bus-width = <4>;
 524                         };
 525
 526                         sd7: sdhci@14700000 {
 527                                 cell-index = <7>;
 528                                 compatible = "sirf,atlas7-sdhc";
 529                                 reg = <0x14700000 0x100000>;
 530                                 interrupts = <0 98 0>;
 531                                 clocks = <&car 72>, <&car 77>;
 532                                 clock-names = "core", "iface";
 533                                 status = "disabled";
 534                                 bus-width = <4>;
 535                         };
 536                 };
 537
 538                 audiom {
 539                         compatible = "arteris, flexnoc", "simple-bus";
 540                         #address-cells = <1>;
 541                         #size-cells = <1>;
 542                         ranges = <0x10d50000 0x10d50000 0x0000ffff>,
 543                                         <0x10d60000 0x10d60000 0x0000ffff>,
 544                                         <0x10d80000 0x10d80000 0x0000ffff>,
 545                                         <0x10d90000 0x10d90000 0x0000ffff>,
 546                                         <0x10ED0000 0x10ED0000 0x3000>,
 547                                         <0x10dc8000 0x10dc8000 0x1000>,
 548                                         <0x10dc0000 0x10dc0000 0x1000>,
 549                                         <0x10db0000 0x10db0000 0x4000>,
 550                                         <0x10d40000 0x10d40000 0x1000>,
 551                                         <0x10d30000 0x10d30000 0x1000>;
 552
 553                         timer@10dc0000 {
 554                                 compatible = "sirf,atlas7-tick";
 555                                 reg = <0x10dc0000 0x1000>;
 556                                 interrupts = <0 0 0>,
 557                                            <0 1 0>,
 558                                            <0 2 0>,
 559                                            <0 49 0>,
 560                                            <0 50 0>,
 561                                            <0 51 0>;
 562                                 clocks = <&car 47>;
 563                         };
 564
 565                         timerb@10dc8000 {
 566                                         compatible = "sirf,atlas7-tick";
 567                                         reg = <0x10dc8000 0x1000>;
 568                                         interrupts = <0 74 0>,
 569                                                            <0 75 0>,
 570                                                            <0 76 0>,
 571                                                            <0 77 0>,
 572                                                            <0 78 0>,
 573                                                            <0 79 0>;
 574                                         clocks = <&car 47>;
 575                         };
 576
 577                         vip0@10db0000 {
 578                                 compatible = "sirf,atlas7-vip0";
 579                                 reg = <0x10db0000 0x2000>;
 580                                 interrupts = <0 85 0>;
 581                                 sirf,vip_cma_size = <0xC00000>;
 582                         };
 583
 584                         cvd@10db2000 {
 585                                 compatible = "sirf,cvd";
 586                                 reg = <0x10db2000 0x2000>;
 587                                 clocks = <&car 46>;
 588                         };
 589
 590                         dmac2: dma-controller@10d50000 {
 591                                 cell-index = <2>;
 592                                 compatible = "sirf,atlas7-dmac";
 593                                 reg = <0x10d50000 0xffff>;
 594                                 interrupts = <0 55 0>;
 595                                 clocks = <&car 60>;
 596                                 dma-channels = <16>;
 597                                 #dma-cells = <1>;
 598                         };
 599
 600                         dmac3: dma-controller@10d60000 {
 601                                 cell-index = <3>;
 602                                 compatible = "sirf,atlas7-dmac";
 603                                 reg = <0x10d60000 0xffff>;
 604                                 interrupts = <0 56 0>;
 605                                 clocks = <&car 61>;
 606                                 dma-channels = <16>;
 607                                 #dma-cells = <1>;
 608                         };
 609
 610                         adc: adc@10d80000 {
 611                                 compatible = "sirf,atlas7-adc";
 612                                 reg = <0x10d80000 0xffff>;
 613                                 interrupts = <0 34 0>;
 614                                 clocks = <&car 49>;
 615                                 #io-channel-cells = <1>;
 616                         };
 617
 618                         pulsec@10d90000 {
 619                                 compatible = "sirf,prima2-pulsec";
 620                                 reg = <0x10d90000 0xffff>;
 621                                 interrupts = <0 42 0>;
 622                                 clocks = <&car 54>;
 623                         };
 624
 625                         audiom@10ED0000 {
 626                                 compatible = "sirf,nocfw-audiom";
 627                                 reg = <0x10ED0000 0x3000>;
 628                                 interrupts = <0 102 0>;
 629                         };
 630
 631                         usp1: usp@10d30000 {
 632                                 cell-index = <1>;
 633                                 reg = <0x10d30000 0x1000>;
 634                                 fifosize = <512>;
 635                                 clocks = <&car 58>;
 636                                 dmas = <&dmac2 6>, <&dmac2 7>;
 637                                 dma-names = "rx", "tx";
 638                         };
 639
 640                         usp2: usp@10d40000 {
 641                                 cell-index = <2>;
 642                                 reg = <0x10d40000 0x1000>;
 643                                 interrupts = <0 22 0>;
 644                                 clocks = <&car 59>;
 645                                 dmas = <&dmac2 12>, <&dmac2 13>;
 646                                 dma-names = "rx", "tx";
 647                                 #address-cells = <1>;
 648                                 #size-cells = <0>;
 649                                 status = "disabled";
 650                         };
 651                 };
 652
 653                 ddrm {
 654                         compatible = "arteris, flexnoc", "simple-bus";
 655                         #address-cells = <1>;
 656                         #size-cells = <1>;
 657                         ranges = <0x10820000 0x10820000 0x3000>,
 658                                         <0x10800000 0x10800000 0x2000>;
 659                         ddrm@10820000 {
 660                                 compatible = "sirf,nocfw-ddrm";
 661                                 reg = <0x10820000 0x3000>;
 662                                 interrupts = <0 105 0>;
 663                         };
 664
 665                         memory-controller@0x10800000 {
 666                                 compatible = "sirf,atlas7-memc";
 667                                 reg = <0x10800000 0x2000>;
 668                         };
 669
 670                 };
 671
 672                 btm {
 673                         compatible = "arteris, flexnoc", "simple-bus";
 674                         #address-cells = <1>;
 675                         #size-cells = <1>;
 676                         ranges = <0x11002000 0x11002000 0x0000ffff>,
 677                                <0x11010000 0x11010000 0x3000>,
 678                                <0x11000000 0x11000000 0x1000>,
 679                                <0x11001000 0x11001000 0x1000>;
 680
 681                         dmac4: dma-controller@11002000 {
 682                                 cell-index = <4>;
 683                                 compatible = "sirf,atlas7-dmac";
 684                                 reg = <0x11002000 0x1000>;
 685                                 interrupts = <0 99 0>;
 686                                 clocks = <&car 130>;
 687                                 dma-channels = <16>;
 688                                 #dma-cells = <1>;
 689                         };
 690                         uart6: uart@11000000 {
 691                                 cell-index = <6>;
 692                                 compatible = "sirf,atlas7-bt-uart",
 693                                                 "sirf,atlas7-uart";
 694                                 reg = <0x11000000 0x1000>;
 695                                 interrupts = <0 100 0>;
 696                                 clocks = <&car 131>, <&car 133>, <&car 134>;
 697                                 clock-names = "uart", "general", "noc";
 698                                 fifosize = <128>;
 699                                 dmas = <&dmac4 12>, <&dmac4 13>;
 700                                 dma-names = "rx", "tx";
 701                                 status = "disabled";
 702                         };
 703
 704                         usp3: usp@11001000 {
 705                                 compatible = "sirf,atlas7-bt-usp",
 706                                            "sirf,prima2-usp-pcm";
 707                                 cell-index = <3>;
 708                                 reg = <0x11001000 0x1000>;
 709                                 fifosize = <512>;
 710                                 clocks = <&car 132>, <&car 129>, <&car 133>,
 711                                         <&car 134>, <&car 135>;
 712                                 clock-names = "usp3_io", "a7ca_btss", "a7ca_io",
 713                                         "noc_btm_io", "thbtm_io";
 714                                 dmas = <&dmac4 0>, <&dmac4 1>;
 715                                 dma-names = "rx", "tx";
 716                         };
 717
 718                         btm@11010000 {
 719                                 compatible = "sirf,nocfw-btm";
 720                                 reg = <0x11010000 0x3000>;
 721                         };
 722                 };
 723
 724                 rtcm {
 725                         compatible = "arteris, flexnoc", "simple-bus";
 726                         #address-cells = <1>;
 727                         #size-cells = <1>;
 728                         ranges = <0x18810000 0x18810000 0x3000>,
 729                                 <0x18840000 0x18840000 0x1000>,
 730                                 <0x18890000 0x18890000 0x1000>,
 731                                 <0x188B0000 0x188B0000 0x10000>,
 732                                 <0x188D0000 0x188D0000 0x1000>;
 733                         rtcm@18810000 {
 734                                 compatible = "sirf,nocfw-rtcm";
 735                                 reg = <0x18810000 0x3000>;
 736                                 interrupts = <0 109 0>;
 737                         };
 738
 739                         gpio_2: gpio_rtcm@18890000 {
 740                                 #gpio-cells = <2>;
 741                                 #interrupt-cells = <2>;
 742                                 compatible = "sirf,atlas7-gpio";
 743                                 reg = <0x18890000 0x1000>;
 744                                 interrupts = <0 47 0>;
 745                                 gpio-controller;
 746                                 interrupt-controller;
 747                         };
 748
 749                         rtc-iobg@18840000 {
 750                                 compatible = "sirf,prima2-rtciobg",
 751                                         "sirf-prima2-rtciobg-bus",
 752                                         "simple-bus";
 753                                 #address-cells = <1>;
 754                                 #size-cells = <1>;
 755                                 reg = <0x18840000 0x1000>;
 756
 757                                 sysrtc@2000 {
 758                                         compatible = "sirf,prima2-sysrtc";
 759                                         reg = <0x2000 0x100>;
 760                                         interrupts = <0 52 0>;
 761                                 };
 762                                 pwrc@3000 {
 763                                         compatible = "sirf,atlas7-pwrc";
 764                                         reg = <0x3000 0x100>;
 765                                 };
 766                         };
 767
 768                         qspi: flash@188B0000 {
 769                                 cell-index = <0>;
 770                                 compatible = "sirf,atlas7-qspi-nor";
 771                                 reg = <0x188B0000 0x10000>;
 772                                 interrupts = <0 15 0>;
 773                                 #address-cells = <1>;
 774                                 #size-cells = <0>;
 775                         };
 776
 777                         retain@0x188D0000 {
 778                                 compatible = "sirf,atlas7-retain";
 779                                 reg = <0x188D0000 0x1000>;
 780                         };
 781
 782                 };
 783                 disp-iobg {
 784                         /* lcdc0 */
 785                         compatible = "simple-bus";
 786                         #address-cells = <1>;
 787                         #size-cells = <1>;
 788                         ranges = <0x13100000 0x13100000 0x20000>,
 789                                  <0x10e10000 0x10e10000 0x10000>;
 790
 791                         lcd@13100000 {
 792                                 compatible = "sirf,atlas7-lcdc";
 793                                 reg = <0x13100000 0x10000>;
 794                                 interrupts = <0 30 0>;
 795                                 clocks = <&car 79>;
 796                         };
 797                         vpp@13110000 {
 798                                 compatible = "sirf,atlas7-vpp";
 799                                 reg = <0x13110000 0x10000>;
 800                                 interrupts = <0 31 0>;
 801                                 clocks = <&car 78>;
 802                                 resets = <&car 29>;
 803                         };
 804                         lvds@10e10000 {
 805                                 compatible = "sirf,atlas7-lvdsc";
 806                                 reg = <0x10e10000 0x10000>;
 807                                 interrupts = <0 64 0>;
 808                                 clocks = <&car 54>;
 809                                 resets = <&car 29>;
 810                         };
 811
 812                 };
 813
 814                 graphics-iobg {
 815                         compatible = "simple-bus";
 816                         #address-cells = <1>;
 817                         #size-cells = <1>;
 818                         ranges = <0x12000000 0x12000000 0x1000000>;
 819
 820                         graphics@12000000 {
 821                                 compatible = "powervr,sgx531";
 822                                 reg = <0x12000000 0x1000000>;
 823                                 interrupts = <0 6 0>;
 824                                 clocks = <&car 126>;
 825                         };
 826                 };
 827         };
 828 };