arch/arm/boot/dts/atlas6-evb.dts

   1 /*
   2  * DTS file for CSR SiRFatlas6 Evaluation Board
   3  *
   4  * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
   5  *
   6  * Licensed under GPLv2 or later.
   7  */
   8
   9 /dts-v1/;
  10
  11 /include/ "atlas6.dtsi"
  12
  13 / {
  14         model = "CSR SiRFatlas6 Evaluation Board";
  15         compatible = "sirf,atlas6-cb", "sirf,atlas6";
  16
  17         memory {
  18                 device_type = "memory";
  19                 reg = <0x00000000 0x20000000>;
  20         };
  21
  22         axi {
  23                 peri-iobg {
  24                         uart@b0060000 {
  25                                 pinctrl-names = "default";
  26                                 pinctrl-0 = <&uart1_pins_a>;
  27                         };
  28                         spi@b00d0000 {
  29                                 status = "okay";
  30                                 pinctrl-names = "default";
  31                                 pinctrl-0 = <&spi0_pins_a>;
  32                                 spi@0 {
  33                                         compatible = "spidev";
  34                                         reg = <0>;
  35                                         spi-max-frequency = <1000000>;
  36                                 };
  37                         };
  38                         spi@b0170000 {
  39                                 pinctrl-names = "default";
  40                                 pinctrl-0 = <&spi1_pins_a>;
  41                         };
  42                         i2c0: i2c@b00e0000 {
  43                                 status = "okay";
  44                                 pinctrl-names = "default";
  45                                 pinctrl-0 = <&i2c0_pins_a>;
  46                                 lcd@40 {
  47                                         compatible = "sirf,lcd";
  48                                         reg = <0x40>;
  49                                 };
  50                         };
  51
  52                 };
  53                 disp-iobg {
  54                         lcd@90010000 {
  55                                 status = "okay";
  56                                 pinctrl-names = "default";
  57                                 pinctrl-0 = <&lcd_24pins_a>;
  58                         };
  59                 };
  60         };
  61         display: display@0 {
  62             panels {
  63                 panel0: panel@0 {
  64                         panel-name = "Innolux TFT";
  65                         hactive = <800>;
  66                         vactive = <480>;
  67                         left_margin = <20>;
  68                         right_margin = <234>;
  69                         upper_margin = <3>;
  70                         lower_margin = <41>;
  71                         hsync_len = <3>;
  72                         vsync_len = <2>;
  73                         pixclock = <33264000>;
  74                         sync = <3>;
  75                         timing = <0x88>;
  76                         };
  77             };
  78         };
  79 };