Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / at91sam9x5.dtsi
1 /*
2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4  *                   AT91SAM9X25, AT91SAM9X35 SoC
5  *
6  *  Copyright (C) 2012 Atmel,
7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8  *
9  * Licensed under GPLv2 or later.
10  */
11
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17
18 / {
19         model = "Atmel AT91SAM9x5 family SoC";
20         compatible = "atmel,at91sam9x5";
21         interrupt-parent = <&aic>;
22
23         aliases {
24                 serial0 = &dbgu;
25                 serial1 = &usart0;
26                 serial2 = &usart1;
27                 serial3 = &usart2;
28                 gpio0 = &pioA;
29                 gpio1 = &pioB;
30                 gpio2 = &pioC;
31                 gpio3 = &pioD;
32                 tcb0 = &tcb0;
33                 tcb1 = &tcb1;
34                 i2c0 = &i2c0;
35                 i2c1 = &i2c1;
36                 i2c2 = &i2c2;
37                 ssc0 = &ssc0;
38                 pwm0 = &pwm0;
39         };
40         cpus {
41                 #address-cells = <0>;
42                 #size-cells = <0>;
43
44                 cpu {
45                         compatible = "arm,arm926ej-s";
46                         device_type = "cpu";
47                 };
48         };
49
50         memory {
51                 reg = <0x20000000 0x10000000>;
52         };
53
54         ahb {
55                 compatible = "simple-bus";
56                 #address-cells = <1>;
57                 #size-cells = <1>;
58                 ranges;
59
60                 apb {
61                         compatible = "simple-bus";
62                         #address-cells = <1>;
63                         #size-cells = <1>;
64                         ranges;
65
66                         aic: interrupt-controller@fffff000 {
67                                 #interrupt-cells = <3>;
68                                 compatible = "atmel,at91rm9200-aic";
69                                 interrupt-controller;
70                                 reg = <0xfffff000 0x200>;
71                                 atmel,external-irqs = <31>;
72                         };
73
74                         ramc0: ramc@ffffe800 {
75                                 compatible = "atmel,at91sam9g45-ddramc";
76                                 reg = <0xffffe800 0x200>;
77                         };
78
79                         pmc: pmc@fffffc00 {
80                                 compatible = "atmel,at91rm9200-pmc";
81                                 reg = <0xfffffc00 0x100>;
82                         };
83
84                         rstc@fffffe00 {
85                                 compatible = "atmel,at91sam9g45-rstc";
86                                 reg = <0xfffffe00 0x10>;
87                         };
88
89                         shdwc@fffffe10 {
90                                 compatible = "atmel,at91sam9x5-shdwc";
91                                 reg = <0xfffffe10 0x10>;
92                         };
93
94                         pit: timer@fffffe30 {
95                                 compatible = "atmel,at91sam9260-pit";
96                                 reg = <0xfffffe30 0xf>;
97                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
98                         };
99
100                         tcb0: timer@f8008000 {
101                                 compatible = "atmel,at91sam9x5-tcb";
102                                 reg = <0xf8008000 0x100>;
103                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
104                         };
105
106                         tcb1: timer@f800c000 {
107                                 compatible = "atmel,at91sam9x5-tcb";
108                                 reg = <0xf800c000 0x100>;
109                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
110                         };
111
112                         dma0: dma-controller@ffffec00 {
113                                 compatible = "atmel,at91sam9g45-dma";
114                                 reg = <0xffffec00 0x200>;
115                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
116                                 #dma-cells = <2>;
117                         };
118
119                         dma1: dma-controller@ffffee00 {
120                                 compatible = "atmel,at91sam9g45-dma";
121                                 reg = <0xffffee00 0x200>;
122                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
123                                 #dma-cells = <2>;
124                         };
125
126                         pinctrl@fffff400 {
127                                 #address-cells = <1>;
128                                 #size-cells = <1>;
129                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
130                                 ranges = <0xfffff400 0xfffff400 0x800>;
131
132                                 /* shared pinctrl settings */
133                                 dbgu {
134                                         pinctrl_dbgu: dbgu-0 {
135                                                 atmel,pins =
136                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
137                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph A with pullup */
138                                         };
139                                 };
140
141                                 usart0 {
142                                         pinctrl_usart0: usart0-0 {
143                                                 atmel,pins =
144                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
145                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA1 periph A */
146                                         };
147
148                                         pinctrl_usart0_rts: usart0_rts-0 {
149                                                 atmel,pins =
150                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
151                                         };
152
153                                         pinctrl_usart0_cts: usart0_cts-0 {
154                                                 atmel,pins =
155                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
156                                         };
157
158                                         pinctrl_usart0_sck: usart0_sck-0 {
159                                                 atmel,pins =
160                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
161                                         };
162                                 };
163
164                                 usart1 {
165                                         pinctrl_usart1: usart1-0 {
166                                                 atmel,pins =
167                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
168                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
169                                         };
170
171                                         pinctrl_usart1_rts: usart1_rts-0 {
172                                                 atmel,pins =
173                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
174                                         };
175
176                                         pinctrl_usart1_cts: usart1_cts-0 {
177                                                 atmel,pins =
178                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
179                                         };
180
181                                         pinctrl_usart1_sck: usart1_sck-0 {
182                                                 atmel,pins =
183                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
184                                         };
185                                 };
186
187                                 usart2 {
188                                         pinctrl_usart2: usart2-0 {
189                                                 atmel,pins =
190                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
191                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
192                                         };
193
194                                         pinctrl_usart2_rts: usart2_rts-0 {
195                                                 atmel,pins =
196                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
197                                         };
198
199                                         pinctrl_usart2_cts: usart2_cts-0 {
200                                                 atmel,pins =
201                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
202                                         };
203
204                                         pinctrl_usart2_sck: usart2_sck-0 {
205                                                 atmel,pins =
206                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
207                                         };
208                                 };
209
210                                 uart0 {
211                                         pinctrl_uart0: uart0-0 {
212                                                 atmel,pins =
213                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
214                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
215                                         };
216                                 };
217
218                                 uart1 {
219                                         pinctrl_uart1: uart1-0 {
220                                                 atmel,pins =
221                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
222                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
223                                         };
224                                 };
225
226                                 nand {
227                                         pinctrl_nand: nand-0 {
228                                                 atmel,pins =
229                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A Read Enable */
230                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A Write Enable */
231                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD2 periph A Address Latch Enable */
232                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A Command Latch Enable */
233                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD4 gpio Chip Enable pin pull_up */
234                                                          AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY/BUSY pin pull_up */
235                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD6 periph A Data bit 0 */
236                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD7 periph A Data bit 1 */
237                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD8 periph A Data bit 2 */
238                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A Data bit 3 */
239                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A Data bit 4 */
240                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A Data bit 5 */
241                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD12 periph A Data bit 6 */
242                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
243                                         };
244
245                                         pinctrl_nand_16bits: nand_16bits-0 {
246                                                 atmel,pins =
247                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A Data bit 8 */
248                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A Data bit 9 */
249                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD16 periph A Data bit 10 */
250                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A Data bit 11 */
251                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD18 periph A Data bit 12 */
252                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD19 periph A Data bit 13 */
253                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD20 periph A Data bit 14 */
254                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
255                                         };
256                                 };
257
258                                 mmc0 {
259                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
260                                                 atmel,pins =
261                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
262                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
263                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
264                                         };
265
266                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
267                                                 atmel,pins =
268                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
269                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
270                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
271                                         };
272                                 };
273
274                                 mmc1 {
275                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
276                                                 atmel,pins =
277                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
278                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
279                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
280                                         };
281
282                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
283                                                 atmel,pins =
284                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
285                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
286                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
287                                         };
288                                 };
289
290                                 ssc0 {
291                                         pinctrl_ssc0_tx: ssc0_tx-0 {
292                                                 atmel,pins =
293                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
294                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
295                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
296                                         };
297
298                                         pinctrl_ssc0_rx: ssc0_rx-0 {
299                                                 atmel,pins =
300                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
301                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
302                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
303                                         };
304                                 };
305
306                                 spi0 {
307                                         pinctrl_spi0: spi0-0 {
308                                                 atmel,pins =
309                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
310                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
311                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
312                                         };
313                                 };
314
315                                 spi1 {
316                                         pinctrl_spi1: spi1-0 {
317                                                 atmel,pins =
318                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
319                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
320                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
321                                         };
322                                 };
323
324                                 i2c0 {
325                                         pinctrl_i2c0: i2c0-0 {
326                                                 atmel,pins =
327                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
328                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
329                                         };
330                                 };
331
332                                 i2c1 {
333                                         pinctrl_i2c1: i2c1-0 {
334                                                 atmel,pins =
335                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
336                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
337                                         };
338                                 };
339
340                                 i2c2 {
341                                         pinctrl_i2c2: i2c2-0 {
342                                                 atmel,pins =
343                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
344                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
345                                         };
346                                 };
347
348                                 i2c_gpio0 {
349                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
350                                                 atmel,pins =
351                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
352                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
353                                         };
354                                 };
355
356                                 i2c_gpio1 {
357                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
358                                                 atmel,pins =
359                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
360                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
361                                         };
362                                 };
363
364                                 i2c_gpio2 {
365                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
366                                                 atmel,pins =
367                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
368                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
369                                         };
370                                 };
371
372                                 tcb0 {
373                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
374                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
375                                         };
376
377                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
378                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379                                         };
380
381                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
382                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
383                                         };
384
385                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
386                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
387                                         };
388
389                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
390                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
391                                         };
392
393                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
394                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
395                                         };
396
397                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
398                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
399                                         };
400
401                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
402                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
403                                         };
404
405                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
406                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
407                                         };
408                                 };
409
410                                 tcb1 {
411                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
412                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
413                                         };
414
415                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
416                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
417                                         };
418
419                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
420                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
421                                         };
422
423                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
424                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
425                                         };
426
427                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
428                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
429                                         };
430
431                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
432                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
433                                         };
434
435                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
436                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
437                                         };
438
439                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
440                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
441                                         };
442
443                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
444                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
445                                         };
446                                 };
447
448                                 pioA: gpio@fffff400 {
449                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
450                                         reg = <0xfffff400 0x200>;
451                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
452                                         #gpio-cells = <2>;
453                                         gpio-controller;
454                                         interrupt-controller;
455                                         #interrupt-cells = <2>;
456                                 };
457
458                                 pioB: gpio@fffff600 {
459                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
460                                         reg = <0xfffff600 0x200>;
461                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
462                                         #gpio-cells = <2>;
463                                         gpio-controller;
464                                         #gpio-lines = <19>;
465                                         interrupt-controller;
466                                         #interrupt-cells = <2>;
467                                 };
468
469                                 pioC: gpio@fffff800 {
470                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
471                                         reg = <0xfffff800 0x200>;
472                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
473                                         #gpio-cells = <2>;
474                                         gpio-controller;
475                                         interrupt-controller;
476                                         #interrupt-cells = <2>;
477                                 };
478
479                                 pioD: gpio@fffffa00 {
480                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
481                                         reg = <0xfffffa00 0x200>;
482                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
483                                         #gpio-cells = <2>;
484                                         gpio-controller;
485                                         #gpio-lines = <22>;
486                                         interrupt-controller;
487                                         #interrupt-cells = <2>;
488                                 };
489                         };
490
491                         ssc0: ssc@f0010000 {
492                                 compatible = "atmel,at91sam9g45-ssc";
493                                 reg = <0xf0010000 0x4000>;
494                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
495                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
496                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
497                                 dma-names = "tx", "rx";
498                                 pinctrl-names = "default";
499                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
500                                 status = "disabled";
501                         };
502
503                         mmc0: mmc@f0008000 {
504                                 compatible = "atmel,hsmci";
505                                 reg = <0xf0008000 0x600>;
506                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
507                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
508                                 dma-names = "rxtx";
509                                 pinctrl-names = "default";
510                                 #address-cells = <1>;
511                                 #size-cells = <0>;
512                                 status = "disabled";
513                         };
514
515                         mmc1: mmc@f000c000 {
516                                 compatible = "atmel,hsmci";
517                                 reg = <0xf000c000 0x600>;
518                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
519                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
520                                 dma-names = "rxtx";
521                                 pinctrl-names = "default";
522                                 #address-cells = <1>;
523                                 #size-cells = <0>;
524                                 status = "disabled";
525                         };
526
527                         dbgu: serial@fffff200 {
528                                 compatible = "atmel,at91sam9260-usart";
529                                 reg = <0xfffff200 0x200>;
530                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531                                 pinctrl-names = "default";
532                                 pinctrl-0 = <&pinctrl_dbgu>;
533                                 status = "disabled";
534                         };
535
536                         usart0: serial@f801c000 {
537                                 compatible = "atmel,at91sam9260-usart";
538                                 reg = <0xf801c000 0x200>;
539                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
540                                 pinctrl-names = "default";
541                                 pinctrl-0 = <&pinctrl_usart0>;
542                                 status = "disabled";
543                         };
544
545                         usart1: serial@f8020000 {
546                                 compatible = "atmel,at91sam9260-usart";
547                                 reg = <0xf8020000 0x200>;
548                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
549                                 pinctrl-names = "default";
550                                 pinctrl-0 = <&pinctrl_usart1>;
551                                 status = "disabled";
552                         };
553
554                         usart2: serial@f8024000 {
555                                 compatible = "atmel,at91sam9260-usart";
556                                 reg = <0xf8024000 0x200>;
557                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558                                 pinctrl-names = "default";
559                                 pinctrl-0 = <&pinctrl_usart2>;
560                                 status = "disabled";
561                         };
562
563                         i2c0: i2c@f8010000 {
564                                 compatible = "atmel,at91sam9x5-i2c";
565                                 reg = <0xf8010000 0x100>;
566                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
567                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
568                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
569                                 dma-names = "tx", "rx";
570                                 #address-cells = <1>;
571                                 #size-cells = <0>;
572                                 pinctrl-names = "default";
573                                 pinctrl-0 = <&pinctrl_i2c0>;
574                                 status = "disabled";
575                         };
576
577                         i2c1: i2c@f8014000 {
578                                 compatible = "atmel,at91sam9x5-i2c";
579                                 reg = <0xf8014000 0x100>;
580                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
581                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
582                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
583                                 dma-names = "tx", "rx";
584                                 #address-cells = <1>;
585                                 #size-cells = <0>;
586                                 pinctrl-names = "default";
587                                 pinctrl-0 = <&pinctrl_i2c1>;
588                                 status = "disabled";
589                         };
590
591                         i2c2: i2c@f8018000 {
592                                 compatible = "atmel,at91sam9x5-i2c";
593                                 reg = <0xf8018000 0x100>;
594                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
595                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
596                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
597                                 dma-names = "tx", "rx";
598                                 #address-cells = <1>;
599                                 #size-cells = <0>;
600                                 pinctrl-names = "default";
601                                 pinctrl-0 = <&pinctrl_i2c2>;
602                                 status = "disabled";
603                         };
604
605                         uart0: serial@f8040000 {
606                                 compatible = "atmel,at91sam9260-usart";
607                                 reg = <0xf8040000 0x200>;
608                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
609                                 pinctrl-names = "default";
610                                 pinctrl-0 = <&pinctrl_uart0>;
611                                 status = "disabled";
612                         };
613
614                         uart1: serial@f8044000 {
615                                 compatible = "atmel,at91sam9260-usart";
616                                 reg = <0xf8044000 0x200>;
617                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
618                                 pinctrl-names = "default";
619                                 pinctrl-0 = <&pinctrl_uart1>;
620                                 status = "disabled";
621                         };
622
623                         adc0: adc@f804c000 {
624                                 #address-cells = <1>;
625                                 #size-cells = <0>;
626                                 compatible = "atmel,at91sam9260-adc";
627                                 reg = <0xf804c000 0x100>;
628                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
629                                 atmel,adc-use-external-triggers;
630                                 atmel,adc-channels-used = <0xffff>;
631                                 atmel,adc-vref = <3300>;
632                                 atmel,adc-startup-time = <40>;
633                                 atmel,adc-res = <8 10>;
634                                 atmel,adc-res-names = "lowres", "highres";
635                                 atmel,adc-use-res = "highres";
636
637                                 trigger@0 {
638                                         reg = <0>;
639                                         trigger-name = "external-rising";
640                                         trigger-value = <0x1>;
641                                         trigger-external;
642                                 };
643
644                                 trigger@1 {
645                                         reg = <1>;
646                                         trigger-name = "external-falling";
647                                         trigger-value = <0x2>;
648                                         trigger-external;
649                                 };
650
651                                 trigger@2 {
652                                         reg = <2>;
653                                         trigger-name = "external-any";
654                                         trigger-value = <0x3>;
655                                         trigger-external;
656                                 };
657
658                                 trigger@3 {
659                                         reg = <3>;
660                                         trigger-name = "continuous";
661                                         trigger-value = <0x6>;
662                                 };
663                         };
664
665                         spi0: spi@f0000000 {
666                                 #address-cells = <1>;
667                                 #size-cells = <0>;
668                                 compatible = "atmel,at91rm9200-spi";
669                                 reg = <0xf0000000 0x100>;
670                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
671                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
672                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
673                                 dma-names = "tx", "rx";
674                                 pinctrl-names = "default";
675                                 pinctrl-0 = <&pinctrl_spi0>;
676                                 status = "disabled";
677                         };
678
679                         spi1: spi@f0004000 {
680                                 #address-cells = <1>;
681                                 #size-cells = <0>;
682                                 compatible = "atmel,at91rm9200-spi";
683                                 reg = <0xf0004000 0x100>;
684                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
685                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
686                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
687                                 dma-names = "tx", "rx";
688                                 pinctrl-names = "default";
689                                 pinctrl-0 = <&pinctrl_spi1>;
690                                 status = "disabled";
691                         };
692
693                         usb2: gadget@f803c000 {
694                                 #address-cells = <1>;
695                                 #size-cells = <0>;
696                                 compatible = "atmel,at91sam9rl-udc";
697                                 reg = <0x00500000 0x80000
698                                        0xf803c000 0x400>;
699                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
700                                 status = "disabled";
701
702                                 ep0 {
703                                         reg = <0>;
704                                         atmel,fifo-size = <64>;
705                                         atmel,nb-banks = <1>;
706                                 };
707
708                                 ep1 {
709                                         reg = <1>;
710                                         atmel,fifo-size = <1024>;
711                                         atmel,nb-banks = <2>;
712                                         atmel,can-dma;
713                                         atmel,can-isoc;
714                                 };
715
716                                 ep2 {
717                                         reg = <2>;
718                                         atmel,fifo-size = <1024>;
719                                         atmel,nb-banks = <2>;
720                                         atmel,can-dma;
721                                         atmel,can-isoc;
722                                 };
723
724                                 ep3 {
725                                         reg = <3>;
726                                         atmel,fifo-size = <1024>;
727                                         atmel,nb-banks = <3>;
728                                         atmel,can-dma;
729                                 };
730
731                                 ep4 {
732                                         reg = <4>;
733                                         atmel,fifo-size = <1024>;
734                                         atmel,nb-banks = <3>;
735                                         atmel,can-dma;
736                                 };
737
738                                 ep5 {
739                                         reg = <5>;
740                                         atmel,fifo-size = <1024>;
741                                         atmel,nb-banks = <3>;
742                                         atmel,can-dma;
743                                         atmel,can-isoc;
744                                 };
745
746                                 ep6 {
747                                         reg = <6>;
748                                         atmel,fifo-size = <1024>;
749                                         atmel,nb-banks = <3>;
750                                         atmel,can-dma;
751                                         atmel,can-isoc;
752                                 };
753                         };
754
755                         watchdog@fffffe40 {
756                                 compatible = "atmel,at91sam9260-wdt";
757                                 reg = <0xfffffe40 0x10>;
758                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
759                                 atmel,watchdog-type = "hardware";
760                                 atmel,reset-type = "all";
761                                 atmel,dbg-halt;
762                                 atmel,idle-halt;
763                                 status = "disabled";
764                         };
765
766                         rtc@fffffeb0 {
767                                 compatible = "atmel,at91sam9x5-rtc";
768                                 reg = <0xfffffeb0 0x40>;
769                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
770                                 status = "disabled";
771                         };
772
773                         pwm0: pwm@f8034000 {
774                                 compatible = "atmel,at91sam9rl-pwm";
775                                 reg = <0xf8034000 0x300>;
776                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
777                                 #pwm-cells = <3>;
778                                 status = "disabled";
779                         };
780                 };
781
782                 nand0: nand@40000000 {
783                         compatible = "atmel,at91rm9200-nand";
784                         #address-cells = <1>;
785                         #size-cells = <1>;
786                         reg = <0x40000000 0x10000000
787                                0xffffe000 0x600         /* PMECC Registers */
788                                0xffffe600 0x200         /* PMECC Error Location Registers */
789                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
790                               >;
791                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
792                         atmel,nand-addr-offset = <21>;
793                         atmel,nand-cmd-offset = <22>;
794                         atmel,nand-has-dma;
795                         pinctrl-names = "default";
796                         pinctrl-0 = <&pinctrl_nand>;
797                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
798                                  &pioD 4 GPIO_ACTIVE_HIGH
799                                  0
800                                 >;
801                         status = "disabled";
802                 };
803
804                 usb0: ohci@00600000 {
805                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
806                         reg = <0x00600000 0x100000>;
807                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
808                         status = "disabled";
809                 };
810
811                 usb1: ehci@00700000 {
812                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
813                         reg = <0x00700000 0x100000>;
814                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
815                         status = "disabled";
816                 };
817         };
818
819         i2c@0 {
820                 compatible = "i2c-gpio";
821                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
822                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
823                         >;
824                 i2c-gpio,sda-open-drain;
825                 i2c-gpio,scl-open-drain;
826                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
827                 #address-cells = <1>;
828                 #size-cells = <0>;
829                 pinctrl-names = "default";
830                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
831                 status = "disabled";
832         };
833
834         i2c@1 {
835                 compatible = "i2c-gpio";
836                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
837                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
838                         >;
839                 i2c-gpio,sda-open-drain;
840                 i2c-gpio,scl-open-drain;
841                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
842                 #address-cells = <1>;
843                 #size-cells = <0>;
844                 pinctrl-names = "default";
845                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
846                 status = "disabled";
847         };
848
849         i2c@2 {
850                 compatible = "i2c-gpio";
851                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
852                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
853                         >;
854                 i2c-gpio,sda-open-drain;
855                 i2c-gpio,scl-open-drain;
856                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
857                 #address-cells = <1>;
858                 #size-cells = <0>;
859                 pinctrl-names = "default";
860                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
861                 status = "disabled";
862         };
863 };