arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9x5 family SoC";
  21         compatible = "atmel,at91sam9x5";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 pwm0 = &pwm0;
  40         };
  41         cpus {
  42                 #address-cells = <0>;
  43                 #size-cells = <0>;
  44
  45                 cpu {
  46                         compatible = "arm,arm926ej-s";
  47                         device_type = "cpu";
  48                 };
  49         };
  50
  51         memory {
  52                 reg = <0x20000000 0x10000000>;
  53         };
  54
  55         clocks {
  56                 slow_xtal: slow_xtal {
  57                         compatible = "fixed-clock";
  58                         #clock-cells = <0>;
  59                         clock-frequency = <0>;
  60                 };
  61
  62                 main_xtal: main_xtal {
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <0>;
  66                 };
  67
  68                 adc_op_clk: adc_op_clk{
  69                         compatible = "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <5000000>;
  72                 };
  73         };
  74
  75         ahb {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 ranges;
  80
  81                 apb {
  82                         compatible = "simple-bus";
  83                         #address-cells = <1>;
  84                         #size-cells = <1>;
  85                         ranges;
  86
  87                         aic: interrupt-controller@fffff000 {
  88                                 #interrupt-cells = <3>;
  89                                 compatible = "atmel,at91rm9200-aic";
  90                                 interrupt-controller;
  91                                 reg = <0xfffff000 0x200>;
  92                                 atmel,external-irqs = <31>;
  93                         };
  94
  95                         ramc0: ramc@ffffe800 {
  96                                 compatible = "atmel,at91sam9g45-ddramc";
  97                                 reg = <0xffffe800 0x200>;
  98                                 clocks = <&ddrck>;
  99                                 clock-names = "ddrck";
 100                         };
 101
 102                         pmc: pmc@fffffc00 {
 103                                 compatible = "atmel,at91sam9x5-pmc";
 104                                 reg = <0xfffffc00 0x100>;
 105                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 106                                 interrupt-controller;
 107                                 #address-cells = <1>;
 108                                 #size-cells = <0>;
 109                                 #interrupt-cells = <1>;
 110
 111                                 main_rc_osc: main_rc_osc {
 112                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 113                                         #clock-cells = <0>;
 114                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 115                                         clock-frequency = <12000000>;
 116                                         clock-accuracy = <50000000>;
 117                                 };
 118
 119                                 main_osc: main_osc {
 120                                         compatible = "atmel,at91rm9200-clk-main-osc";
 121                                         #clock-cells = <0>;
 122                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 123                                         clocks = <&main_xtal>;
 124                                 };
 125
 126                                 main: mainck {
 127                                         compatible = "atmel,at91sam9x5-clk-main";
 128                                         #clock-cells = <0>;
 129                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 130                                         clocks = <&main_rc_osc>, <&main_osc>;
 131                                 };
 132
 133                                 plla: pllack {
 134                                         compatible = "atmel,at91rm9200-clk-pll";
 135                                         #clock-cells = <0>;
 136                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 137                                         clocks = <&main>;
 138                                         reg = <0>;
 139                                         atmel,clk-input-range = <2000000 32000000>;
 140                                         #atmel,pll-clk-output-range-cells = <4>;
 141                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 142                                                                        695000000 750000000 1 0
 143                                                                        645000000 700000000 2 0
 144                                                                        595000000 650000000 3 0
 145                                                                        545000000 600000000 0 1
 146                                                                        495000000 555000000 1 1
 147                                                                        445000000 500000000 2 1
 148                                                                        400000000 450000000 3 1>;
 149                                 };
 150
 151                                 plladiv: plladivck {
 152                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 153                                         #clock-cells = <0>;
 154                                         clocks = <&plla>;
 155                                 };
 156
 157                                 utmi: utmick {
 158                                         compatible = "atmel,at91sam9x5-clk-utmi";
 159                                         #clock-cells = <0>;
 160                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 161                                         clocks = <&main>;
 162                                 };
 163
 164                                 mck: masterck {
 165                                         compatible = "atmel,at91sam9x5-clk-master";
 166                                         #clock-cells = <0>;
 167                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 168                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 169                                         atmel,clk-output-range = <0 133333333>;
 170                                         atmel,clk-divisors = <1 2 4 3>;
 171                                         atmel,master-clk-have-div3-pres;
 172                                 };
 173
 174                                 usb: usbck {
 175                                         compatible = "atmel,at91sam9x5-clk-usb";
 176                                         #clock-cells = <0>;
 177                                         clocks = <&plladiv>, <&utmi>;
 178                                 };
 179
 180                                 prog: progck {
 181                                         compatible = "atmel,at91sam9x5-clk-programmable";
 182                                         #address-cells = <1>;
 183                                         #size-cells = <0>;
 184                                         interrupt-parent = <&pmc>;
 185                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 186
 187                                         prog0: prog0 {
 188                                                 #clock-cells = <0>;
 189                                                 reg = <0>;
 190                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 191                                         };
 192
 193                                         prog1: prog1 {
 194                                                 #clock-cells = <0>;
 195                                                 reg = <1>;
 196                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 197                                         };
 198                                 };
 199
 200                                 smd: smdclk {
 201                                         compatible = "atmel,at91sam9x5-clk-smd";
 202                                         #clock-cells = <0>;
 203                                         clocks = <&plladiv>, <&utmi>;
 204                                 };
 205
 206                                 systemck {
 207                                         compatible = "atmel,at91rm9200-clk-system";
 208                                         #address-cells = <1>;
 209                                         #size-cells = <0>;
 210
 211                                         ddrck: ddrck {
 212                                                 #clock-cells = <0>;
 213                                                 reg = <2>;
 214                                                 clocks = <&mck>;
 215                                         };
 216
 217                                         smdck: smdck {
 218                                                 #clock-cells = <0>;
 219                                                 reg = <4>;
 220                                                 clocks = <&smd>;
 221                                         };
 222
 223                                         uhpck: uhpck {
 224                                                 #clock-cells = <0>;
 225                                                 reg = <6>;
 226                                                 clocks = <&usb>;
 227                                         };
 228
 229                                         udpck: udpck {
 230                                                 #clock-cells = <0>;
 231                                                 reg = <7>;
 232                                                 clocks = <&usb>;
 233                                         };
 234
 235                                         pck0: pck0 {
 236                                                 #clock-cells = <0>;
 237                                                 reg = <8>;
 238                                                 clocks = <&prog0>;
 239                                         };
 240
 241                                         pck1: pck1 {
 242                                                 #clock-cells = <0>;
 243                                                 reg = <9>;
 244                                                 clocks = <&prog1>;
 245                                         };
 246                                 };
 247
 248                                 periphck {
 249                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 250                                         #address-cells = <1>;
 251                                         #size-cells = <0>;
 252                                         clocks = <&mck>;
 253
 254                                         pioAB_clk: pioAB_clk {
 255                                                 #clock-cells = <0>;
 256                                                 reg = <2>;
 257                                         };
 258
 259                                         pioCD_clk: pioCD_clk {
 260                                                 #clock-cells = <0>;
 261                                                 reg = <3>;
 262                                         };
 263
 264                                         smd_clk: smd_clk {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <4>;
 267                                         };
 268
 269                                         usart0_clk: usart0_clk {
 270                                                 #clock-cells = <0>;
 271                                                 reg = <5>;
 272                                         };
 273
 274                                         usart1_clk: usart1_clk {
 275                                                 #clock-cells = <0>;
 276                                                 reg = <6>;
 277                                         };
 278
 279                                         usart2_clk: usart2_clk {
 280                                                 #clock-cells = <0>;
 281                                                 reg = <7>;
 282                                         };
 283
 284                                         twi0_clk: twi0_clk {
 285                                                 reg = <9>;
 286                                                 #clock-cells = <0>;
 287                                         };
 288
 289                                         twi1_clk: twi1_clk {
 290                                                 #clock-cells = <0>;
 291                                                 reg = <10>;
 292                                         };
 293
 294                                         twi2_clk: twi2_clk {
 295                                                 #clock-cells = <0>;
 296                                                 reg = <11>;
 297                                         };
 298
 299                                         mci0_clk: mci0_clk {
 300                                                 #clock-cells = <0>;
 301                                                 reg = <12>;
 302                                         };
 303
 304                                         spi0_clk: spi0_clk {
 305                                                 #clock-cells = <0>;
 306                                                 reg = <13>;
 307                                         };
 308
 309                                         spi1_clk: spi1_clk {
 310                                                 #clock-cells = <0>;
 311                                                 reg = <14>;
 312                                         };
 313
 314                                         uart0_clk: uart0_clk {
 315                                                 #clock-cells = <0>;
 316                                                 reg = <15>;
 317                                         };
 318
 319                                         uart1_clk: uart1_clk {
 320                                                 #clock-cells = <0>;
 321                                                 reg = <16>;
 322                                         };
 323
 324                                         tcb0_clk: tcb0_clk {
 325                                                 #clock-cells = <0>;
 326                                                 reg = <17>;
 327                                         };
 328
 329                                         pwm_clk: pwm_clk {
 330                                                 #clock-cells = <0>;
 331                                                 reg = <18>;
 332                                         };
 333
 334                                         adc_clk: adc_clk {
 335                                                 #clock-cells = <0>;
 336                                                 reg = <19>;
 337                                         };
 338
 339                                         dma0_clk: dma0_clk {
 340                                                 #clock-cells = <0>;
 341                                                 reg = <20>;
 342                                         };
 343
 344                                         dma1_clk: dma1_clk {
 345                                                 #clock-cells = <0>;
 346                                                 reg = <21>;
 347                                         };
 348
 349                                         uhphs_clk: uhphs_clk {
 350                                                 #clock-cells = <0>;
 351                                                 reg = <22>;
 352                                         };
 353
 354                                         udphs_clk: udphs_clk {
 355                                                 #clock-cells = <0>;
 356                                                 reg = <23>;
 357                                         };
 358
 359                                         mci1_clk: mci1_clk {
 360                                                 #clock-cells = <0>;
 361                                                 reg = <26>;
 362                                         };
 363
 364                                         ssc0_clk: ssc0_clk {
 365                                                 #clock-cells = <0>;
 366                                                 reg = <28>;
 367                                         };
 368                                 };
 369                         };
 370
 371                         rstc@fffffe00 {
 372                                 compatible = "atmel,at91sam9g45-rstc";
 373                                 reg = <0xfffffe00 0x10>;
 374                         };
 375
 376                         shdwc@fffffe10 {
 377                                 compatible = "atmel,at91sam9x5-shdwc";
 378                                 reg = <0xfffffe10 0x10>;
 379                         };
 380
 381                         pit: timer@fffffe30 {
 382                                 compatible = "atmel,at91sam9260-pit";
 383                                 reg = <0xfffffe30 0xf>;
 384                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 385                                 clocks = <&mck>;
 386                         };
 387
 388                         sckc@fffffe50 {
 389                                 compatible = "atmel,at91sam9x5-sckc";
 390                                 reg = <0xfffffe50 0x4>;
 391
 392                                 slow_osc: slow_osc {
 393                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 394                                         #clock-cells = <0>;
 395                                         clocks = <&slow_xtal>;
 396                                 };
 397
 398                                 slow_rc_osc: slow_rc_osc {
 399                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 400                                         #clock-cells = <0>;
 401                                         clock-frequency = <32768>;
 402                                         clock-accuracy = <50000000>;
 403                                 };
 404
 405                                 clk32k: slck {
 406                                         compatible = "atmel,at91sam9x5-clk-slow";
 407                                         #clock-cells = <0>;
 408                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 409                                 };
 410                         };
 411
 412                         tcb0: timer@f8008000 {
 413                                 compatible = "atmel,at91sam9x5-tcb";
 414                                 reg = <0xf8008000 0x100>;
 415                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 416                                 clocks = <&tcb0_clk>;
 417                                 clock-names = "t0_clk";
 418                         };
 419
 420                         tcb1: timer@f800c000 {
 421                                 compatible = "atmel,at91sam9x5-tcb";
 422                                 reg = <0xf800c000 0x100>;
 423                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 424                                 clocks = <&tcb0_clk>;
 425                                 clock-names = "t0_clk";
 426                         };
 427
 428                         dma0: dma-controller@ffffec00 {
 429                                 compatible = "atmel,at91sam9g45-dma";
 430                                 reg = <0xffffec00 0x200>;
 431                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 432                                 #dma-cells = <2>;
 433                                 clocks = <&dma0_clk>;
 434                                 clock-names = "dma_clk";
 435                         };
 436
 437                         dma1: dma-controller@ffffee00 {
 438                                 compatible = "atmel,at91sam9g45-dma";
 439                                 reg = <0xffffee00 0x200>;
 440                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 441                                 #dma-cells = <2>;
 442                                 clocks = <&dma1_clk>;
 443                                 clock-names = "dma_clk";
 444                         };
 445
 446                         pinctrl@fffff400 {
 447                                 #address-cells = <1>;
 448                                 #size-cells = <1>;
 449                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 450                                 ranges = <0xfffff400 0xfffff400 0x800>;
 451
 452                                 /* shared pinctrl settings */
 453                                 dbgu {
 454                                         pinctrl_dbgu: dbgu-0 {
 455                                                 atmel,pins =
 456                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 457                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph A with pullup */
 458                                         };
 459                                 };
 460
 461                                 usart0 {
 462                                         pinctrl_usart0: usart0-0 {
 463                                                 atmel,pins =
 464                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
 465                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA1 periph A */
 466                                         };
 467
 468                                         pinctrl_usart0_rts: usart0_rts-0 {
 469                                                 atmel,pins =
 470                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 471                                         };
 472
 473                                         pinctrl_usart0_cts: usart0_cts-0 {
 474                                                 atmel,pins =
 475                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 476                                         };
 477
 478                                         pinctrl_usart0_sck: usart0_sck-0 {
 479                                                 atmel,pins =
 480                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 481                                         };
 482                                 };
 483
 484                                 usart1 {
 485                                         pinctrl_usart1: usart1-0 {
 486                                                 atmel,pins =
 487                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
 488                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
 489                                         };
 490
 491                                         pinctrl_usart1_rts: usart1_rts-0 {
 492                                                 atmel,pins =
 493                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
 494                                         };
 495
 496                                         pinctrl_usart1_cts: usart1_cts-0 {
 497                                                 atmel,pins =
 498                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
 499                                         };
 500
 501                                         pinctrl_usart1_sck: usart1_sck-0 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
 504                                         };
 505                                 };
 506
 507                                 usart2 {
 508                                         pinctrl_usart2: usart2-0 {
 509                                                 atmel,pins =
 510                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 511                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 512                                         };
 513
 514                                         pinctrl_usart2_rts: usart2_rts-0 {
 515                                                 atmel,pins =
 516                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 517                                         };
 518
 519                                         pinctrl_usart2_cts: usart2_cts-0 {
 520                                                 atmel,pins =
 521                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 522                                         };
 523
 524                                         pinctrl_usart2_sck: usart2_sck-0 {
 525                                                 atmel,pins =
 526                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 527                                         };
 528                                 };
 529
 530                                 uart0 {
 531                                         pinctrl_uart0: uart0-0 {
 532                                                 atmel,pins =
 533                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
 534                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
 535                                         };
 536                                 };
 537
 538                                 uart1 {
 539                                         pinctrl_uart1: uart1-0 {
 540                                                 atmel,pins =
 541                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
 542                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
 543                                         };
 544                                 };
 545
 546                                 nand {
 547                                         pinctrl_nand: nand-0 {
 548                                                 atmel,pins =
 549                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A Read Enable */
 550                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A Write Enable */
 551                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD2 periph A Address Latch Enable */
 552                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A Command Latch Enable */
 553                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD4 gpio Chip Enable pin pull_up */
 554                                                          AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY/BUSY pin pull_up */
 555                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD6 periph A Data bit 0 */
 556                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD7 periph A Data bit 1 */
 557                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD8 periph A Data bit 2 */
 558                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A Data bit 3 */
 559                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A Data bit 4 */
 560                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A Data bit 5 */
 561                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD12 periph A Data bit 6 */
 562                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
 563                                         };
 564
 565                                         pinctrl_nand_16bits: nand_16bits-0 {
 566                                                 atmel,pins =
 567                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A Data bit 8 */
 568                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A Data bit 9 */
 569                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD16 periph A Data bit 10 */
 570                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A Data bit 11 */
 571                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD18 periph A Data bit 12 */
 572                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD19 periph A Data bit 13 */
 573                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD20 periph A Data bit 14 */
 574                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
 575                                         };
 576                                 };
 577
 578                                 mmc0 {
 579                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 580                                                 atmel,pins =
 581                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 582                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 583                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 584                                         };
 585
 586                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 587                                                 atmel,pins =
 588                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 589                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 590                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 591                                         };
 592                                 };
 593
 594                                 mmc1 {
 595                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 596                                                 atmel,pins =
 597                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
 598                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 599                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
 600                                         };
 601
 602                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 603                                                 atmel,pins =
 604                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
 605                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
 606                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
 607                                         };
 608                                 };
 609
 610                                 ssc0 {
 611                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 612                                                 atmel,pins =
 613                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 614                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 615                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 616                                         };
 617
 618                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 619                                                 atmel,pins =
 620                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 621                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 622                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 623                                         };
 624                                 };
 625
 626                                 spi0 {
 627                                         pinctrl_spi0: spi0-0 {
 628                                                 atmel,pins =
 629                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 630                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 631                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 632                                         };
 633                                 };
 634
 635                                 spi1 {
 636                                         pinctrl_spi1: spi1-0 {
 637                                                 atmel,pins =
 638                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 639                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 640                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 641                                         };
 642                                 };
 643
 644                                 i2c0 {
 645                                         pinctrl_i2c0: i2c0-0 {
 646                                                 atmel,pins =
 647                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
 648                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
 649                                         };
 650                                 };
 651
 652                                 i2c1 {
 653                                         pinctrl_i2c1: i2c1-0 {
 654                                                 atmel,pins =
 655                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
 656                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
 657                                         };
 658                                 };
 659
 660                                 i2c2 {
 661                                         pinctrl_i2c2: i2c2-0 {
 662                                                 atmel,pins =
 663                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
 664                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
 665                                         };
 666                                 };
 667
 668                                 i2c_gpio0 {
 669                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 670                                                 atmel,pins =
 671                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
 672                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
 673                                         };
 674                                 };
 675
 676                                 i2c_gpio1 {
 677                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 678                                                 atmel,pins =
 679                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
 680                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
 681                                         };
 682                                 };
 683
 684                                 i2c_gpio2 {
 685                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 686                                                 atmel,pins =
 687                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
 688                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
 689                                         };
 690                                 };
 691
 692                                 tcb0 {
 693                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 694                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 695                                         };
 696
 697                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 698                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 699                                         };
 700
 701                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 702                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 703                                         };
 704
 705                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 706                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 707                                         };
 708
 709                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 710                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 711                                         };
 712
 713                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 714                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 715                                         };
 716
 717                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 718                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 719                                         };
 720
 721                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 722                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 723                                         };
 724
 725                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 726                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 727                                         };
 728                                 };
 729
 730                                 tcb1 {
 731                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 732                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 733                                         };
 734
 735                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 736                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 737                                         };
 738
 739                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 740                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 741                                         };
 742
 743                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 744                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 745                                         };
 746
 747                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 748                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 749                                         };
 750
 751                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 752                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 753                                         };
 754
 755                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 756                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 757                                         };
 758
 759                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 760                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 761                                         };
 762
 763                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 764                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 765                                         };
 766                                 };
 767
 768                                 pioA: gpio@fffff400 {
 769                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 770                                         reg = <0xfffff400 0x200>;
 771                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 772                                         #gpio-cells = <2>;
 773                                         gpio-controller;
 774                                         interrupt-controller;
 775                                         #interrupt-cells = <2>;
 776                                         clocks = <&pioAB_clk>;
 777                                 };
 778
 779                                 pioB: gpio@fffff600 {
 780                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 781                                         reg = <0xfffff600 0x200>;
 782                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 783                                         #gpio-cells = <2>;
 784                                         gpio-controller;
 785                                         #gpio-lines = <19>;
 786                                         interrupt-controller;
 787                                         #interrupt-cells = <2>;
 788                                         clocks = <&pioAB_clk>;
 789                                 };
 790
 791                                 pioC: gpio@fffff800 {
 792                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 793                                         reg = <0xfffff800 0x200>;
 794                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 795                                         #gpio-cells = <2>;
 796                                         gpio-controller;
 797                                         interrupt-controller;
 798                                         #interrupt-cells = <2>;
 799                                         clocks = <&pioCD_clk>;
 800                                 };
 801
 802                                 pioD: gpio@fffffa00 {
 803                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 804                                         reg = <0xfffffa00 0x200>;
 805                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 806                                         #gpio-cells = <2>;
 807                                         gpio-controller;
 808                                         #gpio-lines = <22>;
 809                                         interrupt-controller;
 810                                         #interrupt-cells = <2>;
 811                                         clocks = <&pioCD_clk>;
 812                                 };
 813                         };
 814
 815                         ssc0: ssc@f0010000 {
 816                                 compatible = "atmel,at91sam9g45-ssc";
 817                                 reg = <0xf0010000 0x4000>;
 818                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 819                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
 820                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
 821                                 dma-names = "tx", "rx";
 822                                 pinctrl-names = "default";
 823                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 824                                 clocks = <&ssc0_clk>;
 825                                 clock-names = "pclk";
 826                                 status = "disabled";
 827                         };
 828
 829                         mmc0: mmc@f0008000 {
 830                                 compatible = "atmel,hsmci";
 831                                 reg = <0xf0008000 0x600>;
 832                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 833                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
 834                                 dma-names = "rxtx";
 835                                 pinctrl-names = "default";
 836                                 clocks = <&mci0_clk>;
 837                                 clock-names = "mci_clk";
 838                                 #address-cells = <1>;
 839                                 #size-cells = <0>;
 840                                 status = "disabled";
 841                         };
 842
 843                         mmc1: mmc@f000c000 {
 844                                 compatible = "atmel,hsmci";
 845                                 reg = <0xf000c000 0x600>;
 846                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 847                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
 848                                 dma-names = "rxtx";
 849                                 pinctrl-names = "default";
 850                                 clocks = <&mci1_clk>;
 851                                 clock-names = "mci_clk";
 852                                 #address-cells = <1>;
 853                                 #size-cells = <0>;
 854                                 status = "disabled";
 855                         };
 856
 857                         dbgu: serial@fffff200 {
 858                                 compatible = "atmel,at91sam9260-usart";
 859                                 reg = <0xfffff200 0x200>;
 860                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 861                                 pinctrl-names = "default";
 862                                 pinctrl-0 = <&pinctrl_dbgu>;
 863                                 clocks = <&mck>;
 864                                 clock-names = "usart";
 865                                 status = "disabled";
 866                         };
 867
 868                         usart0: serial@f801c000 {
 869                                 compatible = "atmel,at91sam9260-usart";
 870                                 reg = <0xf801c000 0x200>;
 871                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 872                                 pinctrl-names = "default";
 873                                 pinctrl-0 = <&pinctrl_usart0>;
 874                                 clocks = <&usart0_clk>;
 875                                 clock-names = "usart";
 876                                 status = "disabled";
 877                         };
 878
 879                         usart1: serial@f8020000 {
 880                                 compatible = "atmel,at91sam9260-usart";
 881                                 reg = <0xf8020000 0x200>;
 882                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 883                                 pinctrl-names = "default";
 884                                 pinctrl-0 = <&pinctrl_usart1>;
 885                                 clocks = <&usart1_clk>;
 886                                 clock-names = "usart";
 887                                 status = "disabled";
 888                         };
 889
 890                         usart2: serial@f8024000 {
 891                                 compatible = "atmel,at91sam9260-usart";
 892                                 reg = <0xf8024000 0x200>;
 893                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 894                                 pinctrl-names = "default";
 895                                 pinctrl-0 = <&pinctrl_usart2>;
 896                                 clocks = <&usart2_clk>;
 897                                 clock-names = "usart";
 898                                 status = "disabled";
 899                         };
 900
 901                         i2c0: i2c@f8010000 {
 902                                 compatible = "atmel,at91sam9x5-i2c";
 903                                 reg = <0xf8010000 0x100>;
 904                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 905                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
 906                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
 907                                 dma-names = "tx", "rx";
 908                                 #address-cells = <1>;
 909                                 #size-cells = <0>;
 910                                 pinctrl-names = "default";
 911                                 pinctrl-0 = <&pinctrl_i2c0>;
 912                                 clocks = <&twi0_clk>;
 913                                 status = "disabled";
 914                         };
 915
 916                         i2c1: i2c@f8014000 {
 917                                 compatible = "atmel,at91sam9x5-i2c";
 918                                 reg = <0xf8014000 0x100>;
 919                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 920                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
 921                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
 922                                 dma-names = "tx", "rx";
 923                                 #address-cells = <1>;
 924                                 #size-cells = <0>;
 925                                 pinctrl-names = "default";
 926                                 pinctrl-0 = <&pinctrl_i2c1>;
 927                                 clocks = <&twi1_clk>;
 928                                 status = "disabled";
 929                         };
 930
 931                         i2c2: i2c@f8018000 {
 932                                 compatible = "atmel,at91sam9x5-i2c";
 933                                 reg = <0xf8018000 0x100>;
 934                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 935                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
 936                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
 937                                 dma-names = "tx", "rx";
 938                                 #address-cells = <1>;
 939                                 #size-cells = <0>;
 940                                 pinctrl-names = "default";
 941                                 pinctrl-0 = <&pinctrl_i2c2>;
 942                                 clocks = <&twi2_clk>;
 943                                 status = "disabled";
 944                         };
 945
 946                         uart0: serial@f8040000 {
 947                                 compatible = "atmel,at91sam9260-usart";
 948                                 reg = <0xf8040000 0x200>;
 949                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 950                                 pinctrl-names = "default";
 951                                 pinctrl-0 = <&pinctrl_uart0>;
 952                                 clocks = <&uart0_clk>;
 953                                 clock-names = "usart";
 954                                 status = "disabled";
 955                         };
 956
 957                         uart1: serial@f8044000 {
 958                                 compatible = "atmel,at91sam9260-usart";
 959                                 reg = <0xf8044000 0x200>;
 960                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 961                                 pinctrl-names = "default";
 962                                 pinctrl-0 = <&pinctrl_uart1>;
 963                                 clocks = <&uart1_clk>;
 964                                 clock-names = "usart";
 965                                 status = "disabled";
 966                         };
 967
 968                         adc0: adc@f804c000 {
 969                                 #address-cells = <1>;
 970                                 #size-cells = <0>;
 971                                 compatible = "atmel,at91sam9x5-adc";
 972                                 reg = <0xf804c000 0x100>;
 973                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
 974                                 clocks = <&adc_clk>,
 975                                          <&adc_op_clk>;
 976                                 clock-names = "adc_clk", "adc_op_clk";
 977                                 atmel,adc-use-external-triggers;
 978                                 atmel,adc-channels-used = <0xffff>;
 979                                 atmel,adc-vref = <3300>;
 980                                 atmel,adc-startup-time = <40>;
 981                                 atmel,adc-res = <8 10>;
 982                                 atmel,adc-res-names = "lowres", "highres";
 983                                 atmel,adc-use-res = "highres";
 984
 985                                 trigger@0 {
 986                                         reg = <0>;
 987                                         trigger-name = "external-rising";
 988                                         trigger-value = <0x1>;
 989                                         trigger-external;
 990                                 };
 991
 992                                 trigger@1 {
 993                                         reg = <1>;
 994                                         trigger-name = "external-falling";
 995                                         trigger-value = <0x2>;
 996                                         trigger-external;
 997                                 };
 998
 999                                 trigger@2 {
1000                                         reg = <2>;
1001                                         trigger-name = "external-any";
1002                                         trigger-value = <0x3>;
1003                                         trigger-external;
1004                                 };
1005
1006                                 trigger@3 {
1007                                         reg = <3>;
1008                                         trigger-name = "continuous";
1009                                         trigger-value = <0x6>;
1010                                 };
1011                         };
1012
1013                         spi0: spi@f0000000 {
1014                                 #address-cells = <1>;
1015                                 #size-cells = <0>;
1016                                 compatible = "atmel,at91rm9200-spi";
1017                                 reg = <0xf0000000 0x100>;
1018                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1019                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1020                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1021                                 dma-names = "tx", "rx";
1022                                 pinctrl-names = "default";
1023                                 pinctrl-0 = <&pinctrl_spi0>;
1024                                 clocks = <&spi0_clk>;
1025                                 clock-names = "spi_clk";
1026                                 status = "disabled";
1027                         };
1028
1029                         spi1: spi@f0004000 {
1030                                 #address-cells = <1>;
1031                                 #size-cells = <0>;
1032                                 compatible = "atmel,at91rm9200-spi";
1033                                 reg = <0xf0004000 0x100>;
1034                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1035                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1036                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1037                                 dma-names = "tx", "rx";
1038                                 pinctrl-names = "default";
1039                                 pinctrl-0 = <&pinctrl_spi1>;
1040                                 clocks = <&spi1_clk>;
1041                                 clock-names = "spi_clk";
1042                                 status = "disabled";
1043                         };
1044
1045                         usb2: gadget@f803c000 {
1046                                 #address-cells = <1>;
1047                                 #size-cells = <0>;
1048                                 compatible = "atmel,at91sam9rl-udc";
1049                                 reg = <0x00500000 0x80000
1050                                        0xf803c000 0x400>;
1051                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1052                                 clocks = <&usb>, <&udphs_clk>;
1053                                 clock-names = "hclk", "pclk";
1054                                 status = "disabled";
1055
1056                                 ep0 {
1057                                         reg = <0>;
1058                                         atmel,fifo-size = <64>;
1059                                         atmel,nb-banks = <1>;
1060                                 };
1061
1062                                 ep1 {
1063                                         reg = <1>;
1064                                         atmel,fifo-size = <1024>;
1065                                         atmel,nb-banks = <2>;
1066                                         atmel,can-dma;
1067                                         atmel,can-isoc;
1068                                 };
1069
1070                                 ep2 {
1071                                         reg = <2>;
1072                                         atmel,fifo-size = <1024>;
1073                                         atmel,nb-banks = <2>;
1074                                         atmel,can-dma;
1075                                         atmel,can-isoc;
1076                                 };
1077
1078                                 ep3 {
1079                                         reg = <3>;
1080                                         atmel,fifo-size = <1024>;
1081                                         atmel,nb-banks = <3>;
1082                                         atmel,can-dma;
1083                                 };
1084
1085                                 ep4 {
1086                                         reg = <4>;
1087                                         atmel,fifo-size = <1024>;
1088                                         atmel,nb-banks = <3>;
1089                                         atmel,can-dma;
1090                                 };
1091
1092                                 ep5 {
1093                                         reg = <5>;
1094                                         atmel,fifo-size = <1024>;
1095                                         atmel,nb-banks = <3>;
1096                                         atmel,can-dma;
1097                                         atmel,can-isoc;
1098                                 };
1099
1100                                 ep6 {
1101                                         reg = <6>;
1102                                         atmel,fifo-size = <1024>;
1103                                         atmel,nb-banks = <3>;
1104                                         atmel,can-dma;
1105                                         atmel,can-isoc;
1106                                 };
1107                         };
1108
1109                         watchdog@fffffe40 {
1110                                 compatible = "atmel,at91sam9260-wdt";
1111                                 reg = <0xfffffe40 0x10>;
1112                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1113                                 atmel,watchdog-type = "hardware";
1114                                 atmel,reset-type = "all";
1115                                 atmel,dbg-halt;
1116                                 atmel,idle-halt;
1117                                 status = "disabled";
1118                         };
1119
1120                         rtc@fffffeb0 {
1121                                 compatible = "atmel,at91sam9x5-rtc";
1122                                 reg = <0xfffffeb0 0x40>;
1123                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1124                                 status = "disabled";
1125                         };
1126
1127                         pwm0: pwm@f8034000 {
1128                                 compatible = "atmel,at91sam9rl-pwm";
1129                                 reg = <0xf8034000 0x300>;
1130                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1131                                 clocks = <&pwm_clk>;
1132                                 #pwm-cells = <3>;
1133                                 status = "disabled";
1134                         };
1135                 };
1136
1137                 nand0: nand@40000000 {
1138                         compatible = "atmel,at91rm9200-nand";
1139                         #address-cells = <1>;
1140                         #size-cells = <1>;
1141                         reg = <0x40000000 0x10000000
1142                                0xffffe000 0x600         /* PMECC Registers */
1143                                0xffffe600 0x200         /* PMECC Error Location Registers */
1144                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
1145                               >;
1146                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1147                         atmel,nand-addr-offset = <21>;
1148                         atmel,nand-cmd-offset = <22>;
1149                         atmel,nand-has-dma;
1150                         pinctrl-names = "default";
1151                         pinctrl-0 = <&pinctrl_nand>;
1152                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1153                                  &pioD 4 GPIO_ACTIVE_HIGH
1154                                  0
1155                                 >;
1156                         status = "disabled";
1157                 };
1158
1159                 usb0: ohci@00600000 {
1160                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1161                         reg = <0x00600000 0x100000>;
1162                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1163                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1164                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1165                         status = "disabled";
1166                 };
1167
1168                 usb1: ehci@00700000 {
1169                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1170                         reg = <0x00700000 0x100000>;
1171                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1172                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1173                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1174                         status = "disabled";
1175                 };
1176         };
1177
1178         i2c@0 {
1179                 compatible = "i2c-gpio";
1180                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1181                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1182                         >;
1183                 i2c-gpio,sda-open-drain;
1184                 i2c-gpio,scl-open-drain;
1185                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1186                 #address-cells = <1>;
1187                 #size-cells = <0>;
1188                 pinctrl-names = "default";
1189                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1190                 status = "disabled";
1191         };
1192
1193         i2c@1 {
1194                 compatible = "i2c-gpio";
1195                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1196                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1197                         >;
1198                 i2c-gpio,sda-open-drain;
1199                 i2c-gpio,scl-open-drain;
1200                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1201                 #address-cells = <1>;
1202                 #size-cells = <0>;
1203                 pinctrl-names = "default";
1204                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1205                 status = "disabled";
1206         };
1207
1208         i2c@2 {
1209                 compatible = "i2c-gpio";
1210                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1211                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1212                         >;
1213                 i2c-gpio,sda-open-drain;
1214                 i2c-gpio,scl-open-drain;
1215                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1216                 #address-cells = <1>;
1217                 #size-cells = <0>;
1218                 pinctrl-names = "default";
1219                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1220                 status = "disabled";
1221         };
1222 };