arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9x5 family SoC";
  21         compatible = "atmel,at91sam9x5";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 pwm0 = &pwm0;
  40         };
  41         cpus {
  42                 #address-cells = <0>;
  43                 #size-cells = <0>;
  44
  45                 cpu {
  46                         compatible = "arm,arm926ej-s";
  47                         device_type = "cpu";
  48                 };
  49         };
  50
  51         memory {
  52                 reg = <0x20000000 0x10000000>;
  53         };
  54
  55         clocks {
  56                 slow_xtal: slow_xtal {
  57                         compatible = "fixed-clock";
  58                         #clock-cells = <0>;
  59                         clock-frequency = <0>;
  60                 };
  61
  62                 main_xtal: main_xtal {
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <0>;
  66                 };
  67
  68                 adc_op_clk: adc_op_clk{
  69                         compatible = "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <5000000>;
  72                 };
  73         };
  74
  75         sram: sram@00300000 {
  76                 compatible = "mmio-sram";
  77                 reg = <0x00300000 0x8000>;
  78         };
  79
  80         ahb {
  81                 compatible = "simple-bus";
  82                 #address-cells = <1>;
  83                 #size-cells = <1>;
  84                 ranges;
  85
  86                 apb {
  87                         compatible = "simple-bus";
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         ranges;
  91
  92                         aic: interrupt-controller@fffff000 {
  93                                 #interrupt-cells = <3>;
  94                                 compatible = "atmel,at91rm9200-aic";
  95                                 interrupt-controller;
  96                                 reg = <0xfffff000 0x200>;
  97                                 atmel,external-irqs = <31>;
  98                         };
  99
 100                         ramc0: ramc@ffffe800 {
 101                                 compatible = "atmel,at91sam9g45-ddramc";
 102                                 reg = <0xffffe800 0x200>;
 103                                 clocks = <&ddrck>;
 104                                 clock-names = "ddrck";
 105                         };
 106
 107                         pmc: pmc@fffffc00 {
 108                                 compatible = "atmel,at91sam9x5-pmc";
 109                                 reg = <0xfffffc00 0x100>;
 110                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 111                                 interrupt-controller;
 112                                 #address-cells = <1>;
 113                                 #size-cells = <0>;
 114                                 #interrupt-cells = <1>;
 115
 116                                 main_rc_osc: main_rc_osc {
 117                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 118                                         #clock-cells = <0>;
 119                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 120                                         clock-frequency = <12000000>;
 121                                         clock-accuracy = <50000000>;
 122                                 };
 123
 124                                 main_osc: main_osc {
 125                                         compatible = "atmel,at91rm9200-clk-main-osc";
 126                                         #clock-cells = <0>;
 127                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 128                                         clocks = <&main_xtal>;
 129                                 };
 130
 131                                 main: mainck {
 132                                         compatible = "atmel,at91sam9x5-clk-main";
 133                                         #clock-cells = <0>;
 134                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 135                                         clocks = <&main_rc_osc>, <&main_osc>;
 136                                 };
 137
 138                                 plla: pllack {
 139                                         compatible = "atmel,at91rm9200-clk-pll";
 140                                         #clock-cells = <0>;
 141                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 142                                         clocks = <&main>;
 143                                         reg = <0>;
 144                                         atmel,clk-input-range = <2000000 32000000>;
 145                                         #atmel,pll-clk-output-range-cells = <4>;
 146                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 147                                                                        695000000 750000000 1 0
 148                                                                        645000000 700000000 2 0
 149                                                                        595000000 650000000 3 0
 150                                                                        545000000 600000000 0 1
 151                                                                        495000000 555000000 1 1
 152                                                                        445000000 500000000 2 1
 153                                                                        400000000 450000000 3 1>;
 154                                 };
 155
 156                                 plladiv: plladivck {
 157                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 158                                         #clock-cells = <0>;
 159                                         clocks = <&plla>;
 160                                 };
 161
 162                                 utmi: utmick {
 163                                         compatible = "atmel,at91sam9x5-clk-utmi";
 164                                         #clock-cells = <0>;
 165                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 166                                         clocks = <&main>;
 167                                 };
 168
 169                                 mck: masterck {
 170                                         compatible = "atmel,at91sam9x5-clk-master";
 171                                         #clock-cells = <0>;
 172                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 173                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 174                                         atmel,clk-output-range = <0 133333333>;
 175                                         atmel,clk-divisors = <1 2 4 3>;
 176                                         atmel,master-clk-have-div3-pres;
 177                                 };
 178
 179                                 usb: usbck {
 180                                         compatible = "atmel,at91sam9x5-clk-usb";
 181                                         #clock-cells = <0>;
 182                                         clocks = <&plladiv>, <&utmi>;
 183                                 };
 184
 185                                 prog: progck {
 186                                         compatible = "atmel,at91sam9x5-clk-programmable";
 187                                         #address-cells = <1>;
 188                                         #size-cells = <0>;
 189                                         interrupt-parent = <&pmc>;
 190                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 191
 192                                         prog0: prog0 {
 193                                                 #clock-cells = <0>;
 194                                                 reg = <0>;
 195                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 196                                         };
 197
 198                                         prog1: prog1 {
 199                                                 #clock-cells = <0>;
 200                                                 reg = <1>;
 201                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 202                                         };
 203                                 };
 204
 205                                 smd: smdclk {
 206                                         compatible = "atmel,at91sam9x5-clk-smd";
 207                                         #clock-cells = <0>;
 208                                         clocks = <&plladiv>, <&utmi>;
 209                                 };
 210
 211                                 systemck {
 212                                         compatible = "atmel,at91rm9200-clk-system";
 213                                         #address-cells = <1>;
 214                                         #size-cells = <0>;
 215
 216                                         ddrck: ddrck {
 217                                                 #clock-cells = <0>;
 218                                                 reg = <2>;
 219                                                 clocks = <&mck>;
 220                                         };
 221
 222                                         smdck: smdck {
 223                                                 #clock-cells = <0>;
 224                                                 reg = <4>;
 225                                                 clocks = <&smd>;
 226                                         };
 227
 228                                         uhpck: uhpck {
 229                                                 #clock-cells = <0>;
 230                                                 reg = <6>;
 231                                                 clocks = <&usb>;
 232                                         };
 233
 234                                         udpck: udpck {
 235                                                 #clock-cells = <0>;
 236                                                 reg = <7>;
 237                                                 clocks = <&usb>;
 238                                         };
 239
 240                                         pck0: pck0 {
 241                                                 #clock-cells = <0>;
 242                                                 reg = <8>;
 243                                                 clocks = <&prog0>;
 244                                         };
 245
 246                                         pck1: pck1 {
 247                                                 #clock-cells = <0>;
 248                                                 reg = <9>;
 249                                                 clocks = <&prog1>;
 250                                         };
 251                                 };
 252
 253                                 periphck {
 254                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 255                                         #address-cells = <1>;
 256                                         #size-cells = <0>;
 257                                         clocks = <&mck>;
 258
 259                                         pioAB_clk: pioAB_clk {
 260                                                 #clock-cells = <0>;
 261                                                 reg = <2>;
 262                                         };
 263
 264                                         pioCD_clk: pioCD_clk {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <3>;
 267                                         };
 268
 269                                         smd_clk: smd_clk {
 270                                                 #clock-cells = <0>;
 271                                                 reg = <4>;
 272                                         };
 273
 274                                         usart0_clk: usart0_clk {
 275                                                 #clock-cells = <0>;
 276                                                 reg = <5>;
 277                                         };
 278
 279                                         usart1_clk: usart1_clk {
 280                                                 #clock-cells = <0>;
 281                                                 reg = <6>;
 282                                         };
 283
 284                                         usart2_clk: usart2_clk {
 285                                                 #clock-cells = <0>;
 286                                                 reg = <7>;
 287                                         };
 288
 289                                         twi0_clk: twi0_clk {
 290                                                 reg = <9>;
 291                                                 #clock-cells = <0>;
 292                                         };
 293
 294                                         twi1_clk: twi1_clk {
 295                                                 #clock-cells = <0>;
 296                                                 reg = <10>;
 297                                         };
 298
 299                                         twi2_clk: twi2_clk {
 300                                                 #clock-cells = <0>;
 301                                                 reg = <11>;
 302                                         };
 303
 304                                         mci0_clk: mci0_clk {
 305                                                 #clock-cells = <0>;
 306                                                 reg = <12>;
 307                                         };
 308
 309                                         spi0_clk: spi0_clk {
 310                                                 #clock-cells = <0>;
 311                                                 reg = <13>;
 312                                         };
 313
 314                                         spi1_clk: spi1_clk {
 315                                                 #clock-cells = <0>;
 316                                                 reg = <14>;
 317                                         };
 318
 319                                         uart0_clk: uart0_clk {
 320                                                 #clock-cells = <0>;
 321                                                 reg = <15>;
 322                                         };
 323
 324                                         uart1_clk: uart1_clk {
 325                                                 #clock-cells = <0>;
 326                                                 reg = <16>;
 327                                         };
 328
 329                                         tcb0_clk: tcb0_clk {
 330                                                 #clock-cells = <0>;
 331                                                 reg = <17>;
 332                                         };
 333
 334                                         pwm_clk: pwm_clk {
 335                                                 #clock-cells = <0>;
 336                                                 reg = <18>;
 337                                         };
 338
 339                                         adc_clk: adc_clk {
 340                                                 #clock-cells = <0>;
 341                                                 reg = <19>;
 342                                         };
 343
 344                                         dma0_clk: dma0_clk {
 345                                                 #clock-cells = <0>;
 346                                                 reg = <20>;
 347                                         };
 348
 349                                         dma1_clk: dma1_clk {
 350                                                 #clock-cells = <0>;
 351                                                 reg = <21>;
 352                                         };
 353
 354                                         uhphs_clk: uhphs_clk {
 355                                                 #clock-cells = <0>;
 356                                                 reg = <22>;
 357                                         };
 358
 359                                         udphs_clk: udphs_clk {
 360                                                 #clock-cells = <0>;
 361                                                 reg = <23>;
 362                                         };
 363
 364                                         mci1_clk: mci1_clk {
 365                                                 #clock-cells = <0>;
 366                                                 reg = <26>;
 367                                         };
 368
 369                                         ssc0_clk: ssc0_clk {
 370                                                 #clock-cells = <0>;
 371                                                 reg = <28>;
 372                                         };
 373                                 };
 374                         };
 375
 376                         rstc@fffffe00 {
 377                                 compatible = "atmel,at91sam9g45-rstc";
 378                                 reg = <0xfffffe00 0x10>;
 379                         };
 380
 381                         shdwc@fffffe10 {
 382                                 compatible = "atmel,at91sam9x5-shdwc";
 383                                 reg = <0xfffffe10 0x10>;
 384                         };
 385
 386                         pit: timer@fffffe30 {
 387                                 compatible = "atmel,at91sam9260-pit";
 388                                 reg = <0xfffffe30 0xf>;
 389                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 390                                 clocks = <&mck>;
 391                         };
 392
 393                         sckc@fffffe50 {
 394                                 compatible = "atmel,at91sam9x5-sckc";
 395                                 reg = <0xfffffe50 0x4>;
 396
 397                                 slow_osc: slow_osc {
 398                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 399                                         #clock-cells = <0>;
 400                                         clocks = <&slow_xtal>;
 401                                 };
 402
 403                                 slow_rc_osc: slow_rc_osc {
 404                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 405                                         #clock-cells = <0>;
 406                                         clock-frequency = <32768>;
 407                                         clock-accuracy = <50000000>;
 408                                 };
 409
 410                                 clk32k: slck {
 411                                         compatible = "atmel,at91sam9x5-clk-slow";
 412                                         #clock-cells = <0>;
 413                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 414                                 };
 415                         };
 416
 417                         tcb0: timer@f8008000 {
 418                                 compatible = "atmel,at91sam9x5-tcb";
 419                                 reg = <0xf8008000 0x100>;
 420                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 421                                 clocks = <&tcb0_clk>;
 422                                 clock-names = "t0_clk";
 423                         };
 424
 425                         tcb1: timer@f800c000 {
 426                                 compatible = "atmel,at91sam9x5-tcb";
 427                                 reg = <0xf800c000 0x100>;
 428                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 429                                 clocks = <&tcb0_clk>;
 430                                 clock-names = "t0_clk";
 431                         };
 432
 433                         dma0: dma-controller@ffffec00 {
 434                                 compatible = "atmel,at91sam9g45-dma";
 435                                 reg = <0xffffec00 0x200>;
 436                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 437                                 #dma-cells = <2>;
 438                                 clocks = <&dma0_clk>;
 439                                 clock-names = "dma_clk";
 440                         };
 441
 442                         dma1: dma-controller@ffffee00 {
 443                                 compatible = "atmel,at91sam9g45-dma";
 444                                 reg = <0xffffee00 0x200>;
 445                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 446                                 #dma-cells = <2>;
 447                                 clocks = <&dma1_clk>;
 448                                 clock-names = "dma_clk";
 449                         };
 450
 451                         pinctrl@fffff400 {
 452                                 #address-cells = <1>;
 453                                 #size-cells = <1>;
 454                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 455                                 ranges = <0xfffff400 0xfffff400 0x800>;
 456
 457                                 /* shared pinctrl settings */
 458                                 dbgu {
 459                                         pinctrl_dbgu: dbgu-0 {
 460                                                 atmel,pins =
 461                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 462                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph A with pullup */
 463                                         };
 464                                 };
 465
 466                                 usart0 {
 467                                         pinctrl_usart0: usart0-0 {
 468                                                 atmel,pins =
 469                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
 470                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA1 periph A */
 471                                         };
 472
 473                                         pinctrl_usart0_rts: usart0_rts-0 {
 474                                                 atmel,pins =
 475                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 476                                         };
 477
 478                                         pinctrl_usart0_cts: usart0_cts-0 {
 479                                                 atmel,pins =
 480                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 481                                         };
 482
 483                                         pinctrl_usart0_sck: usart0_sck-0 {
 484                                                 atmel,pins =
 485                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 486                                         };
 487                                 };
 488
 489                                 usart1 {
 490                                         pinctrl_usart1: usart1-0 {
 491                                                 atmel,pins =
 492                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
 493                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
 494                                         };
 495
 496                                         pinctrl_usart1_rts: usart1_rts-0 {
 497                                                 atmel,pins =
 498                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
 499                                         };
 500
 501                                         pinctrl_usart1_cts: usart1_cts-0 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
 504                                         };
 505
 506                                         pinctrl_usart1_sck: usart1_sck-0 {
 507                                                 atmel,pins =
 508                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
 509                                         };
 510                                 };
 511
 512                                 usart2 {
 513                                         pinctrl_usart2: usart2-0 {
 514                                                 atmel,pins =
 515                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 516                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 517                                         };
 518
 519                                         pinctrl_usart2_rts: usart2_rts-0 {
 520                                                 atmel,pins =
 521                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 522                                         };
 523
 524                                         pinctrl_usart2_cts: usart2_cts-0 {
 525                                                 atmel,pins =
 526                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 527                                         };
 528
 529                                         pinctrl_usart2_sck: usart2_sck-0 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 532                                         };
 533                                 };
 534
 535                                 uart0 {
 536                                         pinctrl_uart0: uart0-0 {
 537                                                 atmel,pins =
 538                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
 539                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
 540                                         };
 541                                 };
 542
 543                                 uart1 {
 544                                         pinctrl_uart1: uart1-0 {
 545                                                 atmel,pins =
 546                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
 547                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
 548                                         };
 549                                 };
 550
 551                                 nand {
 552                                         pinctrl_nand: nand-0 {
 553                                                 atmel,pins =
 554                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A Read Enable */
 555                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A Write Enable */
 556                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD2 periph A Address Latch Enable */
 557                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A Command Latch Enable */
 558                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD4 gpio Chip Enable pin pull_up */
 559                                                          AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY/BUSY pin pull_up */
 560                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD6 periph A Data bit 0 */
 561                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD7 periph A Data bit 1 */
 562                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD8 periph A Data bit 2 */
 563                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A Data bit 3 */
 564                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A Data bit 4 */
 565                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A Data bit 5 */
 566                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD12 periph A Data bit 6 */
 567                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
 568                                         };
 569
 570                                         pinctrl_nand_16bits: nand_16bits-0 {
 571                                                 atmel,pins =
 572                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A Data bit 8 */
 573                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A Data bit 9 */
 574                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD16 periph A Data bit 10 */
 575                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A Data bit 11 */
 576                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD18 periph A Data bit 12 */
 577                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD19 periph A Data bit 13 */
 578                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD20 periph A Data bit 14 */
 579                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
 580                                         };
 581                                 };
 582
 583                                 mmc0 {
 584                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 587                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 588                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 589                                         };
 590
 591                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 592                                                 atmel,pins =
 593                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 594                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 595                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 596                                         };
 597                                 };
 598
 599                                 mmc1 {
 600                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 601                                                 atmel,pins =
 602                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
 603                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 604                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
 605                                         };
 606
 607                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 608                                                 atmel,pins =
 609                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
 610                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
 611                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
 612                                         };
 613                                 };
 614
 615                                 ssc0 {
 616                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 617                                                 atmel,pins =
 618                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 619                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 620                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 621                                         };
 622
 623                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 624                                                 atmel,pins =
 625                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 626                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 627                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 628                                         };
 629                                 };
 630
 631                                 spi0 {
 632                                         pinctrl_spi0: spi0-0 {
 633                                                 atmel,pins =
 634                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 635                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 636                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 637                                         };
 638                                 };
 639
 640                                 spi1 {
 641                                         pinctrl_spi1: spi1-0 {
 642                                                 atmel,pins =
 643                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 644                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 645                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 646                                         };
 647                                 };
 648
 649                                 i2c0 {
 650                                         pinctrl_i2c0: i2c0-0 {
 651                                                 atmel,pins =
 652                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
 653                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
 654                                         };
 655                                 };
 656
 657                                 i2c1 {
 658                                         pinctrl_i2c1: i2c1-0 {
 659                                                 atmel,pins =
 660                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
 661                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
 662                                         };
 663                                 };
 664
 665                                 i2c2 {
 666                                         pinctrl_i2c2: i2c2-0 {
 667                                                 atmel,pins =
 668                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
 669                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
 670                                         };
 671                                 };
 672
 673                                 i2c_gpio0 {
 674                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 675                                                 atmel,pins =
 676                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
 677                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
 678                                         };
 679                                 };
 680
 681                                 i2c_gpio1 {
 682                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 683                                                 atmel,pins =
 684                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
 685                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
 686                                         };
 687                                 };
 688
 689                                 i2c_gpio2 {
 690                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 691                                                 atmel,pins =
 692                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
 693                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
 694                                         };
 695                                 };
 696
 697                                 tcb0 {
 698                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 699                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 700                                         };
 701
 702                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 703                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 704                                         };
 705
 706                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 707                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 708                                         };
 709
 710                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 711                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 712                                         };
 713
 714                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 715                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 716                                         };
 717
 718                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 719                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 720                                         };
 721
 722                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 723                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 724                                         };
 725
 726                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 727                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 728                                         };
 729
 730                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 731                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 732                                         };
 733                                 };
 734
 735                                 tcb1 {
 736                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 737                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 738                                         };
 739
 740                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 741                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 742                                         };
 743
 744                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 745                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 746                                         };
 747
 748                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 749                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 750                                         };
 751
 752                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 753                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 754                                         };
 755
 756                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 757                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 758                                         };
 759
 760                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 761                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 762                                         };
 763
 764                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 765                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 766                                         };
 767
 768                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 769                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 770                                         };
 771                                 };
 772
 773                                 pioA: gpio@fffff400 {
 774                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 775                                         reg = <0xfffff400 0x200>;
 776                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 777                                         #gpio-cells = <2>;
 778                                         gpio-controller;
 779                                         interrupt-controller;
 780                                         #interrupt-cells = <2>;
 781                                         clocks = <&pioAB_clk>;
 782                                 };
 783
 784                                 pioB: gpio@fffff600 {
 785                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 786                                         reg = <0xfffff600 0x200>;
 787                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 788                                         #gpio-cells = <2>;
 789                                         gpio-controller;
 790                                         #gpio-lines = <19>;
 791                                         interrupt-controller;
 792                                         #interrupt-cells = <2>;
 793                                         clocks = <&pioAB_clk>;
 794                                 };
 795
 796                                 pioC: gpio@fffff800 {
 797                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 798                                         reg = <0xfffff800 0x200>;
 799                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 800                                         #gpio-cells = <2>;
 801                                         gpio-controller;
 802                                         interrupt-controller;
 803                                         #interrupt-cells = <2>;
 804                                         clocks = <&pioCD_clk>;
 805                                 };
 806
 807                                 pioD: gpio@fffffa00 {
 808                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 809                                         reg = <0xfffffa00 0x200>;
 810                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 811                                         #gpio-cells = <2>;
 812                                         gpio-controller;
 813                                         #gpio-lines = <22>;
 814                                         interrupt-controller;
 815                                         #interrupt-cells = <2>;
 816                                         clocks = <&pioCD_clk>;
 817                                 };
 818                         };
 819
 820                         ssc0: ssc@f0010000 {
 821                                 compatible = "atmel,at91sam9g45-ssc";
 822                                 reg = <0xf0010000 0x4000>;
 823                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 824                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
 825                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
 826                                 dma-names = "tx", "rx";
 827                                 pinctrl-names = "default";
 828                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 829                                 clocks = <&ssc0_clk>;
 830                                 clock-names = "pclk";
 831                                 status = "disabled";
 832                         };
 833
 834                         mmc0: mmc@f0008000 {
 835                                 compatible = "atmel,hsmci";
 836                                 reg = <0xf0008000 0x600>;
 837                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 838                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
 839                                 dma-names = "rxtx";
 840                                 pinctrl-names = "default";
 841                                 clocks = <&mci0_clk>;
 842                                 clock-names = "mci_clk";
 843                                 #address-cells = <1>;
 844                                 #size-cells = <0>;
 845                                 status = "disabled";
 846                         };
 847
 848                         mmc1: mmc@f000c000 {
 849                                 compatible = "atmel,hsmci";
 850                                 reg = <0xf000c000 0x600>;
 851                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 852                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
 853                                 dma-names = "rxtx";
 854                                 pinctrl-names = "default";
 855                                 clocks = <&mci1_clk>;
 856                                 clock-names = "mci_clk";
 857                                 #address-cells = <1>;
 858                                 #size-cells = <0>;
 859                                 status = "disabled";
 860                         };
 861
 862                         dbgu: serial@fffff200 {
 863                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 864                                 reg = <0xfffff200 0x200>;
 865                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 866                                 pinctrl-names = "default";
 867                                 pinctrl-0 = <&pinctrl_dbgu>;
 868                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
 869                                        <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 870                                 dma-names = "tx", "rx";
 871                                 clocks = <&mck>;
 872                                 clock-names = "usart";
 873                                 status = "disabled";
 874                         };
 875
 876                         usart0: serial@f801c000 {
 877                                 compatible = "atmel,at91sam9260-usart";
 878                                 reg = <0xf801c000 0x200>;
 879                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 880                                 pinctrl-names = "default";
 881                                 pinctrl-0 = <&pinctrl_usart0>;
 882                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
 883                                        <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 884                                 dma-names = "tx", "rx";
 885                                 clocks = <&usart0_clk>;
 886                                 clock-names = "usart";
 887                                 status = "disabled";
 888                         };
 889
 890                         usart1: serial@f8020000 {
 891                                 compatible = "atmel,at91sam9260-usart";
 892                                 reg = <0xf8020000 0x200>;
 893                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 894                                 pinctrl-names = "default";
 895                                 pinctrl-0 = <&pinctrl_usart1>;
 896                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
 897                                        <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 898                                 dma-names = "tx", "rx";
 899                                 clocks = <&usart1_clk>;
 900                                 clock-names = "usart";
 901                                 status = "disabled";
 902                         };
 903
 904                         usart2: serial@f8024000 {
 905                                 compatible = "atmel,at91sam9260-usart";
 906                                 reg = <0xf8024000 0x200>;
 907                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 908                                 pinctrl-names = "default";
 909                                 pinctrl-0 = <&pinctrl_usart2>;
 910                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
 911                                        <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 912                                 dma-names = "tx", "rx";
 913                                 clocks = <&usart2_clk>;
 914                                 clock-names = "usart";
 915                                 status = "disabled";
 916                         };
 917
 918                         i2c0: i2c@f8010000 {
 919                                 compatible = "atmel,at91sam9x5-i2c";
 920                                 reg = <0xf8010000 0x100>;
 921                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 922                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
 923                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
 924                                 dma-names = "tx", "rx";
 925                                 #address-cells = <1>;
 926                                 #size-cells = <0>;
 927                                 pinctrl-names = "default";
 928                                 pinctrl-0 = <&pinctrl_i2c0>;
 929                                 clocks = <&twi0_clk>;
 930                                 status = "disabled";
 931                         };
 932
 933                         i2c1: i2c@f8014000 {
 934                                 compatible = "atmel,at91sam9x5-i2c";
 935                                 reg = <0xf8014000 0x100>;
 936                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 937                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
 938                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
 939                                 dma-names = "tx", "rx";
 940                                 #address-cells = <1>;
 941                                 #size-cells = <0>;
 942                                 pinctrl-names = "default";
 943                                 pinctrl-0 = <&pinctrl_i2c1>;
 944                                 clocks = <&twi1_clk>;
 945                                 status = "disabled";
 946                         };
 947
 948                         i2c2: i2c@f8018000 {
 949                                 compatible = "atmel,at91sam9x5-i2c";
 950                                 reg = <0xf8018000 0x100>;
 951                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 952                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
 953                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
 954                                 dma-names = "tx", "rx";
 955                                 #address-cells = <1>;
 956                                 #size-cells = <0>;
 957                                 pinctrl-names = "default";
 958                                 pinctrl-0 = <&pinctrl_i2c2>;
 959                                 clocks = <&twi2_clk>;
 960                                 status = "disabled";
 961                         };
 962
 963                         uart0: serial@f8040000 {
 964                                 compatible = "atmel,at91sam9260-usart";
 965                                 reg = <0xf8040000 0x200>;
 966                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 967                                 pinctrl-names = "default";
 968                                 pinctrl-0 = <&pinctrl_uart0>;
 969                                 clocks = <&uart0_clk>;
 970                                 clock-names = "usart";
 971                                 status = "disabled";
 972                         };
 973
 974                         uart1: serial@f8044000 {
 975                                 compatible = "atmel,at91sam9260-usart";
 976                                 reg = <0xf8044000 0x200>;
 977                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 978                                 pinctrl-names = "default";
 979                                 pinctrl-0 = <&pinctrl_uart1>;
 980                                 clocks = <&uart1_clk>;
 981                                 clock-names = "usart";
 982                                 status = "disabled";
 983                         };
 984
 985                         adc0: adc@f804c000 {
 986                                 #address-cells = <1>;
 987                                 #size-cells = <0>;
 988                                 compatible = "atmel,at91sam9x5-adc";
 989                                 reg = <0xf804c000 0x100>;
 990                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
 991                                 clocks = <&adc_clk>,
 992                                          <&adc_op_clk>;
 993                                 clock-names = "adc_clk", "adc_op_clk";
 994                                 atmel,adc-use-external-triggers;
 995                                 atmel,adc-channels-used = <0xffff>;
 996                                 atmel,adc-vref = <3300>;
 997                                 atmel,adc-startup-time = <40>;
 998                                 atmel,adc-res = <8 10>;
 999                                 atmel,adc-res-names = "lowres", "highres";
1000                                 atmel,adc-use-res = "highres";
1001
1002                                 trigger@0 {
1003                                         reg = <0>;
1004                                         trigger-name = "external-rising";
1005                                         trigger-value = <0x1>;
1006                                         trigger-external;
1007                                 };
1008
1009                                 trigger@1 {
1010                                         reg = <1>;
1011                                         trigger-name = "external-falling";
1012                                         trigger-value = <0x2>;
1013                                         trigger-external;
1014                                 };
1015
1016                                 trigger@2 {
1017                                         reg = <2>;
1018                                         trigger-name = "external-any";
1019                                         trigger-value = <0x3>;
1020                                         trigger-external;
1021                                 };
1022
1023                                 trigger@3 {
1024                                         reg = <3>;
1025                                         trigger-name = "continuous";
1026                                         trigger-value = <0x6>;
1027                                 };
1028                         };
1029
1030                         spi0: spi@f0000000 {
1031                                 #address-cells = <1>;
1032                                 #size-cells = <0>;
1033                                 compatible = "atmel,at91rm9200-spi";
1034                                 reg = <0xf0000000 0x100>;
1035                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1036                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1037                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1038                                 dma-names = "tx", "rx";
1039                                 pinctrl-names = "default";
1040                                 pinctrl-0 = <&pinctrl_spi0>;
1041                                 clocks = <&spi0_clk>;
1042                                 clock-names = "spi_clk";
1043                                 status = "disabled";
1044                         };
1045
1046                         spi1: spi@f0004000 {
1047                                 #address-cells = <1>;
1048                                 #size-cells = <0>;
1049                                 compatible = "atmel,at91rm9200-spi";
1050                                 reg = <0xf0004000 0x100>;
1051                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1052                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1053                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1054                                 dma-names = "tx", "rx";
1055                                 pinctrl-names = "default";
1056                                 pinctrl-0 = <&pinctrl_spi1>;
1057                                 clocks = <&spi1_clk>;
1058                                 clock-names = "spi_clk";
1059                                 status = "disabled";
1060                         };
1061
1062                         usb2: gadget@f803c000 {
1063                                 #address-cells = <1>;
1064                                 #size-cells = <0>;
1065                                 compatible = "atmel,at91sam9rl-udc";
1066                                 reg = <0x00500000 0x80000
1067                                        0xf803c000 0x400>;
1068                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1069                                 clocks = <&utmi>, <&udphs_clk>;
1070                                 clock-names = "hclk", "pclk";
1071                                 status = "disabled";
1072
1073                                 ep0 {
1074                                         reg = <0>;
1075                                         atmel,fifo-size = <64>;
1076                                         atmel,nb-banks = <1>;
1077                                 };
1078
1079                                 ep1 {
1080                                         reg = <1>;
1081                                         atmel,fifo-size = <1024>;
1082                                         atmel,nb-banks = <2>;
1083                                         atmel,can-dma;
1084                                         atmel,can-isoc;
1085                                 };
1086
1087                                 ep2 {
1088                                         reg = <2>;
1089                                         atmel,fifo-size = <1024>;
1090                                         atmel,nb-banks = <2>;
1091                                         atmel,can-dma;
1092                                         atmel,can-isoc;
1093                                 };
1094
1095                                 ep3 {
1096                                         reg = <3>;
1097                                         atmel,fifo-size = <1024>;
1098                                         atmel,nb-banks = <3>;
1099                                         atmel,can-dma;
1100                                 };
1101
1102                                 ep4 {
1103                                         reg = <4>;
1104                                         atmel,fifo-size = <1024>;
1105                                         atmel,nb-banks = <3>;
1106                                         atmel,can-dma;
1107                                 };
1108
1109                                 ep5 {
1110                                         reg = <5>;
1111                                         atmel,fifo-size = <1024>;
1112                                         atmel,nb-banks = <3>;
1113                                         atmel,can-dma;
1114                                         atmel,can-isoc;
1115                                 };
1116
1117                                 ep6 {
1118                                         reg = <6>;
1119                                         atmel,fifo-size = <1024>;
1120                                         atmel,nb-banks = <3>;
1121                                         atmel,can-dma;
1122                                         atmel,can-isoc;
1123                                 };
1124                         };
1125
1126                         watchdog@fffffe40 {
1127                                 compatible = "atmel,at91sam9260-wdt";
1128                                 reg = <0xfffffe40 0x10>;
1129                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1130                                 atmel,watchdog-type = "hardware";
1131                                 atmel,reset-type = "all";
1132                                 atmel,dbg-halt;
1133                                 status = "disabled";
1134                         };
1135
1136                         rtc@fffffeb0 {
1137                                 compatible = "atmel,at91sam9x5-rtc";
1138                                 reg = <0xfffffeb0 0x40>;
1139                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1140                                 status = "disabled";
1141                         };
1142
1143                         pwm0: pwm@f8034000 {
1144                                 compatible = "atmel,at91sam9rl-pwm";
1145                                 reg = <0xf8034000 0x300>;
1146                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1147                                 clocks = <&pwm_clk>;
1148                                 #pwm-cells = <3>;
1149                                 status = "disabled";
1150                         };
1151                 };
1152
1153                 nand0: nand@40000000 {
1154                         compatible = "atmel,at91rm9200-nand";
1155                         #address-cells = <1>;
1156                         #size-cells = <1>;
1157                         reg = <0x40000000 0x10000000
1158                                0xffffe000 0x600         /* PMECC Registers */
1159                                0xffffe600 0x200         /* PMECC Error Location Registers */
1160                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
1161                               >;
1162                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1163                         atmel,nand-addr-offset = <21>;
1164                         atmel,nand-cmd-offset = <22>;
1165                         atmel,nand-has-dma;
1166                         pinctrl-names = "default";
1167                         pinctrl-0 = <&pinctrl_nand>;
1168                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1169                                  &pioD 4 GPIO_ACTIVE_HIGH
1170                                  0
1171                                 >;
1172                         status = "disabled";
1173                 };
1174
1175                 usb0: ohci@00600000 {
1176                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1177                         reg = <0x00600000 0x100000>;
1178                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1179                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1180                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1181                         status = "disabled";
1182                 };
1183
1184                 usb1: ehci@00700000 {
1185                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1186                         reg = <0x00700000 0x100000>;
1187                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1188                         clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1189                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1190                         status = "disabled";
1191                 };
1192         };
1193
1194         i2c@0 {
1195                 compatible = "i2c-gpio";
1196                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1197                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1198                         >;
1199                 i2c-gpio,sda-open-drain;
1200                 i2c-gpio,scl-open-drain;
1201                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1202                 #address-cells = <1>;
1203                 #size-cells = <0>;
1204                 pinctrl-names = "default";
1205                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1206                 status = "disabled";
1207         };
1208
1209         i2c@1 {
1210                 compatible = "i2c-gpio";
1211                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1212                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1213                         >;
1214                 i2c-gpio,sda-open-drain;
1215                 i2c-gpio,scl-open-drain;
1216                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1217                 #address-cells = <1>;
1218                 #size-cells = <0>;
1219                 pinctrl-names = "default";
1220                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1221                 status = "disabled";
1222         };
1223
1224         i2c@2 {
1225                 compatible = "i2c-gpio";
1226                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1227                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1228                         >;
1229                 i2c-gpio,sda-open-drain;
1230                 i2c-gpio,scl-open-drain;
1231                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1232                 #address-cells = <1>;
1233                 #size-cells = <0>;
1234                 pinctrl-names = "default";
1235                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1236                 status = "disabled";
1237         };
1238 };