2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
7 * Licensed under GPLv2 or later.
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
19 model = "Atmel AT91SAM9N12 SoC";
20 compatible = "atmel,at91sam9n12";
21 interrupt-parent = <&aic>;
45 compatible = "arm,arm926ej-s";
51 device_type = "memory";
52 reg = <0x20000000 0x10000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
70 compatible = "mmio-sram";
71 reg = <0x00300000 0x8000>;
75 compatible = "simple-bus";
81 compatible = "simple-bus";
86 aic: interrupt-controller@fffff000 {
87 #interrupt-cells = <3>;
88 compatible = "atmel,at91rm9200-aic";
90 reg = <0xfffff000 0x200>;
91 atmel,external-irqs = <31>;
94 matrix: matrix@ffffde00 {
95 compatible = "atmel,at91sam9n12-matrix", "syscon";
96 reg = <0xffffde00 0x100>;
99 pmecc: ecc-engine@ffffe000 {
100 compatible = "atmel,at91sam9g45-pmecc";
101 reg = <0xffffe000 0x600>,
105 ramc0: ramc@ffffe800 {
106 compatible = "atmel,at91sam9g45-ddramc";
107 reg = <0xffffe800 0x200>;
109 clock-names = "ddrck";
113 compatible = "atmel,at91sam9260-smc", "syscon";
114 reg = <0xffffea00 0x200>;
118 compatible = "atmel,at91sam9n12-pmc", "syscon";
119 reg = <0xfffffc00 0x200>;
120 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
121 interrupt-controller;
122 #address-cells = <1>;
124 #interrupt-cells = <1>;
126 main_rc_osc: main_rc_osc {
127 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
129 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
130 clock-frequency = <12000000>;
131 clock-accuracy = <50000000>;
135 compatible = "atmel,at91rm9200-clk-main-osc";
137 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
138 clocks = <&main_xtal>;
142 compatible = "atmel,at91sam9x5-clk-main";
144 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
145 clocks = <&main_rc_osc>, <&main_osc>;
149 compatible = "atmel,at91rm9200-clk-pll";
151 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
154 atmel,clk-input-range = <2000000 32000000>;
155 #atmel,pll-clk-output-range-cells = <4>;
156 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
157 <695000000 750000000 1 0>,
158 <645000000 700000000 2 0>,
159 <595000000 650000000 3 0>,
160 <545000000 600000000 0 1>,
161 <495000000 555000000 1 1>,
162 <445000000 500000000 2 1>,
163 <400000000 450000000 3 1>;
167 compatible = "atmel,at91sam9x5-clk-plldiv";
173 compatible = "atmel,at91rm9200-clk-pll";
175 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
178 atmel,clk-input-range = <2000000 32000000>;
179 #atmel,pll-clk-output-range-cells = <3>;
180 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
184 compatible = "atmel,at91sam9x5-clk-master";
186 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
187 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
188 atmel,clk-output-range = <0 133333333>;
189 atmel,clk-divisors = <1 2 4 3>;
190 atmel,master-clk-have-div3-pres;
194 compatible = "atmel,at91sam9n12-clk-usb";
200 compatible = "atmel,at91sam9x5-clk-programmable";
201 #address-cells = <1>;
203 interrupt-parent = <&pmc>;
204 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
209 interrupts = <AT91_PMC_PCKRDY(0)>;
215 interrupts = <AT91_PMC_PCKRDY(1)>;
220 compatible = "atmel,at91rm9200-clk-system";
221 #address-cells = <1>;
262 compatible = "atmel,at91sam9x5-clk-peripheral";
263 #address-cells = <1>;
267 pioAB_clk: pioAB_clk {
272 pioCD_clk: pioCD_clk {
282 usart0_clk: usart0_clk {
287 usart1_clk: usart1_clk {
292 usart2_clk: usart2_clk {
297 usart3_clk: usart3_clk {
327 uart0_clk: uart0_clk {
332 uart1_clk: uart1_clk {
357 uhphs_clk: uhphs_clk {
362 udphs_clk: udphs_clk {
395 compatible = "atmel,at91sam9g45-rstc";
396 reg = <0xfffffe00 0x10>;
400 pit: timer@fffffe30 {
401 compatible = "atmel,at91sam9260-pit";
402 reg = <0xfffffe30 0xf>;
403 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
408 compatible = "atmel,at91sam9x5-shdwc";
409 reg = <0xfffffe10 0x10>;
414 compatible = "atmel,at91sam9x5-sckc";
415 reg = <0xfffffe50 0x4>;
418 compatible = "atmel,at91sam9x5-clk-slow-osc";
420 clocks = <&slow_xtal>;
423 slow_rc_osc: slow_rc_osc {
424 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
426 clock-frequency = <32768>;
427 clock-accuracy = <50000000>;
431 compatible = "atmel,at91sam9x5-clk-slow";
433 clocks = <&slow_rc_osc>, <&slow_osc>;
438 compatible = "atmel,hsmci";
439 reg = <0xf0008000 0x600>;
440 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
441 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
443 clocks = <&mci0_clk>;
444 clock-names = "mci_clk";
445 #address-cells = <1>;
450 tcb0: timer@f8008000 {
451 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
452 #address-cells = <1>;
454 reg = <0xf8008000 0x100>;
455 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
456 clocks = <&tcb_clk>, <&clk32k>;
457 clock-names = "t0_clk", "slow_clk";
460 tcb1: timer@f800c000 {
461 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
462 #address-cells = <1>;
464 reg = <0xf800c000 0x100>;
465 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
466 clocks = <&tcb_clk>, <&clk32k>;
467 clock-names = "t0_clk", "slow_clk";
470 hlcdc: hlcdc@f8038000 {
471 compatible = "atmel,at91sam9n12-hlcdc";
472 reg = <0xf8038000 0x2000>;
473 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
474 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
475 clock-names = "periph_clk", "sys_clk", "slow_clk";
478 hlcdc-display-controller {
479 compatible = "atmel,hlcdc-display-controller";
480 #address-cells = <1>;
484 #address-cells = <1>;
490 hlcdc_pwm: hlcdc-pwm {
491 compatible = "atmel,hlcdc-pwm";
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_lcd_pwm>;
498 dma: dma-controller@ffffec00 {
499 compatible = "atmel,at91sam9g45-dma";
500 reg = <0xffffec00 0x200>;
501 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
503 clocks = <&dma0_clk>;
504 clock-names = "dma_clk";
508 #address-cells = <1>;
510 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
511 ranges = <0xfffff400 0xfffff400 0x800>;
515 0xffffffff 0xffe07983 0x00000000 /* pioA */
516 0x00040000 0x00047e0f 0x00000000 /* pioB */
517 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
518 0x003fffff 0x003f8000 0x00000000 /* pioD */
521 /* shared pinctrl settings */
523 pinctrl_dbgu: dbgu-0 {
525 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
526 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
531 pinctrl_lcd_base: lcd-base-0 {
533 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
534 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
535 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
536 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
537 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
540 pinctrl_lcd_pwm: lcd-pwm-0 {
541 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
544 pinctrl_lcd_rgb888: lcd-rgb-3 {
546 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
547 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
548 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
549 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
550 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
551 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
552 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
553 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
554 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
555 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
556 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
557 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
558 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
559 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
560 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
561 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
562 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
563 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
564 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
565 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
566 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
567 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
568 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
569 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
574 pinctrl_usart0: usart0-0 {
576 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
577 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
580 pinctrl_usart0_rts: usart0_rts-0 {
582 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
585 pinctrl_usart0_cts: usart0_cts-0 {
587 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
592 pinctrl_usart1: usart1-0 {
594 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
595 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
600 pinctrl_usart2: usart2-0 {
602 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
603 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
606 pinctrl_usart2_rts: usart2_rts-0 {
608 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
611 pinctrl_usart2_cts: usart2_cts-0 {
613 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
618 pinctrl_usart3: usart3-0 {
620 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
621 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
624 pinctrl_usart3_rts: usart3_rts-0 {
626 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
629 pinctrl_usart3_cts: usart3_cts-0 {
631 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
636 pinctrl_uart0: uart0-0 {
638 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
639 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
644 pinctrl_uart1: uart1-0 {
646 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
647 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
652 pinctrl_nand_rb: nand-rb-0 {
654 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
657 pinctrl_nand_cs: nand-cs-0 {
659 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
664 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
666 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
667 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
668 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
671 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
673 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
674 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
675 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
678 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
680 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
681 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
682 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
683 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
688 pinctrl_ssc0_tx: ssc0_tx-0 {
690 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
691 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
692 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
695 pinctrl_ssc0_rx: ssc0_rx-0 {
697 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
698 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
699 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
704 pinctrl_spi0: spi0-0 {
706 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
707 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
708 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
713 pinctrl_spi1: spi1-0 {
715 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
716 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
717 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
722 pinctrl_i2c0: i2c0-0 {
724 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
725 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
730 pinctrl_i2c1: i2c1-0 {
732 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
733 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
738 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
739 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
742 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
743 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
746 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
747 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
750 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
751 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
754 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
755 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
758 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
759 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
762 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
763 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
766 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
767 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
770 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
771 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
776 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
777 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
780 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
781 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
784 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
785 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
788 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
789 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
792 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
793 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
796 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
797 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
800 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
801 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
804 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
805 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
808 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
809 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
813 pioA: gpio@fffff400 {
814 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
815 reg = <0xfffff400 0x200>;
816 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
819 interrupt-controller;
820 #interrupt-cells = <2>;
821 clocks = <&pioAB_clk>;
824 pioB: gpio@fffff600 {
825 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
826 reg = <0xfffff600 0x200>;
827 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
830 interrupt-controller;
831 #interrupt-cells = <2>;
832 clocks = <&pioAB_clk>;
835 pioC: gpio@fffff800 {
836 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
837 reg = <0xfffff800 0x200>;
838 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
841 interrupt-controller;
842 #interrupt-cells = <2>;
843 clocks = <&pioCD_clk>;
846 pioD: gpio@fffffa00 {
847 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
848 reg = <0xfffffa00 0x200>;
849 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
852 interrupt-controller;
853 #interrupt-cells = <2>;
854 clocks = <&pioCD_clk>;
858 dbgu: serial@fffff200 {
859 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
860 reg = <0xfffff200 0x200>;
861 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_dbgu>;
865 clock-names = "usart";
870 compatible = "atmel,at91sam9g45-ssc";
871 reg = <0xf0010000 0x4000>;
872 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
873 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
874 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
875 dma-names = "tx", "rx";
876 pinctrl-names = "default";
877 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
878 clocks = <&ssc0_clk>;
879 clock-names = "pclk";
883 usart0: serial@f801c000 {
884 compatible = "atmel,at91sam9260-usart";
885 reg = <0xf801c000 0x4000>;
886 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_usart0>;
889 clocks = <&usart0_clk>;
890 clock-names = "usart";
894 usart1: serial@f8020000 {
895 compatible = "atmel,at91sam9260-usart";
896 reg = <0xf8020000 0x4000>;
897 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
898 pinctrl-names = "default";
899 pinctrl-0 = <&pinctrl_usart1>;
900 clocks = <&usart1_clk>;
901 clock-names = "usart";
905 usart2: serial@f8024000 {
906 compatible = "atmel,at91sam9260-usart";
907 reg = <0xf8024000 0x4000>;
908 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
909 pinctrl-names = "default";
910 pinctrl-0 = <&pinctrl_usart2>;
911 clocks = <&usart2_clk>;
912 clock-names = "usart";
916 usart3: serial@f8028000 {
917 compatible = "atmel,at91sam9260-usart";
918 reg = <0xf8028000 0x4000>;
919 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
920 pinctrl-names = "default";
921 pinctrl-0 = <&pinctrl_usart3>;
922 clocks = <&usart3_clk>;
923 clock-names = "usart";
928 compatible = "atmel,at91sam9x5-i2c";
929 reg = <0xf8010000 0x100>;
930 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
931 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
932 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
933 dma-names = "tx", "rx";
934 #address-cells = <1>;
936 pinctrl-names = "default";
937 pinctrl-0 = <&pinctrl_i2c0>;
938 clocks = <&twi0_clk>;
943 compatible = "atmel,at91sam9x5-i2c";
944 reg = <0xf8014000 0x100>;
945 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
946 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
947 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
948 dma-names = "tx", "rx";
949 #address-cells = <1>;
951 pinctrl-names = "default";
952 pinctrl-0 = <&pinctrl_i2c1>;
953 clocks = <&twi1_clk>;
958 #address-cells = <1>;
960 compatible = "atmel,at91rm9200-spi";
961 reg = <0xf0000000 0x100>;
962 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
963 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
964 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
965 dma-names = "tx", "rx";
966 pinctrl-names = "default";
967 pinctrl-0 = <&pinctrl_spi0>;
968 clocks = <&spi0_clk>;
969 clock-names = "spi_clk";
974 #address-cells = <1>;
976 compatible = "atmel,at91rm9200-spi";
977 reg = <0xf0004000 0x100>;
978 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
979 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
980 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
981 dma-names = "tx", "rx";
982 pinctrl-names = "default";
983 pinctrl-0 = <&pinctrl_spi1>;
984 clocks = <&spi1_clk>;
985 clock-names = "spi_clk";
990 compatible = "atmel,at91sam9260-wdt";
991 reg = <0xfffffe40 0x10>;
992 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
994 atmel,watchdog-type = "hardware";
995 atmel,reset-type = "all";
1001 compatible = "atmel,at91rm9200-rtc";
1002 reg = <0xfffffeb0 0x40>;
1003 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1005 status = "disabled";
1008 pwm0: pwm@f8034000 {
1009 compatible = "atmel,at91sam9rl-pwm";
1010 reg = <0xf8034000 0x300>;
1011 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1013 clocks = <&pwm_clk>;
1014 status = "disabled";
1017 usb1: gadget@f803c000 {
1018 compatible = "atmel,at91sam9260-udc";
1019 reg = <0xf803c000 0x4000>;
1020 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
1021 clocks = <&udphs_clk>, <&udpck>;
1022 clock-names = "pclk", "hclk";
1023 status = "disabled";
1028 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1029 reg = <0x00500000 0x00100000>;
1030 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1031 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1032 clock-names = "ohci_clk", "hclk", "uhpck";
1033 status = "disabled";
1037 compatible = "atmel,at91sam9x5-ebi";
1038 #address-cells = <2>;
1041 atmel,matrix = <&matrix>;
1042 reg = <0x10000000 0x60000000>;
1043 ranges = <0x0 0x0 0x10000000 0x10000000
1044 0x1 0x0 0x20000000 0x10000000
1045 0x2 0x0 0x30000000 0x10000000
1046 0x3 0x0 0x40000000 0x10000000
1047 0x4 0x0 0x50000000 0x10000000
1048 0x5 0x0 0x60000000 0x10000000>;
1050 status = "disabled";
1052 nand_controller: nand-controller {
1053 compatible = "atmel,at91sam9g45-nand-controller";
1054 ecc-engine = <&pmecc>;
1055 #address-cells = <2>;
1058 status = "disabled";
1064 compatible = "i2c-gpio";
1065 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1066 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1068 i2c-gpio,sda-open-drain;
1069 i2c-gpio,scl-open-drain;
1070 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1071 #address-cells = <1>;
1073 status = "disabled";