arch/arm/boot/dts/at91sam9n12.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   4  *
   5  *  Copyright (C) 2012 Atmel,
   6  *                2012 Hong Xu <hong.xu@atmel.com>
   7  */
   8
   9 #include <dt-bindings/dma/at91.h>
  10 #include <dt-bindings/pinctrl/at91.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/clock/at91.h>
  14
  15 / {
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         model = "Atmel AT91SAM9N12 SoC";
  19         compatible = "atmel,at91sam9n12";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 tcb0 = &tcb0;
  33                 tcb1 = &tcb1;
  34                 i2c0 = &i2c0;
  35                 i2c1 = &i2c1;
  36                 ssc0 = &ssc0;
  37                 pwm0 = &pwm0;
  38         };
  39         cpus {
  40                 #address-cells = <0>;
  41                 #size-cells = <0>;
  42
  43                 cpu {
  44                         compatible = "arm,arm926ej-s";
  45                         device_type = "cpu";
  46                 };
  47         };
  48
  49         memory {
  50                 device_type = "memory";
  51                 reg = <0x20000000 0x10000000>;
  52         };
  53
  54         clocks {
  55                 slow_xtal: slow_xtal {
  56                         compatible = "fixed-clock";
  57                         #clock-cells = <0>;
  58                         clock-frequency = <0>;
  59                 };
  60
  61                 main_xtal: main_xtal {
  62                         compatible = "fixed-clock";
  63                         #clock-cells = <0>;
  64                         clock-frequency = <0>;
  65                 };
  66         };
  67
  68         sram: sram@300000 {
  69                 compatible = "mmio-sram";
  70                 reg = <0x00300000 0x8000>;
  71         };
  72
  73         ahb {
  74                 compatible = "simple-bus";
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 ranges;
  78
  79                 apb {
  80                         compatible = "simple-bus";
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83                         ranges;
  84
  85                         aic: interrupt-controller@fffff000 {
  86                                 #interrupt-cells = <3>;
  87                                 compatible = "atmel,at91rm9200-aic";
  88                                 interrupt-controller;
  89                                 reg = <0xfffff000 0x200>;
  90                                 atmel,external-irqs = <31>;
  91                         };
  92
  93                         matrix: matrix@ffffde00 {
  94                                 compatible = "atmel,at91sam9n12-matrix", "syscon";
  95                                 reg = <0xffffde00 0x100>;
  96                         };
  97
  98                         pmecc: ecc-engine@ffffe000 {
  99                                 compatible = "atmel,at91sam9g45-pmecc";
 100                                 reg = <0xffffe000 0x600>,
 101                                       <0xffffe600 0x200>;
 102                         };
 103
 104                         ramc0: ramc@ffffe800 {
 105                                 compatible = "atmel,at91sam9g45-ddramc";
 106                                 reg = <0xffffe800 0x200>;
 107                                 clocks = <&ddrck>;
 108                                 clock-names = "ddrck";
 109                         };
 110
 111                         smc: smc@ffffea00 {
 112                                 compatible = "atmel,at91sam9260-smc", "syscon";
 113                                 reg = <0xffffea00 0x200>;
 114                         };
 115
 116                         pmc: pmc@fffffc00 {
 117                                 compatible = "atmel,at91sam9n12-pmc", "syscon";
 118                                 reg = <0xfffffc00 0x200>;
 119                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 120                                 interrupt-controller;
 121                                 #address-cells = <1>;
 122                                 #size-cells = <0>;
 123                                 #interrupt-cells = <1>;
 124
 125                                 main_rc_osc: main_rc_osc {
 126                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 127                                         #clock-cells = <0>;
 128                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 129                                         clock-frequency = <12000000>;
 130                                         clock-accuracy = <50000000>;
 131                                 };
 132
 133                                 main_osc: main_osc {
 134                                         compatible = "atmel,at91rm9200-clk-main-osc";
 135                                         #clock-cells = <0>;
 136                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 137                                         clocks = <&main_xtal>;
 138                                 };
 139
 140                                 main: mainck {
 141                                         compatible = "atmel,at91sam9x5-clk-main";
 142                                         #clock-cells = <0>;
 143                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 144                                         clocks = <&main_rc_osc>, <&main_osc>;
 145                                 };
 146
 147                                 plla: pllack {
 148                                         compatible = "atmel,at91rm9200-clk-pll";
 149                                         #clock-cells = <0>;
 150                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 151                                         clocks = <&main>;
 152                                         reg = <0>;
 153                                         atmel,clk-input-range = <2000000 32000000>;
 154                                         #atmel,pll-clk-output-range-cells = <4>;
 155                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
 156                                                                       <695000000 750000000 1 0>,
 157                                                                       <645000000 700000000 2 0>,
 158                                                                       <595000000 650000000 3 0>,
 159                                                                       <545000000 600000000 0 1>,
 160                                                                       <495000000 555000000 1 1>,
 161                                                                       <445000000 500000000 2 1>,
 162                                                                       <400000000 450000000 3 1>;
 163                                 };
 164
 165                                 plladiv: plladivck {
 166                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 167                                         #clock-cells = <0>;
 168                                         clocks = <&plla>;
 169                                 };
 170
 171                                 pllb: pllbck {
 172                                         compatible = "atmel,at91rm9200-clk-pll";
 173                                         #clock-cells = <0>;
 174                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 175                                         clocks = <&main>;
 176                                         reg = <1>;
 177                                         atmel,clk-input-range = <2000000 32000000>;
 178                                         #atmel,pll-clk-output-range-cells = <3>;
 179                                         atmel,pll-clk-output-ranges = <30000000 100000000 0>;
 180                                 };
 181
 182                                 mck: masterck {
 183                                         compatible = "atmel,at91sam9x5-clk-master";
 184                                         #clock-cells = <0>;
 185                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 186                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
 187                                         atmel,clk-output-range = <0 133333333>;
 188                                         atmel,clk-divisors = <1 2 4 3>;
 189                                         atmel,master-clk-have-div3-pres;
 190                                 };
 191
 192                                 usb: usbck {
 193                                         compatible = "atmel,at91sam9n12-clk-usb";
 194                                         #clock-cells = <0>;
 195                                         clocks = <&pllb>;
 196                                 };
 197
 198                                 prog: progck {
 199                                         compatible = "atmel,at91sam9x5-clk-programmable";
 200                                         #address-cells = <1>;
 201                                         #size-cells = <0>;
 202                                         interrupt-parent = <&pmc>;
 203                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
 204
 205                                         prog0: prog0 {
 206                                                 #clock-cells = <0>;
 207                                                 reg = <0>;
 208                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 209                                         };
 210
 211                                         prog1: prog1 {
 212                                                 #clock-cells = <0>;
 213                                                 reg = <1>;
 214                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 215                                         };
 216                                 };
 217
 218                                 systemck {
 219                                         compatible = "atmel,at91rm9200-clk-system";
 220                                         #address-cells = <1>;
 221                                         #size-cells = <0>;
 222
 223                                         ddrck: ddrck {
 224                                                 #clock-cells = <0>;
 225                                                 reg = <2>;
 226                                                 clocks = <&mck>;
 227                                         };
 228
 229                                         lcdck: lcdck {
 230                                                 #clock-cells = <0>;
 231                                                 reg = <3>;
 232                                                 clocks = <&mck>;
 233                                         };
 234
 235                                         uhpck: uhpck {
 236                                                 #clock-cells = <0>;
 237                                                 reg = <6>;
 238                                                 clocks = <&usb>;
 239                                         };
 240
 241                                         udpck: udpck {
 242                                                 #clock-cells = <0>;
 243                                                 reg = <7>;
 244                                                 clocks = <&usb>;
 245                                         };
 246
 247                                         pck0: pck0 {
 248                                                 #clock-cells = <0>;
 249                                                 reg = <8>;
 250                                                 clocks = <&prog0>;
 251                                         };
 252
 253                                         pck1: pck1 {
 254                                                 #clock-cells = <0>;
 255                                                 reg = <9>;
 256                                                 clocks = <&prog1>;
 257                                         };
 258                                 };
 259
 260                                 periphck {
 261                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 262                                         #address-cells = <1>;
 263                                         #size-cells = <0>;
 264                                         clocks = <&mck>;
 265
 266                                         pioAB_clk: pioAB_clk {
 267                                                 #clock-cells = <0>;
 268                                                 reg = <2>;
 269                                         };
 270
 271                                         pioCD_clk: pioCD_clk {
 272                                                 #clock-cells = <0>;
 273                                                 reg = <3>;
 274                                         };
 275
 276                                         fuse_clk: fuse_clk {
 277                                                 #clock-cells = <0>;
 278                                                 reg = <4>;
 279                                         };
 280
 281                                         usart0_clk: usart0_clk {
 282                                                 #clock-cells = <0>;
 283                                                 reg = <5>;
 284                                         };
 285
 286                                         usart1_clk: usart1_clk {
 287                                                 #clock-cells = <0>;
 288                                                 reg = <6>;
 289                                         };
 290
 291                                         usart2_clk: usart2_clk {
 292                                                 #clock-cells = <0>;
 293                                                 reg = <7>;
 294                                         };
 295
 296                                         usart3_clk: usart3_clk {
 297                                                 #clock-cells = <0>;
 298                                                 reg = <8>;
 299                                         };
 300
 301                                         twi0_clk: twi0_clk {
 302                                                 reg = <9>;
 303                                                 #clock-cells = <0>;
 304                                         };
 305
 306                                         twi1_clk: twi1_clk {
 307                                                 #clock-cells = <0>;
 308                                                 reg = <10>;
 309                                         };
 310
 311                                         mci0_clk: mci0_clk {
 312                                                 #clock-cells = <0>;
 313                                                 reg = <12>;
 314                                         };
 315
 316                                         spi0_clk: spi0_clk {
 317                                                 #clock-cells = <0>;
 318                                                 reg = <13>;
 319                                         };
 320
 321                                         spi1_clk: spi1_clk {
 322                                                 #clock-cells = <0>;
 323                                                 reg = <14>;
 324                                         };
 325
 326                                         uart0_clk: uart0_clk {
 327                                                 #clock-cells = <0>;
 328                                                 reg = <15>;
 329                                         };
 330
 331                                         uart1_clk: uart1_clk {
 332                                                 #clock-cells = <0>;
 333                                                 reg = <16>;
 334                                         };
 335
 336                                         tcb_clk: tcb_clk {
 337                                                 #clock-cells = <0>;
 338                                                 reg = <17>;
 339                                         };
 340
 341                                         pwm_clk: pwm_clk {
 342                                                 #clock-cells = <0>;
 343                                                 reg = <18>;
 344                                         };
 345
 346                                         adc_clk: adc_clk {
 347                                                 #clock-cells = <0>;
 348                                                 reg = <19>;
 349                                         };
 350
 351                                         dma0_clk: dma0_clk {
 352                                                 #clock-cells = <0>;
 353                                                 reg = <20>;
 354                                         };
 355
 356                                         uhphs_clk: uhphs_clk {
 357                                                 #clock-cells = <0>;
 358                                                 reg = <22>;
 359                                         };
 360
 361                                         udphs_clk: udphs_clk {
 362                                                 #clock-cells = <0>;
 363                                                 reg = <23>;
 364                                         };
 365
 366                                         lcdc_clk: lcdc_clk {
 367                                                 #clock-cells = <0>;
 368                                                 reg = <25>;
 369                                         };
 370
 371                                         sha_clk: sha_clk {
 372                                                 #clock-cells = <0>;
 373                                                 reg = <27>;
 374                                         };
 375
 376                                         ssc0_clk: ssc0_clk {
 377                                                 #clock-cells = <0>;
 378                                                 reg = <28>;
 379                                         };
 380
 381                                         aes_clk: aes_clk {
 382                                                 #clock-cells = <0>;
 383                                                 reg = <29>;
 384                                         };
 385
 386                                         trng_clk: trng_clk {
 387                                                 #clock-cells = <0>;
 388                                                 reg = <30>;
 389                                         };
 390                                 };
 391                         };
 392
 393                         rstc@fffffe00 {
 394                                 compatible = "atmel,at91sam9g45-rstc";
 395                                 reg = <0xfffffe00 0x10>;
 396                                 clocks = <&clk32k>;
 397                         };
 398
 399                         pit: timer@fffffe30 {
 400                                 compatible = "atmel,at91sam9260-pit";
 401                                 reg = <0xfffffe30 0xf>;
 402                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 403                                 clocks = <&mck>;
 404                         };
 405
 406                         shdwc@fffffe10 {
 407                                 compatible = "atmel,at91sam9x5-shdwc";
 408                                 reg = <0xfffffe10 0x10>;
 409                                 clocks = <&clk32k>;
 410                         };
 411
 412                         sckc@fffffe50 {
 413                                 compatible = "atmel,at91sam9x5-sckc";
 414                                 reg = <0xfffffe50 0x4>;
 415
 416                                 slow_osc: slow_osc {
 417                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 418                                         #clock-cells = <0>;
 419                                         clocks = <&slow_xtal>;
 420                                 };
 421
 422                                 slow_rc_osc: slow_rc_osc {
 423                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 424                                         #clock-cells = <0>;
 425                                         clock-frequency = <32768>;
 426                                         clock-accuracy = <50000000>;
 427                                 };
 428
 429                                 clk32k: slck {
 430                                         compatible = "atmel,at91sam9x5-clk-slow";
 431                                         #clock-cells = <0>;
 432                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 433                                 };
 434                         };
 435
 436                         mmc0: mmc@f0008000 {
 437                                 compatible = "atmel,hsmci";
 438                                 reg = <0xf0008000 0x600>;
 439                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 440                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
 441                                 dma-names = "rxtx";
 442                                 clocks = <&mci0_clk>;
 443                                 clock-names = "mci_clk";
 444                                 #address-cells = <1>;
 445                                 #size-cells = <0>;
 446                                 status = "disabled";
 447                         };
 448
 449                         tcb0: timer@f8008000 {
 450                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 451                                 #address-cells = <1>;
 452                                 #size-cells = <0>;
 453                                 reg = <0xf8008000 0x100>;
 454                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 455                                 clocks = <&tcb_clk>, <&clk32k>;
 456                                 clock-names = "t0_clk", "slow_clk";
 457                         };
 458
 459                         tcb1: timer@f800c000 {
 460                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 461                                 #address-cells = <1>;
 462                                 #size-cells = <0>;
 463                                 reg = <0xf800c000 0x100>;
 464                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 465                                 clocks = <&tcb_clk>, <&clk32k>;
 466                                 clock-names = "t0_clk", "slow_clk";
 467                         };
 468
 469                         hlcdc: hlcdc@f8038000 {
 470                                 compatible = "atmel,at91sam9n12-hlcdc";
 471                                 reg = <0xf8038000 0x2000>;
 472                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
 473                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 474                                 clock-names = "periph_clk", "sys_clk", "slow_clk";
 475                                 status = "disabled";
 476
 477                                 hlcdc-display-controller {
 478                                         compatible = "atmel,hlcdc-display-controller";
 479                                         #address-cells = <1>;
 480                                         #size-cells = <0>;
 481
 482                                         port@0 {
 483                                                 #address-cells = <1>;
 484                                                 #size-cells = <0>;
 485                                                 reg = <0>;
 486                                         };
 487                                 };
 488
 489                                 hlcdc_pwm: hlcdc-pwm {
 490                                         compatible = "atmel,hlcdc-pwm";
 491                                         pinctrl-names = "default";
 492                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 493                                         #pwm-cells = <3>;
 494                                 };
 495                         };
 496
 497                         dma: dma-controller@ffffec00 {
 498                                 compatible = "atmel,at91sam9g45-dma";
 499                                 reg = <0xffffec00 0x200>;
 500                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 501                                 #dma-cells = <2>;
 502                                 clocks = <&dma0_clk>;
 503                                 clock-names = "dma_clk";
 504                         };
 505
 506                         pinctrl@fffff400 {
 507                                 #address-cells = <1>;
 508                                 #size-cells = <1>;
 509                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 510                                 ranges = <0xfffff400 0xfffff400 0x800>;
 511
 512                                 atmel,mux-mask = <
 513                                       /*    A         B          C     */
 514                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 515                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 516                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 517                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 518                                       >;
 519
 520                                 /* shared pinctrl settings */
 521                                 dbgu {
 522                                         pinctrl_dbgu: dbgu-0 {
 523                                                 atmel,pins =
 524                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 525                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 526                                         };
 527                                 };
 528
 529                                 lcd {
 530                                         pinctrl_lcd_base: lcd-base-0 {
 531                                                 atmel,pins =
 532                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
 533                                                          AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
 534                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDISP */
 535                                                          AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
 536                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
 537                                         };
 538
 539                                         pinctrl_lcd_pwm: lcd-pwm-0 {
 540                                                 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
 541                                         };
 542
 543                                         pinctrl_lcd_rgb888: lcd-rgb-3 {
 544                                                 atmel,pins =
 545                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
 546                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
 547                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
 548                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
 549                                                          AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
 550                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
 551                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
 552                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
 553                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
 554                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
 555                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
 556                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
 557                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
 558                                                          AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
 559                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
 560                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
 561                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
 562                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
 563                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
 564                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
 565                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
 566                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
 567                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
 568                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
 569                                         };
 570                                 };
 571
 572                                 usart0 {
 573                                         pinctrl_usart0: usart0-0 {
 574                                                 atmel,pins =
 575                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 576                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA0 periph A */
 577                                         };
 578
 579                                         pinctrl_usart0_rts: usart0_rts-0 {
 580                                                 atmel,pins =
 581                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 582                                         };
 583
 584                                         pinctrl_usart0_cts: usart0_cts-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 587                                         };
 588                                 };
 589
 590                                 usart1 {
 591                                         pinctrl_usart1: usart1-0 {
 592                                                 atmel,pins =
 593                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 594                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 595                                         };
 596                                 };
 597
 598                                 usart2 {
 599                                         pinctrl_usart2: usart2-0 {
 600                                                 atmel,pins =
 601                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 602                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA7 periph A */
 603                                         };
 604
 605                                         pinctrl_usart2_rts: usart2_rts-0 {
 606                                                 atmel,pins =
 607                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 608                                         };
 609
 610                                         pinctrl_usart2_cts: usart2_cts-0 {
 611                                                 atmel,pins =
 612                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 613                                         };
 614                                 };
 615
 616                                 usart3 {
 617                                         pinctrl_usart3: usart3-0 {
 618                                                 atmel,pins =
 619                                                         <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PC23 periph B with pullup */
 620                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
 621                                         };
 622
 623                                         pinctrl_usart3_rts: usart3_rts-0 {
 624                                                 atmel,pins =
 625                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
 626                                         };
 627
 628                                         pinctrl_usart3_cts: usart3_cts-0 {
 629                                                 atmel,pins =
 630                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
 631                                         };
 632                                 };
 633
 634                                 uart0 {
 635                                         pinctrl_uart0: uart0-0 {
 636                                                 atmel,pins =
 637                                                         <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
 638                                                          AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC8 periph C */
 639                                         };
 640                                 };
 641
 642                                 uart1 {
 643                                         pinctrl_uart1: uart1-0 {
 644                                                 atmel,pins =
 645                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
 646                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
 647                                         };
 648                                 };
 649
 650                                 nand {
 651                                         pinctrl_nand_rb: nand-rb-0 {
 652                                                 atmel,pins =
 653                                                         <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 654                                         };
 655
 656                                         pinctrl_nand_cs: nand-cs-0 {
 657                                                 atmel,pins =
 658                                                          <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 659                                         };
 660                                 };
 661
 662                                 mmc0 {
 663                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 664                                                 atmel,pins =
 665                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 666                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 667                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 668                                         };
 669
 670                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 671                                                 atmel,pins =
 672                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 673                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 674                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 675                                         };
 676
 677                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 678                                                 atmel,pins =
 679                                                         <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 680                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 681                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA13 periph B with pullup */
 682                                                          AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA14 periph B with pullup */
 683                                         };
 684                                 };
 685
 686                                 ssc0 {
 687                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 688                                                 atmel,pins =
 689                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 690                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 691                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 692                                         };
 693
 694                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 695                                                 atmel,pins =
 696                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 697                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 698                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 699                                         };
 700                                 };
 701
 702                                 spi0 {
 703                                         pinctrl_spi0: spi0-0 {
 704                                                 atmel,pins =
 705                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 706                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 707                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 708                                         };
 709                                 };
 710
 711                                 spi1 {
 712                                         pinctrl_spi1: spi1-0 {
 713                                                 atmel,pins =
 714                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 715                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 716                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 717                                         };
 718                                 };
 719
 720                                 i2c0 {
 721                                         pinctrl_i2c0: i2c0-0 {
 722                                                 atmel,pins =
 723                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
 724                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 725                                         };
 726                                 };
 727
 728                                 i2c1 {
 729                                         pinctrl_i2c1: i2c1-0 {
 730                                                 atmel,pins =
 731                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
 732                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 733                                         };
 734                                 };
 735
 736                                 tcb0 {
 737                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 738                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 739                                         };
 740
 741                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 742                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 743                                         };
 744
 745                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 746                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 747                                         };
 748
 749                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 750                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 751                                         };
 752
 753                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 754                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 755                                         };
 756
 757                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 758                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 759                                         };
 760
 761                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 762                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 763                                         };
 764
 765                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 766                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 767                                         };
 768
 769                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 770                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 771                                         };
 772                                 };
 773
 774                                 tcb1 {
 775                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 776                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 777                                         };
 778
 779                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 780                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 781                                         };
 782
 783                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 784                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 785                                         };
 786
 787                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 788                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 789                                         };
 790
 791                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 792                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 793                                         };
 794
 795                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 796                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 797                                         };
 798
 799                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 800                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 801                                         };
 802
 803                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 804                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 805                                         };
 806
 807                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 808                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 809                                         };
 810                                 };
 811
 812                                 pioA: gpio@fffff400 {
 813                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 814                                         reg = <0xfffff400 0x200>;
 815                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 816                                         #gpio-cells = <2>;
 817                                         gpio-controller;
 818                                         interrupt-controller;
 819                                         #interrupt-cells = <2>;
 820                                         clocks = <&pioAB_clk>;
 821                                 };
 822
 823                                 pioB: gpio@fffff600 {
 824                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 825                                         reg = <0xfffff600 0x200>;
 826                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 827                                         #gpio-cells = <2>;
 828                                         gpio-controller;
 829                                         interrupt-controller;
 830                                         #interrupt-cells = <2>;
 831                                         clocks = <&pioAB_clk>;
 832                                 };
 833
 834                                 pioC: gpio@fffff800 {
 835                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 836                                         reg = <0xfffff800 0x200>;
 837                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 838                                         #gpio-cells = <2>;
 839                                         gpio-controller;
 840                                         interrupt-controller;
 841                                         #interrupt-cells = <2>;
 842                                         clocks = <&pioCD_clk>;
 843                                 };
 844
 845                                 pioD: gpio@fffffa00 {
 846                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 847                                         reg = <0xfffffa00 0x200>;
 848                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 849                                         #gpio-cells = <2>;
 850                                         gpio-controller;
 851                                         interrupt-controller;
 852                                         #interrupt-cells = <2>;
 853                                         clocks = <&pioCD_clk>;
 854                                 };
 855                         };
 856
 857                         dbgu: serial@fffff200 {
 858                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 859                                 reg = <0xfffff200 0x200>;
 860                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 861                                 pinctrl-names = "default";
 862                                 pinctrl-0 = <&pinctrl_dbgu>;
 863                                 clocks = <&mck>;
 864                                 clock-names = "usart";
 865                                 status = "disabled";
 866                         };
 867
 868                         ssc0: ssc@f0010000 {
 869                                 compatible = "atmel,at91sam9g45-ssc";
 870                                 reg = <0xf0010000 0x4000>;
 871                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 872                                 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
 873                                        <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
 874                                 dma-names = "tx", "rx";
 875                                 pinctrl-names = "default";
 876                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 877                                 clocks = <&ssc0_clk>;
 878                                 clock-names = "pclk";
 879                                 status = "disabled";
 880                         };
 881
 882                         usart0: serial@f801c000 {
 883                                 compatible = "atmel,at91sam9260-usart";
 884                                 reg = <0xf801c000 0x4000>;
 885                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 886                                 pinctrl-names = "default";
 887                                 pinctrl-0 = <&pinctrl_usart0>;
 888                                 clocks = <&usart0_clk>;
 889                                 clock-names = "usart";
 890                                 status = "disabled";
 891                         };
 892
 893                         usart1: serial@f8020000 {
 894                                 compatible = "atmel,at91sam9260-usart";
 895                                 reg = <0xf8020000 0x4000>;
 896                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 897                                 pinctrl-names = "default";
 898                                 pinctrl-0 = <&pinctrl_usart1>;
 899                                 clocks = <&usart1_clk>;
 900                                 clock-names = "usart";
 901                                 status = "disabled";
 902                         };
 903
 904                         usart2: serial@f8024000 {
 905                                 compatible = "atmel,at91sam9260-usart";
 906                                 reg = <0xf8024000 0x4000>;
 907                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 908                                 pinctrl-names = "default";
 909                                 pinctrl-0 = <&pinctrl_usart2>;
 910                                 clocks = <&usart2_clk>;
 911                                 clock-names = "usart";
 912                                 status = "disabled";
 913                         };
 914
 915                         usart3: serial@f8028000 {
 916                                 compatible = "atmel,at91sam9260-usart";
 917                                 reg = <0xf8028000 0x4000>;
 918                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 919                                 pinctrl-names = "default";
 920                                 pinctrl-0 = <&pinctrl_usart3>;
 921                                 clocks = <&usart3_clk>;
 922                                 clock-names = "usart";
 923                                 status = "disabled";
 924                         };
 925
 926                         i2c0: i2c@f8010000 {
 927                                 compatible = "atmel,at91sam9x5-i2c";
 928                                 reg = <0xf8010000 0x100>;
 929                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 930                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
 931                                        <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
 932                                 dma-names = "tx", "rx";
 933                                 #address-cells = <1>;
 934                                 #size-cells = <0>;
 935                                 pinctrl-names = "default";
 936                                 pinctrl-0 = <&pinctrl_i2c0>;
 937                                 clocks = <&twi0_clk>;
 938                                 status = "disabled";
 939                         };
 940
 941                         i2c1: i2c@f8014000 {
 942                                 compatible = "atmel,at91sam9x5-i2c";
 943                                 reg = <0xf8014000 0x100>;
 944                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 945                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
 946                                        <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
 947                                 dma-names = "tx", "rx";
 948                                 #address-cells = <1>;
 949                                 #size-cells = <0>;
 950                                 pinctrl-names = "default";
 951                                 pinctrl-0 = <&pinctrl_i2c1>;
 952                                 clocks = <&twi1_clk>;
 953                                 status = "disabled";
 954                         };
 955
 956                         spi0: spi@f0000000 {
 957                                 #address-cells = <1>;
 958                                 #size-cells = <0>;
 959                                 compatible = "atmel,at91rm9200-spi";
 960                                 reg = <0xf0000000 0x100>;
 961                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 962                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
 963                                        <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
 964                                 dma-names = "tx", "rx";
 965                                 pinctrl-names = "default";
 966                                 pinctrl-0 = <&pinctrl_spi0>;
 967                                 clocks = <&spi0_clk>;
 968                                 clock-names = "spi_clk";
 969                                 status = "disabled";
 970                         };
 971
 972                         spi1: spi@f0004000 {
 973                                 #address-cells = <1>;
 974                                 #size-cells = <0>;
 975                                 compatible = "atmel,at91rm9200-spi";
 976                                 reg = <0xf0004000 0x100>;
 977                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 978                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
 979                                        <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
 980                                 dma-names = "tx", "rx";
 981                                 pinctrl-names = "default";
 982                                 pinctrl-0 = <&pinctrl_spi1>;
 983                                 clocks = <&spi1_clk>;
 984                                 clock-names = "spi_clk";
 985                                 status = "disabled";
 986                         };
 987
 988                         watchdog@fffffe40 {
 989                                 compatible = "atmel,at91sam9260-wdt";
 990                                 reg = <0xfffffe40 0x10>;
 991                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 992                                 clocks = <&clk32k>;
 993                                 atmel,watchdog-type = "hardware";
 994                                 atmel,reset-type = "all";
 995                                 atmel,dbg-halt;
 996                                 status = "disabled";
 997                         };
 998
 999                         rtc@fffffeb0 {
1000                                 compatible = "atmel,at91rm9200-rtc";
1001                                 reg = <0xfffffeb0 0x40>;
1002                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1003                                 clocks = <&clk32k>;
1004                                 status = "disabled";
1005                         };
1006
1007                         pwm0: pwm@f8034000 {
1008                                 compatible = "atmel,at91sam9rl-pwm";
1009                                 reg = <0xf8034000 0x300>;
1010                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1011                                 #pwm-cells = <3>;
1012                                 clocks = <&pwm_clk>;
1013                                 status = "disabled";
1014                         };
1015
1016                         usb1: gadget@f803c000 {
1017                                 compatible = "atmel,at91sam9260-udc";
1018                                 reg = <0xf803c000 0x4000>;
1019                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
1020                                 clocks = <&udphs_clk>, <&udpck>;
1021                                 clock-names = "pclk", "hclk";
1022                                 status = "disabled";
1023                         };
1024                 };
1025
1026                 usb0: ohci@500000 {
1027                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1028                         reg = <0x00500000 0x00100000>;
1029                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1030                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1031                         clock-names = "ohci_clk", "hclk", "uhpck";
1032                         status = "disabled";
1033                 };
1034
1035                 ebi: ebi@10000000 {
1036                         compatible = "atmel,at91sam9x5-ebi";
1037                         #address-cells = <2>;
1038                         #size-cells = <1>;
1039                         atmel,smc = <&smc>;
1040                         atmel,matrix = <&matrix>;
1041                         reg = <0x10000000 0x60000000>;
1042                         ranges = <0x0 0x0 0x10000000 0x10000000
1043                                   0x1 0x0 0x20000000 0x10000000
1044                                   0x2 0x0 0x30000000 0x10000000
1045                                   0x3 0x0 0x40000000 0x10000000
1046                                   0x4 0x0 0x50000000 0x10000000
1047                                   0x5 0x0 0x60000000 0x10000000>;
1048                         clocks = <&mck>;
1049                         status = "disabled";
1050
1051                         nand_controller: nand-controller {
1052                                 compatible = "atmel,at91sam9g45-nand-controller";
1053                                 ecc-engine = <&pmecc>;
1054                                 #address-cells = <2>;
1055                                 #size-cells = <1>;
1056                                 ranges;
1057                                 status = "disabled";
1058                         };
1059                 };
1060         };
1061
1062         i2c-gpio-0 {
1063                 compatible = "i2c-gpio";
1064                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1065                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1066                         >;
1067                 i2c-gpio,sda-open-drain;
1068                 i2c-gpio,scl-open-drain;
1069                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1070                 #address-cells = <1>;
1071                 #size-cells = <0>;
1072                 status = "disabled";
1073         };
1074 };