arch/arm/boot/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 #include "skeleton.dtsi"
  11 #include <dt-bindings/dma/at91.h>
  12 #include <dt-bindings/pinctrl/at91.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/clock/at91.h>
  16
  17 / {
  18         model = "Atmel AT91SAM9N12 SoC";
  19         compatible = "atmel,at91sam9n12";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 tcb0 = &tcb0;
  33                 tcb1 = &tcb1;
  34                 i2c0 = &i2c0;
  35                 i2c1 = &i2c1;
  36                 ssc0 = &ssc0;
  37                 pwm0 = &pwm0;
  38         };
  39         cpus {
  40                 #address-cells = <0>;
  41                 #size-cells = <0>;
  42
  43                 cpu {
  44                         compatible = "arm,arm926ej-s";
  45                         device_type = "cpu";
  46                 };
  47         };
  48
  49         memory {
  50                 reg = <0x20000000 0x10000000>;
  51         };
  52
  53         clocks {
  54                 slow_xtal: slow_xtal {
  55                         compatible = "fixed-clock";
  56                         #clock-cells = <0>;
  57                         clock-frequency = <0>;
  58                 };
  59
  60                 main_xtal: main_xtal {
  61                         compatible = "fixed-clock";
  62                         #clock-cells = <0>;
  63                         clock-frequency = <0>;
  64                 };
  65         };
  66
  67         sram: sram@300000 {
  68                 compatible = "mmio-sram";
  69                 reg = <0x00300000 0x8000>;
  70         };
  71
  72         ahb {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 ranges;
  77
  78                 apb {
  79                         compatible = "simple-bus";
  80                         #address-cells = <1>;
  81                         #size-cells = <1>;
  82                         ranges;
  83
  84                         aic: interrupt-controller@fffff000 {
  85                                 #interrupt-cells = <3>;
  86                                 compatible = "atmel,at91rm9200-aic";
  87                                 interrupt-controller;
  88                                 reg = <0xfffff000 0x200>;
  89                                 atmel,external-irqs = <31>;
  90                         };
  91
  92                         matrix: matrix@ffffde00 {
  93                                 compatible = "atmel,at91sam9n12-matrix", "syscon";
  94                                 reg = <0xffffde00 0x100>;
  95                         };
  96
  97                         pmecc: ecc-engine@ffffe000 {
  98                                 compatible = "atmel,at91sam9g45-pmecc";
  99                                 reg = <0xffffe000 0x600>,
 100                                       <0xffffe600 0x200>;
 101                         };
 102
 103                         ramc0: ramc@ffffe800 {
 104                                 compatible = "atmel,at91sam9g45-ddramc";
 105                                 reg = <0xffffe800 0x200>;
 106                                 clocks = <&ddrck>;
 107                                 clock-names = "ddrck";
 108                         };
 109
 110                         smc: smc@ffffea00 {
 111                                 compatible = "atmel,at91sam9260-smc", "syscon";
 112                                 reg = <0xffffea00 0x200>;
 113                         };
 114
 115                         pmc: pmc@fffffc00 {
 116                                 compatible = "atmel,at91sam9n12-pmc", "syscon";
 117                                 reg = <0xfffffc00 0x200>;
 118                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 119                                 interrupt-controller;
 120                                 #address-cells = <1>;
 121                                 #size-cells = <0>;
 122                                 #interrupt-cells = <1>;
 123
 124                                 main_rc_osc: main_rc_osc {
 125                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 126                                         #clock-cells = <0>;
 127                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 128                                         clock-frequency = <12000000>;
 129                                         clock-accuracy = <50000000>;
 130                                 };
 131
 132                                 main_osc: main_osc {
 133                                         compatible = "atmel,at91rm9200-clk-main-osc";
 134                                         #clock-cells = <0>;
 135                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 136                                         clocks = <&main_xtal>;
 137                                 };
 138
 139                                 main: mainck {
 140                                         compatible = "atmel,at91sam9x5-clk-main";
 141                                         #clock-cells = <0>;
 142                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 143                                         clocks = <&main_rc_osc>, <&main_osc>;
 144                                 };
 145
 146                                 plla: pllack {
 147                                         compatible = "atmel,at91rm9200-clk-pll";
 148                                         #clock-cells = <0>;
 149                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 150                                         clocks = <&main>;
 151                                         reg = <0>;
 152                                         atmel,clk-input-range = <2000000 32000000>;
 153                                         #atmel,pll-clk-output-range-cells = <4>;
 154                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
 155                                                                       <695000000 750000000 1 0>,
 156                                                                       <645000000 700000000 2 0>,
 157                                                                       <595000000 650000000 3 0>,
 158                                                                       <545000000 600000000 0 1>,
 159                                                                       <495000000 555000000 1 1>,
 160                                                                       <445000000 500000000 2 1>,
 161                                                                       <400000000 450000000 3 1>;
 162                                 };
 163
 164                                 plladiv: plladivck {
 165                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 166                                         #clock-cells = <0>;
 167                                         clocks = <&plla>;
 168                                 };
 169
 170                                 pllb: pllbck {
 171                                         compatible = "atmel,at91rm9200-clk-pll";
 172                                         #clock-cells = <0>;
 173                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 174                                         clocks = <&main>;
 175                                         reg = <1>;
 176                                         atmel,clk-input-range = <2000000 32000000>;
 177                                         #atmel,pll-clk-output-range-cells = <3>;
 178                                         atmel,pll-clk-output-ranges = <30000000 100000000 0>;
 179                                 };
 180
 181                                 mck: masterck {
 182                                         compatible = "atmel,at91sam9x5-clk-master";
 183                                         #clock-cells = <0>;
 184                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 185                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
 186                                         atmel,clk-output-range = <0 133333333>;
 187                                         atmel,clk-divisors = <1 2 4 3>;
 188                                         atmel,master-clk-have-div3-pres;
 189                                 };
 190
 191                                 usb: usbck {
 192                                         compatible = "atmel,at91sam9n12-clk-usb";
 193                                         #clock-cells = <0>;
 194                                         clocks = <&pllb>;
 195                                 };
 196
 197                                 prog: progck {
 198                                         compatible = "atmel,at91sam9x5-clk-programmable";
 199                                         #address-cells = <1>;
 200                                         #size-cells = <0>;
 201                                         interrupt-parent = <&pmc>;
 202                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
 203
 204                                         prog0: prog0 {
 205                                                 #clock-cells = <0>;
 206                                                 reg = <0>;
 207                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 208                                         };
 209
 210                                         prog1: prog1 {
 211                                                 #clock-cells = <0>;
 212                                                 reg = <1>;
 213                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 214                                         };
 215                                 };
 216
 217                                 systemck {
 218                                         compatible = "atmel,at91rm9200-clk-system";
 219                                         #address-cells = <1>;
 220                                         #size-cells = <0>;
 221
 222                                         ddrck: ddrck {
 223                                                 #clock-cells = <0>;
 224                                                 reg = <2>;
 225                                                 clocks = <&mck>;
 226                                         };
 227
 228                                         lcdck: lcdck {
 229                                                 #clock-cells = <0>;
 230                                                 reg = <3>;
 231                                                 clocks = <&mck>;
 232                                         };
 233
 234                                         uhpck: uhpck {
 235                                                 #clock-cells = <0>;
 236                                                 reg = <6>;
 237                                                 clocks = <&usb>;
 238                                         };
 239
 240                                         udpck: udpck {
 241                                                 #clock-cells = <0>;
 242                                                 reg = <7>;
 243                                                 clocks = <&usb>;
 244                                         };
 245
 246                                         pck0: pck0 {
 247                                                 #clock-cells = <0>;
 248                                                 reg = <8>;
 249                                                 clocks = <&prog0>;
 250                                         };
 251
 252                                         pck1: pck1 {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <9>;
 255                                                 clocks = <&prog1>;
 256                                         };
 257                                 };
 258
 259                                 periphck {
 260                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 261                                         #address-cells = <1>;
 262                                         #size-cells = <0>;
 263                                         clocks = <&mck>;
 264
 265                                         pioAB_clk: pioAB_clk {
 266                                                 #clock-cells = <0>;
 267                                                 reg = <2>;
 268                                         };
 269
 270                                         pioCD_clk: pioCD_clk {
 271                                                 #clock-cells = <0>;
 272                                                 reg = <3>;
 273                                         };
 274
 275                                         fuse_clk: fuse_clk {
 276                                                 #clock-cells = <0>;
 277                                                 reg = <4>;
 278                                         };
 279
 280                                         usart0_clk: usart0_clk {
 281                                                 #clock-cells = <0>;
 282                                                 reg = <5>;
 283                                         };
 284
 285                                         usart1_clk: usart1_clk {
 286                                                 #clock-cells = <0>;
 287                                                 reg = <6>;
 288                                         };
 289
 290                                         usart2_clk: usart2_clk {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <7>;
 293                                         };
 294
 295                                         usart3_clk: usart3_clk {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <8>;
 298                                         };
 299
 300                                         twi0_clk: twi0_clk {
 301                                                 reg = <9>;
 302                                                 #clock-cells = <0>;
 303                                         };
 304
 305                                         twi1_clk: twi1_clk {
 306                                                 #clock-cells = <0>;
 307                                                 reg = <10>;
 308                                         };
 309
 310                                         mci0_clk: mci0_clk {
 311                                                 #clock-cells = <0>;
 312                                                 reg = <12>;
 313                                         };
 314
 315                                         spi0_clk: spi0_clk {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <13>;
 318                                         };
 319
 320                                         spi1_clk: spi1_clk {
 321                                                 #clock-cells = <0>;
 322                                                 reg = <14>;
 323                                         };
 324
 325                                         uart0_clk: uart0_clk {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <15>;
 328                                         };
 329
 330                                         uart1_clk: uart1_clk {
 331                                                 #clock-cells = <0>;
 332                                                 reg = <16>;
 333                                         };
 334
 335                                         tcb_clk: tcb_clk {
 336                                                 #clock-cells = <0>;
 337                                                 reg = <17>;
 338                                         };
 339
 340                                         pwm_clk: pwm_clk {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <18>;
 343                                         };
 344
 345                                         adc_clk: adc_clk {
 346                                                 #clock-cells = <0>;
 347                                                 reg = <19>;
 348                                         };
 349
 350                                         dma0_clk: dma0_clk {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <20>;
 353                                         };
 354
 355                                         uhphs_clk: uhphs_clk {
 356                                                 #clock-cells = <0>;
 357                                                 reg = <22>;
 358                                         };
 359
 360                                         udphs_clk: udphs_clk {
 361                                                 #clock-cells = <0>;
 362                                                 reg = <23>;
 363                                         };
 364
 365                                         lcdc_clk: lcdc_clk {
 366                                                 #clock-cells = <0>;
 367                                                 reg = <25>;
 368                                         };
 369
 370                                         sha_clk: sha_clk {
 371                                                 #clock-cells = <0>;
 372                                                 reg = <27>;
 373                                         };
 374
 375                                         ssc0_clk: ssc0_clk {
 376                                                 #clock-cells = <0>;
 377                                                 reg = <28>;
 378                                         };
 379
 380                                         aes_clk: aes_clk {
 381                                                 #clock-cells = <0>;
 382                                                 reg = <29>;
 383                                         };
 384
 385                                         trng_clk: trng_clk {
 386                                                 #clock-cells = <0>;
 387                                                 reg = <30>;
 388                                         };
 389                                 };
 390                         };
 391
 392                         rstc@fffffe00 {
 393                                 compatible = "atmel,at91sam9g45-rstc";
 394                                 reg = <0xfffffe00 0x10>;
 395                                 clocks = <&clk32k>;
 396                         };
 397
 398                         pit: timer@fffffe30 {
 399                                 compatible = "atmel,at91sam9260-pit";
 400                                 reg = <0xfffffe30 0xf>;
 401                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 402                                 clocks = <&mck>;
 403                         };
 404
 405                         shdwc@fffffe10 {
 406                                 compatible = "atmel,at91sam9x5-shdwc";
 407                                 reg = <0xfffffe10 0x10>;
 408                                 clocks = <&clk32k>;
 409                         };
 410
 411                         sckc@fffffe50 {
 412                                 compatible = "atmel,at91sam9x5-sckc";
 413                                 reg = <0xfffffe50 0x4>;
 414
 415                                 slow_osc: slow_osc {
 416                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 417                                         #clock-cells = <0>;
 418                                         clocks = <&slow_xtal>;
 419                                 };
 420
 421                                 slow_rc_osc: slow_rc_osc {
 422                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 423                                         #clock-cells = <0>;
 424                                         clock-frequency = <32768>;
 425                                         clock-accuracy = <50000000>;
 426                                 };
 427
 428                                 clk32k: slck {
 429                                         compatible = "atmel,at91sam9x5-clk-slow";
 430                                         #clock-cells = <0>;
 431                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 432                                 };
 433                         };
 434
 435                         mmc0: mmc@f0008000 {
 436                                 compatible = "atmel,hsmci";
 437                                 reg = <0xf0008000 0x600>;
 438                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 439                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
 440                                 dma-names = "rxtx";
 441                                 clocks = <&mci0_clk>;
 442                                 clock-names = "mci_clk";
 443                                 #address-cells = <1>;
 444                                 #size-cells = <0>;
 445                                 status = "disabled";
 446                         };
 447
 448                         tcb0: timer@f8008000 {
 449                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 450                                 #address-cells = <1>;
 451                                 #size-cells = <0>;
 452                                 reg = <0xf8008000 0x100>;
 453                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 454                                 clocks = <&tcb_clk>, <&clk32k>;
 455                                 clock-names = "t0_clk", "slow_clk";
 456                         };
 457
 458                         tcb1: timer@f800c000 {
 459                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 460                                 #address-cells = <1>;
 461                                 #size-cells = <0>;
 462                                 reg = <0xf800c000 0x100>;
 463                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 464                                 clocks = <&tcb_clk>, <&clk32k>;
 465                                 clock-names = "t0_clk", "slow_clk";
 466                         };
 467
 468                         hlcdc: hlcdc@f8038000 {
 469                                 compatible = "atmel,at91sam9n12-hlcdc";
 470                                 reg = <0xf8038000 0x2000>;
 471                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
 472                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 473                                 clock-names = "periph_clk", "sys_clk", "slow_clk";
 474                                 status = "disabled";
 475
 476                                 hlcdc-display-controller {
 477                                         compatible = "atmel,hlcdc-display-controller";
 478                                         #address-cells = <1>;
 479                                         #size-cells = <0>;
 480
 481                                         port@0 {
 482                                                 #address-cells = <1>;
 483                                                 #size-cells = <0>;
 484                                                 reg = <0>;
 485                                         };
 486                                 };
 487
 488                                 hlcdc_pwm: hlcdc-pwm {
 489                                         compatible = "atmel,hlcdc-pwm";
 490                                         pinctrl-names = "default";
 491                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 492                                         #pwm-cells = <3>;
 493                                 };
 494                         };
 495
 496                         dma: dma-controller@ffffec00 {
 497                                 compatible = "atmel,at91sam9g45-dma";
 498                                 reg = <0xffffec00 0x200>;
 499                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 500                                 #dma-cells = <2>;
 501                                 clocks = <&dma0_clk>;
 502                                 clock-names = "dma_clk";
 503                         };
 504
 505                         pinctrl@fffff400 {
 506                                 #address-cells = <1>;
 507                                 #size-cells = <1>;
 508                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 509                                 ranges = <0xfffff400 0xfffff400 0x800>;
 510
 511                                 atmel,mux-mask = <
 512                                       /*    A         B          C     */
 513                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 514                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 515                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 516                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 517                                       >;
 518
 519                                 /* shared pinctrl settings */
 520                                 dbgu {
 521                                         pinctrl_dbgu: dbgu-0 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 524                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 525                                         };
 526                                 };
 527
 528                                 lcd {
 529                                         pinctrl_lcd_base: lcd-base-0 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
 532                                                          AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
 533                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDISP */
 534                                                          AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
 535                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
 536                                         };
 537
 538                                         pinctrl_lcd_pwm: lcd-pwm-0 {
 539                                                 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
 540                                         };
 541
 542                                         pinctrl_lcd_rgb888: lcd-rgb-3 {
 543                                                 atmel,pins =
 544                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
 545                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
 546                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
 547                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
 548                                                          AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
 549                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
 550                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
 551                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
 552                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
 553                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
 554                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
 555                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
 556                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
 557                                                          AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
 558                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
 559                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
 560                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
 561                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
 562                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
 563                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
 564                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
 565                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
 566                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
 567                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
 568                                         };
 569                                 };
 570
 571                                 usart0 {
 572                                         pinctrl_usart0: usart0-0 {
 573                                                 atmel,pins =
 574                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 575                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA0 periph A */
 576                                         };
 577
 578                                         pinctrl_usart0_rts: usart0_rts-0 {
 579                                                 atmel,pins =
 580                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 581                                         };
 582
 583                                         pinctrl_usart0_cts: usart0_cts-0 {
 584                                                 atmel,pins =
 585                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 586                                         };
 587                                 };
 588
 589                                 usart1 {
 590                                         pinctrl_usart1: usart1-0 {
 591                                                 atmel,pins =
 592                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 593                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 594                                         };
 595                                 };
 596
 597                                 usart2 {
 598                                         pinctrl_usart2: usart2-0 {
 599                                                 atmel,pins =
 600                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 601                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA7 periph A */
 602                                         };
 603
 604                                         pinctrl_usart2_rts: usart2_rts-0 {
 605                                                 atmel,pins =
 606                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 607                                         };
 608
 609                                         pinctrl_usart2_cts: usart2_cts-0 {
 610                                                 atmel,pins =
 611                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 612                                         };
 613                                 };
 614
 615                                 usart3 {
 616                                         pinctrl_usart3: usart3-0 {
 617                                                 atmel,pins =
 618                                                         <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PC23 periph B with pullup */
 619                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
 620                                         };
 621
 622                                         pinctrl_usart3_rts: usart3_rts-0 {
 623                                                 atmel,pins =
 624                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
 625                                         };
 626
 627                                         pinctrl_usart3_cts: usart3_cts-0 {
 628                                                 atmel,pins =
 629                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
 630                                         };
 631                                 };
 632
 633                                 uart0 {
 634                                         pinctrl_uart0: uart0-0 {
 635                                                 atmel,pins =
 636                                                         <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
 637                                                          AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC8 periph C */
 638                                         };
 639                                 };
 640
 641                                 uart1 {
 642                                         pinctrl_uart1: uart1-0 {
 643                                                 atmel,pins =
 644                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
 645                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
 646                                         };
 647                                 };
 648
 649                                 nand {
 650                                         pinctrl_nand_rb: nand-rb-0 {
 651                                                 atmel,pins =
 652                                                         <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 653                                         };
 654
 655                                         pinctrl_nand_cs: nand-cs-0 {
 656                                                 atmel,pins =
 657                                                          <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 658                                         };
 659                                 };
 660
 661                                 mmc0 {
 662                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 663                                                 atmel,pins =
 664                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 665                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 666                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 667                                         };
 668
 669                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 670                                                 atmel,pins =
 671                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 672                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 673                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 674                                         };
 675
 676                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 677                                                 atmel,pins =
 678                                                         <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 679                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 680                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA13 periph B with pullup */
 681                                                          AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA14 periph B with pullup */
 682                                         };
 683                                 };
 684
 685                                 ssc0 {
 686                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 687                                                 atmel,pins =
 688                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 689                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 690                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 691                                         };
 692
 693                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 694                                                 atmel,pins =
 695                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 696                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 697                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 698                                         };
 699                                 };
 700
 701                                 spi0 {
 702                                         pinctrl_spi0: spi0-0 {
 703                                                 atmel,pins =
 704                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 705                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 706                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 707                                         };
 708                                 };
 709
 710                                 spi1 {
 711                                         pinctrl_spi1: spi1-0 {
 712                                                 atmel,pins =
 713                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 714                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 715                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 716                                         };
 717                                 };
 718
 719                                 i2c0 {
 720                                         pinctrl_i2c0: i2c0-0 {
 721                                                 atmel,pins =
 722                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
 723                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 724                                         };
 725                                 };
 726
 727                                 i2c1 {
 728                                         pinctrl_i2c1: i2c1-0 {
 729                                                 atmel,pins =
 730                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
 731                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 732                                         };
 733                                 };
 734
 735                                 tcb0 {
 736                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 737                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 738                                         };
 739
 740                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 741                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 742                                         };
 743
 744                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 745                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 746                                         };
 747
 748                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 749                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 750                                         };
 751
 752                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 753                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 754                                         };
 755
 756                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 757                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 758                                         };
 759
 760                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 761                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 762                                         };
 763
 764                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 765                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 766                                         };
 767
 768                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 769                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 770                                         };
 771                                 };
 772
 773                                 tcb1 {
 774                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 775                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 776                                         };
 777
 778                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 779                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 780                                         };
 781
 782                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 783                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 784                                         };
 785
 786                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 787                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 788                                         };
 789
 790                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 791                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 792                                         };
 793
 794                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 795                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 796                                         };
 797
 798                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 799                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 800                                         };
 801
 802                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 803                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 804                                         };
 805
 806                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 807                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 808                                         };
 809                                 };
 810
 811                                 pioA: gpio@fffff400 {
 812                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 813                                         reg = <0xfffff400 0x200>;
 814                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 815                                         #gpio-cells = <2>;
 816                                         gpio-controller;
 817                                         interrupt-controller;
 818                                         #interrupt-cells = <2>;
 819                                         clocks = <&pioAB_clk>;
 820                                 };
 821
 822                                 pioB: gpio@fffff600 {
 823                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 824                                         reg = <0xfffff600 0x200>;
 825                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 826                                         #gpio-cells = <2>;
 827                                         gpio-controller;
 828                                         interrupt-controller;
 829                                         #interrupt-cells = <2>;
 830                                         clocks = <&pioAB_clk>;
 831                                 };
 832
 833                                 pioC: gpio@fffff800 {
 834                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 835                                         reg = <0xfffff800 0x200>;
 836                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 837                                         #gpio-cells = <2>;
 838                                         gpio-controller;
 839                                         interrupt-controller;
 840                                         #interrupt-cells = <2>;
 841                                         clocks = <&pioCD_clk>;
 842                                 };
 843
 844                                 pioD: gpio@fffffa00 {
 845                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 846                                         reg = <0xfffffa00 0x200>;
 847                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 848                                         #gpio-cells = <2>;
 849                                         gpio-controller;
 850                                         interrupt-controller;
 851                                         #interrupt-cells = <2>;
 852                                         clocks = <&pioCD_clk>;
 853                                 };
 854                         };
 855
 856                         dbgu: serial@fffff200 {
 857                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 858                                 reg = <0xfffff200 0x200>;
 859                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 860                                 pinctrl-names = "default";
 861                                 pinctrl-0 = <&pinctrl_dbgu>;
 862                                 clocks = <&mck>;
 863                                 clock-names = "usart";
 864                                 status = "disabled";
 865                         };
 866
 867                         ssc0: ssc@f0010000 {
 868                                 compatible = "atmel,at91sam9g45-ssc";
 869                                 reg = <0xf0010000 0x4000>;
 870                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 871                                 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
 872                                        <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
 873                                 dma-names = "tx", "rx";
 874                                 pinctrl-names = "default";
 875                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 876                                 clocks = <&ssc0_clk>;
 877                                 clock-names = "pclk";
 878                                 status = "disabled";
 879                         };
 880
 881                         usart0: serial@f801c000 {
 882                                 compatible = "atmel,at91sam9260-usart";
 883                                 reg = <0xf801c000 0x4000>;
 884                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 885                                 pinctrl-names = "default";
 886                                 pinctrl-0 = <&pinctrl_usart0>;
 887                                 clocks = <&usart0_clk>;
 888                                 clock-names = "usart";
 889                                 status = "disabled";
 890                         };
 891
 892                         usart1: serial@f8020000 {
 893                                 compatible = "atmel,at91sam9260-usart";
 894                                 reg = <0xf8020000 0x4000>;
 895                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 896                                 pinctrl-names = "default";
 897                                 pinctrl-0 = <&pinctrl_usart1>;
 898                                 clocks = <&usart1_clk>;
 899                                 clock-names = "usart";
 900                                 status = "disabled";
 901                         };
 902
 903                         usart2: serial@f8024000 {
 904                                 compatible = "atmel,at91sam9260-usart";
 905                                 reg = <0xf8024000 0x4000>;
 906                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 907                                 pinctrl-names = "default";
 908                                 pinctrl-0 = <&pinctrl_usart2>;
 909                                 clocks = <&usart2_clk>;
 910                                 clock-names = "usart";
 911                                 status = "disabled";
 912                         };
 913
 914                         usart3: serial@f8028000 {
 915                                 compatible = "atmel,at91sam9260-usart";
 916                                 reg = <0xf8028000 0x4000>;
 917                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 918                                 pinctrl-names = "default";
 919                                 pinctrl-0 = <&pinctrl_usart3>;
 920                                 clocks = <&usart3_clk>;
 921                                 clock-names = "usart";
 922                                 status = "disabled";
 923                         };
 924
 925                         i2c0: i2c@f8010000 {
 926                                 compatible = "atmel,at91sam9x5-i2c";
 927                                 reg = <0xf8010000 0x100>;
 928                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 929                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
 930                                        <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
 931                                 dma-names = "tx", "rx";
 932                                 #address-cells = <1>;
 933                                 #size-cells = <0>;
 934                                 pinctrl-names = "default";
 935                                 pinctrl-0 = <&pinctrl_i2c0>;
 936                                 clocks = <&twi0_clk>;
 937                                 status = "disabled";
 938                         };
 939
 940                         i2c1: i2c@f8014000 {
 941                                 compatible = "atmel,at91sam9x5-i2c";
 942                                 reg = <0xf8014000 0x100>;
 943                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 944                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
 945                                        <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
 946                                 dma-names = "tx", "rx";
 947                                 #address-cells = <1>;
 948                                 #size-cells = <0>;
 949                                 pinctrl-names = "default";
 950                                 pinctrl-0 = <&pinctrl_i2c1>;
 951                                 clocks = <&twi1_clk>;
 952                                 status = "disabled";
 953                         };
 954
 955                         spi0: spi@f0000000 {
 956                                 #address-cells = <1>;
 957                                 #size-cells = <0>;
 958                                 compatible = "atmel,at91rm9200-spi";
 959                                 reg = <0xf0000000 0x100>;
 960                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 961                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
 962                                        <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
 963                                 dma-names = "tx", "rx";
 964                                 pinctrl-names = "default";
 965                                 pinctrl-0 = <&pinctrl_spi0>;
 966                                 clocks = <&spi0_clk>;
 967                                 clock-names = "spi_clk";
 968                                 status = "disabled";
 969                         };
 970
 971                         spi1: spi@f0004000 {
 972                                 #address-cells = <1>;
 973                                 #size-cells = <0>;
 974                                 compatible = "atmel,at91rm9200-spi";
 975                                 reg = <0xf0004000 0x100>;
 976                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 977                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
 978                                        <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
 979                                 dma-names = "tx", "rx";
 980                                 pinctrl-names = "default";
 981                                 pinctrl-0 = <&pinctrl_spi1>;
 982                                 clocks = <&spi1_clk>;
 983                                 clock-names = "spi_clk";
 984                                 status = "disabled";
 985                         };
 986
 987                         watchdog@fffffe40 {
 988                                 compatible = "atmel,at91sam9260-wdt";
 989                                 reg = <0xfffffe40 0x10>;
 990                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 991                                 clocks = <&clk32k>;
 992                                 atmel,watchdog-type = "hardware";
 993                                 atmel,reset-type = "all";
 994                                 atmel,dbg-halt;
 995                                 status = "disabled";
 996                         };
 997
 998                         rtc@fffffeb0 {
 999                                 compatible = "atmel,at91rm9200-rtc";
1000                                 reg = <0xfffffeb0 0x40>;
1001                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1002                                 clocks = <&clk32k>;
1003                                 status = "disabled";
1004                         };
1005
1006                         pwm0: pwm@f8034000 {
1007                                 compatible = "atmel,at91sam9rl-pwm";
1008                                 reg = <0xf8034000 0x300>;
1009                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1010                                 #pwm-cells = <3>;
1011                                 clocks = <&pwm_clk>;
1012                                 status = "disabled";
1013                         };
1014
1015                         usb1: gadget@f803c000 {
1016                                 compatible = "atmel,at91sam9260-udc";
1017                                 reg = <0xf803c000 0x4000>;
1018                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
1019                                 clocks = <&udphs_clk>, <&udpck>;
1020                                 clock-names = "pclk", "hclk";
1021                                 status = "disabled";
1022                         };
1023                 };
1024
1025                 usb0: ohci@500000 {
1026                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1027                         reg = <0x00500000 0x00100000>;
1028                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1029                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1030                         clock-names = "ohci_clk", "hclk", "uhpck";
1031                         status = "disabled";
1032                 };
1033
1034                 ebi: ebi@10000000 {
1035                         compatible = "atmel,at91sam9x5-ebi";
1036                         #address-cells = <2>;
1037                         #size-cells = <1>;
1038                         atmel,smc = <&smc>;
1039                         atmel,matrix = <&matrix>;
1040                         reg = <0x10000000 0x60000000>;
1041                         ranges = <0x0 0x0 0x10000000 0x10000000
1042                                   0x1 0x0 0x20000000 0x10000000
1043                                   0x2 0x0 0x30000000 0x10000000
1044                                   0x3 0x0 0x40000000 0x10000000
1045                                   0x4 0x0 0x50000000 0x10000000
1046                                   0x5 0x0 0x60000000 0x10000000>;
1047                         clocks = <&mck>;
1048                         status = "disabled";
1049
1050                         nand_controller: nand-controller {
1051                                 compatible = "atmel,at91sam9g45-nand-controller";
1052                                 ecc-engine = <&pmecc>;
1053                                 #address-cells = <2>;
1054                                 #size-cells = <1>;
1055                                 ranges;
1056                                 status = "disabled";
1057                         };
1058                 };
1059         };
1060
1061         i2c-gpio-0 {
1062                 compatible = "i2c-gpio";
1063                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1064                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1065                         >;
1066                 i2c-gpio,sda-open-drain;
1067                 i2c-gpio,scl-open-drain;
1068                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1069                 #address-cells = <1>;
1070                 #size-cells = <0>;
1071                 status = "disabled";
1072         };
1073 };