2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
21 model = "Atmel AT91SAM9G45 family SoC";
22 compatible = "atmel,at91sam9g45";
23 interrupt-parent = <&aic>;
49 compatible = "arm,arm926ej-s";
55 device_type = "memory";
56 reg = <0x70000000 0x10000000>;
60 slow_xtal: slow_xtal {
61 compatible = "fixed-clock";
63 clock-frequency = <0>;
66 main_xtal: main_xtal {
67 compatible = "fixed-clock";
69 clock-frequency = <0>;
72 adc_op_clk: adc_op_clk{
73 compatible = "fixed-clock";
75 clock-frequency = <300000>;
80 compatible = "mmio-sram";
81 reg = <0x00300000 0x10000>;
85 compatible = "simple-bus";
91 compatible = "simple-bus";
96 aic: interrupt-controller@fffff000 {
97 #interrupt-cells = <3>;
98 compatible = "atmel,at91rm9200-aic";
100 reg = <0xfffff000 0x200>;
101 atmel,external-irqs = <31>;
104 ramc0: ramc@ffffe400 {
105 compatible = "atmel,at91sam9g45-ddramc";
106 reg = <0xffffe400 0x200>;
108 clock-names = "ddrck";
111 ramc1: ramc@ffffe600 {
112 compatible = "atmel,at91sam9g45-ddramc";
113 reg = <0xffffe600 0x200>;
115 clock-names = "ddrck";
119 compatible = "atmel,at91sam9260-smc", "syscon";
120 reg = <0xffffe800 0x200>;
123 matrix: matrix@ffffea00 {
124 compatible = "atmel,at91sam9g45-matrix", "syscon";
125 reg = <0xffffea00 0x200>;
129 compatible = "atmel,at91sam9g45-pmc", "syscon";
130 reg = <0xfffffc00 0x100>;
131 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
132 interrupt-controller;
133 #address-cells = <1>;
135 #interrupt-cells = <1>;
138 compatible = "atmel,at91rm9200-clk-main-osc";
140 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
141 clocks = <&main_xtal>;
145 compatible = "atmel,at91rm9200-clk-main";
147 clocks = <&main_osc>;
151 compatible = "atmel,at91rm9200-clk-pll";
153 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
156 atmel,clk-input-range = <2000000 32000000>;
157 #atmel,pll-clk-output-range-cells = <4>;
158 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
159 695000000 750000000 1 0
160 645000000 700000000 2 0
161 595000000 650000000 3 0
162 545000000 600000000 0 1
163 495000000 555000000 1 1
164 445000000 500000000 2 1
165 400000000 450000000 3 1>;
169 compatible = "atmel,at91sam9x5-clk-plldiv";
175 compatible = "atmel,at91sam9x5-clk-utmi";
177 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
182 compatible = "atmel,at91rm9200-clk-master";
184 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
185 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
186 atmel,clk-output-range = <0 133333333>;
187 atmel,clk-divisors = <1 2 4 3>;
191 compatible = "atmel,at91sam9x5-clk-usb";
193 clocks = <&plladiv>, <&utmi>;
197 compatible = "atmel,at91sam9g45-clk-programmable";
198 #address-cells = <1>;
200 interrupt-parent = <&pmc>;
201 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
206 interrupts = <AT91_PMC_PCKRDY(0)>;
212 interrupts = <AT91_PMC_PCKRDY(1)>;
217 compatible = "atmel,at91rm9200-clk-system";
218 #address-cells = <1>;
247 compatible = "atmel,at91rm9200-clk-peripheral";
248 #address-cells = <1>;
267 pioDE_clk: pioDE_clk {
277 usart0_clk: usart0_clk {
282 usart1_clk: usart1_clk {
287 usart2_clk: usart2_clk {
292 usart3_clk: usart3_clk {
352 uhphs_clk: uhphs_clk {
367 macb0_clk: macb0_clk {
377 udphs_clk: udphs_clk {
382 aestdessha_clk: aestdessha_clk {
400 compatible = "atmel,at91sam9g45-rstc";
401 reg = <0xfffffd00 0x10>;
405 pit: timer@fffffd30 {
406 compatible = "atmel,at91sam9260-pit";
407 reg = <0xfffffd30 0xf>;
408 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
414 compatible = "atmel,at91sam9rl-shdwc";
415 reg = <0xfffffd10 0x10>;
419 tcb0: timer@fff7c000 {
420 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
421 #address-cells = <1>;
423 reg = <0xfff7c000 0x100>;
424 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
425 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
426 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
429 tcb1: timer@fffd4000 {
430 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
431 #address-cells = <1>;
433 reg = <0xfffd4000 0x100>;
434 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
435 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
436 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
439 dma: dma-controller@ffffec00 {
440 compatible = "atmel,at91sam9g45-dma";
441 reg = <0xffffec00 0x200>;
442 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
444 clocks = <&dma0_clk>;
445 clock-names = "dma_clk";
449 #address-cells = <1>;
451 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
452 ranges = <0xfffff200 0xfffff200 0xa00>;
456 0xffffffff 0xffc003ff /* pioA */
457 0xffffffff 0x800f8f00 /* pioB */
458 0xffffffff 0x00000e00 /* pioC */
459 0xffffffff 0xff0c1381 /* pioD */
460 0xffffffff 0x81ffff81 /* pioE */
463 /* shared pinctrl settings */
465 pinctrl_ac97: ac97-0 {
467 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97RX */
468 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97TX */
469 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97FS */
470 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* AC97CK */
475 pinctrl_adc0_adtrg: adc0_adtrg {
476 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
478 pinctrl_adc0_ad0: adc0_ad0 {
479 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
481 pinctrl_adc0_ad1: adc0_ad1 {
482 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
484 pinctrl_adc0_ad2: adc0_ad2 {
485 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
487 pinctrl_adc0_ad3: adc0_ad3 {
488 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
490 pinctrl_adc0_ad4: adc0_ad4 {
491 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
493 pinctrl_adc0_ad5: adc0_ad5 {
494 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
496 pinctrl_adc0_ad6: adc0_ad6 {
497 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
499 pinctrl_adc0_ad7: adc0_ad7 {
500 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
505 pinctrl_dbgu: dbgu-0 {
507 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
508 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
513 pinctrl_i2c0: i2c0-0 {
515 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
516 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
521 pinctrl_i2c1: i2c1-0 {
523 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
524 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
529 pinctrl_isi_data_0_7: isi-0-data-0-7 {
531 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
532 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
533 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
534 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
535 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
536 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
537 AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
538 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
539 AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
540 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
541 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
544 pinctrl_isi_data_8_9: isi-0-data-8-9 {
546 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
547 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
550 pinctrl_isi_data_10_11: isi-0-data-10-11 {
552 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
553 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
558 pinctrl_usart0: usart0-0 {
560 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
561 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
564 pinctrl_usart0_rts: usart0_rts-0 {
566 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
569 pinctrl_usart0_cts: usart0_cts-0 {
571 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
576 pinctrl_usart1: usart1-0 {
578 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
579 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
582 pinctrl_usart1_rts: usart1_rts-0 {
584 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
587 pinctrl_usart1_cts: usart1_cts-0 {
589 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
594 pinctrl_usart2: usart2-0 {
596 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
597 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
600 pinctrl_usart2_rts: usart2_rts-0 {
602 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
605 pinctrl_usart2_cts: usart2_cts-0 {
607 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
612 pinctrl_usart3: usart3-0 {
614 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
615 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
618 pinctrl_usart3_rts: usart3_rts-0 {
620 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
623 pinctrl_usart3_cts: usart3_cts-0 {
625 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
630 pinctrl_nand_rb: nand-rb-0 {
632 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
635 pinctrl_nand_cs: nand-cs-0 {
637 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
642 pinctrl_macb_rmii: macb_rmii-0 {
644 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
645 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
646 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
647 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
648 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
649 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
650 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
651 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
652 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
653 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
656 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
658 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
659 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
660 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
661 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
662 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
663 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
664 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
665 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
670 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
672 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
673 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
674 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
677 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
679 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
680 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
681 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
684 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
686 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
687 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
688 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
689 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
694 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
696 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
697 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
698 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
701 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
703 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
704 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
705 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
708 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
710 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
711 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
712 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
713 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
718 pinctrl_ssc0_tx: ssc0_tx-0 {
720 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
721 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
722 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
725 pinctrl_ssc0_rx: ssc0_rx-0 {
727 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
728 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
729 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
734 pinctrl_ssc1_tx: ssc1_tx-0 {
736 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
737 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
738 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
741 pinctrl_ssc1_rx: ssc1_rx-0 {
743 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
744 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
745 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
750 pinctrl_spi0: spi0-0 {
752 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
753 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
754 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
759 pinctrl_spi1: spi1-0 {
761 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
762 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
763 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
768 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
769 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
772 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
773 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
776 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
777 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
780 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
781 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
784 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
785 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
788 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
789 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
792 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
793 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
796 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
797 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
800 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
801 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
806 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
807 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
810 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
811 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
814 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
815 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
818 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
819 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
822 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
823 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
826 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
827 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
830 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
831 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
834 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
835 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
838 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
839 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
846 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
847 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
848 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
849 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
850 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
851 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
852 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
853 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
854 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
855 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
856 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
857 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
858 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
859 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
860 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
861 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
862 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
863 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
864 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
865 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
866 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
867 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
868 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
869 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
870 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
871 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
872 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
873 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
874 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
875 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
879 pioA: gpio@fffff200 {
880 compatible = "atmel,at91rm9200-gpio";
881 reg = <0xfffff200 0x200>;
882 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
885 interrupt-controller;
886 #interrupt-cells = <2>;
887 clocks = <&pioA_clk>;
890 pioB: gpio@fffff400 {
891 compatible = "atmel,at91rm9200-gpio";
892 reg = <0xfffff400 0x200>;
893 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
896 interrupt-controller;
897 #interrupt-cells = <2>;
898 clocks = <&pioB_clk>;
901 pioC: gpio@fffff600 {
902 compatible = "atmel,at91rm9200-gpio";
903 reg = <0xfffff600 0x200>;
904 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
907 interrupt-controller;
908 #interrupt-cells = <2>;
909 clocks = <&pioC_clk>;
912 pioD: gpio@fffff800 {
913 compatible = "atmel,at91rm9200-gpio";
914 reg = <0xfffff800 0x200>;
915 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
918 interrupt-controller;
919 #interrupt-cells = <2>;
920 clocks = <&pioDE_clk>;
923 pioE: gpio@fffffa00 {
924 compatible = "atmel,at91rm9200-gpio";
925 reg = <0xfffffa00 0x200>;
926 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
929 interrupt-controller;
930 #interrupt-cells = <2>;
931 clocks = <&pioDE_clk>;
935 dbgu: serial@ffffee00 {
936 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
937 reg = <0xffffee00 0x200>;
938 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
939 pinctrl-names = "default";
940 pinctrl-0 = <&pinctrl_dbgu>;
942 clock-names = "usart";
946 usart0: serial@fff8c000 {
947 compatible = "atmel,at91sam9260-usart";
948 reg = <0xfff8c000 0x200>;
949 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&pinctrl_usart0>;
954 clocks = <&usart0_clk>;
955 clock-names = "usart";
959 usart1: serial@fff90000 {
960 compatible = "atmel,at91sam9260-usart";
961 reg = <0xfff90000 0x200>;
962 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
965 pinctrl-names = "default";
966 pinctrl-0 = <&pinctrl_usart1>;
967 clocks = <&usart1_clk>;
968 clock-names = "usart";
972 usart2: serial@fff94000 {
973 compatible = "atmel,at91sam9260-usart";
974 reg = <0xfff94000 0x200>;
975 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
978 pinctrl-names = "default";
979 pinctrl-0 = <&pinctrl_usart2>;
980 clocks = <&usart2_clk>;
981 clock-names = "usart";
985 usart3: serial@fff98000 {
986 compatible = "atmel,at91sam9260-usart";
987 reg = <0xfff98000 0x200>;
988 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
991 pinctrl-names = "default";
992 pinctrl-0 = <&pinctrl_usart3>;
993 clocks = <&usart3_clk>;
994 clock-names = "usart";
998 macb0: ethernet@fffbc000 {
999 compatible = "cdns,at91sam9260-macb", "cdns,macb";
1000 reg = <0xfffbc000 0x100>;
1001 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
1002 pinctrl-names = "default";
1003 pinctrl-0 = <&pinctrl_macb_rmii>;
1004 clocks = <&macb0_clk>, <&macb0_clk>;
1005 clock-names = "hclk", "pclk";
1006 status = "disabled";
1010 compatible = "atmel,at91sam9g45-trng";
1011 reg = <0xfffcc000 0x100>;
1012 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
1013 clocks = <&trng_clk>;
1016 i2c0: i2c@fff84000 {
1017 compatible = "atmel,at91sam9g10-i2c";
1018 reg = <0xfff84000 0x100>;
1019 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
1020 pinctrl-names = "default";
1021 pinctrl-0 = <&pinctrl_i2c0>;
1022 #address-cells = <1>;
1024 clocks = <&twi0_clk>;
1025 status = "disabled";
1028 i2c1: i2c@fff88000 {
1029 compatible = "atmel,at91sam9g10-i2c";
1030 reg = <0xfff88000 0x100>;
1031 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
1032 pinctrl-names = "default";
1033 pinctrl-0 = <&pinctrl_i2c1>;
1034 #address-cells = <1>;
1036 clocks = <&twi1_clk>;
1037 status = "disabled";
1040 ssc0: ssc@fff9c000 {
1041 compatible = "atmel,at91sam9g45-ssc";
1042 reg = <0xfff9c000 0x4000>;
1043 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1044 pinctrl-names = "default";
1045 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
1046 clocks = <&ssc0_clk>;
1047 clock-names = "pclk";
1048 status = "disabled";
1051 ssc1: ssc@fffa0000 {
1052 compatible = "atmel,at91sam9g45-ssc";
1053 reg = <0xfffa0000 0x4000>;
1054 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
1055 pinctrl-names = "default";
1056 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1057 clocks = <&ssc1_clk>;
1058 clock-names = "pclk";
1059 status = "disabled";
1062 ac97: sound@fffac000 {
1063 compatible = "atmel,at91sam9263-ac97c";
1064 reg = <0xfffac000 0x4000>;
1065 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
1066 pinctrl-names = "default";
1067 pinctrl-0 = <&pinctrl_ac97>;
1068 clocks = <&ac97_clk>;
1069 clock-names = "ac97_clk";
1070 status = "disabled";
1073 adc0: adc@fffb0000 {
1074 #address-cells = <1>;
1076 compatible = "atmel,at91sam9g45-adc";
1077 reg = <0xfffb0000 0x100>;
1078 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1079 clocks = <&adc_clk>, <&adc_op_clk>;
1080 clock-names = "adc_clk", "adc_op_clk";
1081 atmel,adc-channels-used = <0xff>;
1082 atmel,adc-vref = <3300>;
1083 atmel,adc-startup-time = <40>;
1084 atmel,adc-res = <8 10>;
1085 atmel,adc-res-names = "lowres", "highres";
1086 atmel,adc-use-res = "highres";
1089 trigger-name = "external-rising";
1090 trigger-value = <0x1>;
1094 trigger-name = "external-falling";
1095 trigger-value = <0x2>;
1100 trigger-name = "external-any";
1101 trigger-value = <0x3>;
1106 trigger-name = "continuous";
1107 trigger-value = <0x6>;
1112 compatible = "atmel,at91sam9g45-isi";
1113 reg = <0xfffb4000 0x4000>;
1114 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1115 clocks = <&isi_clk>;
1116 clock-names = "isi_clk";
1117 status = "disabled";
1119 #address-cells = <1>;
1124 pwm0: pwm@fffb8000 {
1125 compatible = "atmel,at91sam9rl-pwm";
1126 reg = <0xfffb8000 0x300>;
1127 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1129 clocks = <&pwm_clk>;
1130 status = "disabled";
1133 mmc0: mmc@fff80000 {
1134 compatible = "atmel,hsmci";
1135 reg = <0xfff80000 0x600>;
1136 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1137 pinctrl-names = "default";
1138 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1140 #address-cells = <1>;
1142 clocks = <&mci0_clk>;
1143 clock-names = "mci_clk";
1144 status = "disabled";
1147 mmc1: mmc@fffd0000 {
1148 compatible = "atmel,hsmci";
1149 reg = <0xfffd0000 0x600>;
1150 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1151 pinctrl-names = "default";
1152 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1154 #address-cells = <1>;
1156 clocks = <&mci1_clk>;
1157 clock-names = "mci_clk";
1158 status = "disabled";
1162 compatible = "atmel,at91sam9260-wdt";
1163 reg = <0xfffffd40 0x10>;
1164 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1166 atmel,watchdog-type = "hardware";
1167 atmel,reset-type = "all";
1169 status = "disabled";
1172 spi0: spi@fffa4000 {
1173 #address-cells = <1>;
1175 compatible = "atmel,at91rm9200-spi";
1176 reg = <0xfffa4000 0x200>;
1177 interrupts = <14 4 3>;
1178 pinctrl-names = "default";
1179 pinctrl-0 = <&pinctrl_spi0>;
1180 clocks = <&spi0_clk>;
1181 clock-names = "spi_clk";
1182 status = "disabled";
1185 spi1: spi@fffa8000 {
1186 #address-cells = <1>;
1188 compatible = "atmel,at91rm9200-spi";
1189 reg = <0xfffa8000 0x200>;
1190 interrupts = <15 4 3>;
1191 pinctrl-names = "default";
1192 pinctrl-0 = <&pinctrl_spi1>;
1193 clocks = <&spi1_clk>;
1194 clock-names = "spi_clk";
1195 status = "disabled";
1198 usb2: gadget@fff78000 {
1199 #address-cells = <1>;
1201 compatible = "atmel,at91sam9g45-udc";
1202 reg = <0x00600000 0x80000
1204 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1205 clocks = <&udphs_clk>, <&utmi>;
1206 clock-names = "pclk", "hclk";
1207 status = "disabled";
1211 atmel,fifo-size = <64>;
1212 atmel,nb-banks = <1>;
1217 atmel,fifo-size = <1024>;
1218 atmel,nb-banks = <2>;
1225 atmel,fifo-size = <1024>;
1226 atmel,nb-banks = <2>;
1233 atmel,fifo-size = <1024>;
1234 atmel,nb-banks = <3>;
1240 atmel,fifo-size = <1024>;
1241 atmel,nb-banks = <3>;
1247 atmel,fifo-size = <1024>;
1248 atmel,nb-banks = <3>;
1255 atmel,fifo-size = <1024>;
1256 atmel,nb-banks = <3>;
1263 compatible = "atmel,at91sam9x5-sckc";
1264 reg = <0xfffffd50 0x4>;
1266 slow_osc: slow_osc {
1267 compatible = "atmel,at91sam9x5-clk-slow-osc";
1269 atmel,startup-time-usec = <1200000>;
1270 clocks = <&slow_xtal>;
1273 slow_rc_osc: slow_rc_osc {
1274 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1276 atmel,startup-time-usec = <75>;
1277 clock-frequency = <32768>;
1278 clock-accuracy = <50000000>;
1282 compatible = "atmel,at91sam9x5-clk-slow";
1284 clocks = <&slow_rc_osc &slow_osc>;
1289 compatible = "atmel,at91sam9260-rtt";
1290 reg = <0xfffffd20 0x10>;
1291 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1293 status = "disabled";
1297 compatible = "atmel,at91rm9200-rtc";
1298 reg = <0xfffffdb0 0x30>;
1299 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1301 status = "disabled";
1304 gpbr: syscon@fffffd60 {
1305 compatible = "atmel,at91sam9260-gpbr", "syscon";
1306 reg = <0xfffffd60 0x10>;
1307 status = "disabled";
1312 compatible = "atmel,at91sam9g45-lcdc";
1313 reg = <0x00500000 0x1000>;
1314 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1315 pinctrl-names = "default";
1316 pinctrl-0 = <&pinctrl_fb>;
1317 clocks = <&lcd_clk>, <&lcd_clk>;
1318 clock-names = "hclk", "lcdc_clk";
1319 status = "disabled";
1323 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1324 reg = <0x00700000 0x100000>;
1325 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1326 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1327 clock-names = "ohci_clk", "hclk", "uhpck";
1328 status = "disabled";
1332 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1333 reg = <0x00800000 0x100000>;
1334 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1335 clocks = <&utmi>, <&uhphs_clk>;
1336 clock-names = "usb_clk", "ehci_clk";
1337 status = "disabled";
1341 compatible = "atmel,at91sam9g45-ebi";
1342 #address-cells = <2>;
1345 atmel,matrix = <&matrix>;
1346 reg = <0x10000000 0x80000000>;
1347 ranges = <0x0 0x0 0x10000000 0x10000000
1348 0x1 0x0 0x20000000 0x10000000
1349 0x2 0x0 0x30000000 0x10000000
1350 0x3 0x0 0x40000000 0x10000000
1351 0x4 0x0 0x50000000 0x10000000
1352 0x5 0x0 0x60000000 0x10000000>;
1354 status = "disabled";
1356 nand_controller: nand-controller {
1357 compatible = "atmel,at91sam9g45-nand-controller";
1358 #address-cells = <2>;
1361 status = "disabled";
1367 compatible = "i2c-gpio";
1368 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1369 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1371 i2c-gpio,sda-open-drain;
1372 i2c-gpio,scl-open-drain;
1373 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1374 #address-cells = <1>;
1376 status = "disabled";