arch/arm/boot/dts/at91sam9g45.dtsi

   1 /*
   2  * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
   3  *                    applies to AT91SAM9G45, AT91SAM9M10,
   4  *                    AT91SAM9G46, AT91SAM9M11 SoC
   5  *
   6  *  Copyright (C) 2011 Atmel,
   7  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clock/at91.h>
  17
  18 / {
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         model = "Atmel AT91SAM9G45 family SoC";
  22         compatible = "atmel,at91sam9g45";
  23         interrupt-parent = <&aic>;
  24
  25         aliases {
  26                 serial0 = &dbgu;
  27                 serial1 = &usart0;
  28                 serial2 = &usart1;
  29                 serial3 = &usart2;
  30                 serial4 = &usart3;
  31                 gpio0 = &pioA;
  32                 gpio1 = &pioB;
  33                 gpio2 = &pioC;
  34                 gpio3 = &pioD;
  35                 gpio4 = &pioE;
  36                 tcb0 = &tcb0;
  37                 tcb1 = &tcb1;
  38                 i2c0 = &i2c0;
  39                 i2c1 = &i2c1;
  40                 ssc0 = &ssc0;
  41                 ssc1 = &ssc1;
  42                 pwm0 = &pwm0;
  43         };
  44         cpus {
  45                 #address-cells = <0>;
  46                 #size-cells = <0>;
  47
  48                 cpu {
  49                         compatible = "arm,arm926ej-s";
  50                         device_type = "cpu";
  51                 };
  52         };
  53
  54         memory {
  55                 device_type = "memory";
  56                 reg = <0x70000000 0x10000000>;
  57         };
  58
  59         clocks {
  60                 slow_xtal: slow_xtal {
  61                         compatible = "fixed-clock";
  62                         #clock-cells = <0>;
  63                         clock-frequency = <0>;
  64                 };
  65
  66                 main_xtal: main_xtal {
  67                         compatible = "fixed-clock";
  68                         #clock-cells = <0>;
  69                         clock-frequency = <0>;
  70                 };
  71
  72                 adc_op_clk: adc_op_clk{
  73                         compatible = "fixed-clock";
  74                         #clock-cells = <0>;
  75                         clock-frequency = <300000>;
  76                 };
  77         };
  78
  79         sram: sram@300000 {
  80                 compatible = "mmio-sram";
  81                 reg = <0x00300000 0x10000>;
  82         };
  83
  84         ahb {
  85                 compatible = "simple-bus";
  86                 #address-cells = <1>;
  87                 #size-cells = <1>;
  88                 ranges;
  89
  90                 apb {
  91                         compatible = "simple-bus";
  92                         #address-cells = <1>;
  93                         #size-cells = <1>;
  94                         ranges;
  95
  96                         aic: interrupt-controller@fffff000 {
  97                                 #interrupt-cells = <3>;
  98                                 compatible = "atmel,at91rm9200-aic";
  99                                 interrupt-controller;
 100                                 reg = <0xfffff000 0x200>;
 101                                 atmel,external-irqs = <31>;
 102                         };
 103
 104                         ramc0: ramc@ffffe400 {
 105                                 compatible = "atmel,at91sam9g45-ddramc";
 106                                 reg = <0xffffe400 0x200>;
 107                                 clocks = <&ddrck>;
 108                                 clock-names = "ddrck";
 109                         };
 110
 111                         ramc1: ramc@ffffe600 {
 112                                 compatible = "atmel,at91sam9g45-ddramc";
 113                                 reg = <0xffffe600 0x200>;
 114                                 clocks = <&ddrck>;
 115                                 clock-names = "ddrck";
 116                         };
 117
 118                         smc: smc@ffffe800 {
 119                                 compatible = "atmel,at91sam9260-smc", "syscon";
 120                                 reg = <0xffffe800 0x200>;
 121                         };
 122
 123                         matrix: matrix@ffffea00 {
 124                                 compatible = "atmel,at91sam9g45-matrix", "syscon";
 125                                 reg = <0xffffea00 0x200>;
 126                         };
 127
 128                         pmc: pmc@fffffc00 {
 129                                 compatible = "atmel,at91sam9g45-pmc", "syscon";
 130                                 reg = <0xfffffc00 0x100>;
 131                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 132                                 interrupt-controller;
 133                                 #address-cells = <1>;
 134                                 #size-cells = <0>;
 135                                 #interrupt-cells = <1>;
 136
 137                                 main_osc: main_osc {
 138                                         compatible = "atmel,at91rm9200-clk-main-osc";
 139                                         #clock-cells = <0>;
 140                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 141                                         clocks = <&main_xtal>;
 142                                 };
 143
 144                                 main: mainck {
 145                                         compatible = "atmel,at91rm9200-clk-main";
 146                                         #clock-cells = <0>;
 147                                         clocks = <&main_osc>;
 148                                 };
 149
 150                                 plla: pllack {
 151                                         compatible = "atmel,at91rm9200-clk-pll";
 152                                         #clock-cells = <0>;
 153                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 154                                         clocks = <&main>;
 155                                         reg = <0>;
 156                                         atmel,clk-input-range = <2000000 32000000>;
 157                                         #atmel,pll-clk-output-range-cells = <4>;
 158                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 159                                                                        695000000 750000000 1 0
 160                                                                        645000000 700000000 2 0
 161                                                                        595000000 650000000 3 0
 162                                                                        545000000 600000000 0 1
 163                                                                        495000000 555000000 1 1
 164                                                                        445000000 500000000 2 1
 165                                                                        400000000 450000000 3 1>;
 166                                 };
 167
 168                                 plladiv: plladivck {
 169                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 170                                         #clock-cells = <0>;
 171                                         clocks = <&plla>;
 172                                 };
 173
 174                                 utmi: utmick {
 175                                         compatible = "atmel,at91sam9x5-clk-utmi";
 176                                         #clock-cells = <0>;
 177                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 178                                         clocks = <&main>;
 179                                 };
 180
 181                                 mck: masterck {
 182                                         compatible = "atmel,at91rm9200-clk-master";
 183                                         #clock-cells = <0>;
 184                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 185                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 186                                         atmel,clk-output-range = <0 133333333>;
 187                                         atmel,clk-divisors = <1 2 4 3>;
 188                                 };
 189
 190                                 usb: usbck {
 191                                         compatible = "atmel,at91sam9x5-clk-usb";
 192                                         #clock-cells = <0>;
 193                                         clocks = <&plladiv>, <&utmi>;
 194                                 };
 195
 196                                 prog: progck {
 197                                         compatible = "atmel,at91sam9g45-clk-programmable";
 198                                         #address-cells = <1>;
 199                                         #size-cells = <0>;
 200                                         interrupt-parent = <&pmc>;
 201                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 202
 203                                         prog0: prog0 {
 204                                                 #clock-cells = <0>;
 205                                                 reg = <0>;
 206                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 207                                         };
 208
 209                                         prog1: prog1 {
 210                                                 #clock-cells = <0>;
 211                                                 reg = <1>;
 212                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 213                                         };
 214                                 };
 215
 216                                 systemck {
 217                                         compatible = "atmel,at91rm9200-clk-system";
 218                                         #address-cells = <1>;
 219                                         #size-cells = <0>;
 220
 221                                         ddrck: ddrck {
 222                                                 #clock-cells = <0>;
 223                                                 reg = <2>;
 224                                                 clocks = <&mck>;
 225                                         };
 226
 227                                         uhpck: uhpck {
 228                                                 #clock-cells = <0>;
 229                                                 reg = <6>;
 230                                                 clocks = <&usb>;
 231                                         };
 232
 233                                         pck0: pck0 {
 234                                                 #clock-cells = <0>;
 235                                                 reg = <8>;
 236                                                 clocks = <&prog0>;
 237                                         };
 238
 239                                         pck1: pck1 {
 240                                                 #clock-cells = <0>;
 241                                                 reg = <9>;
 242                                                 clocks = <&prog1>;
 243                                         };
 244                                 };
 245
 246                                 periphck {
 247                                         compatible = "atmel,at91rm9200-clk-peripheral";
 248                                         #address-cells = <1>;
 249                                         #size-cells = <0>;
 250                                         clocks = <&mck>;
 251
 252                                         pioA_clk: pioA_clk {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <2>;
 255                                         };
 256
 257                                         pioB_clk: pioB_clk {
 258                                                 #clock-cells = <0>;
 259                                                 reg = <3>;
 260                                         };
 261
 262                                         pioC_clk: pioC_clk {
 263                                                 #clock-cells = <0>;
 264                                                 reg = <4>;
 265                                         };
 266
 267                                         pioDE_clk: pioDE_clk {
 268                                                 #clock-cells = <0>;
 269                                                 reg = <5>;
 270                                         };
 271
 272                                         trng_clk: trng_clk {
 273                                                 #clock-cells = <0>;
 274                                                 reg = <6>;
 275                                         };
 276
 277                                         usart0_clk: usart0_clk {
 278                                                 #clock-cells = <0>;
 279                                                 reg = <7>;
 280                                         };
 281
 282                                         usart1_clk: usart1_clk {
 283                                                 #clock-cells = <0>;
 284                                                 reg = <8>;
 285                                         };
 286
 287                                         usart2_clk: usart2_clk {
 288                                                 #clock-cells = <0>;
 289                                                 reg = <9>;
 290                                         };
 291
 292                                         usart3_clk: usart3_clk {
 293                                                 #clock-cells = <0>;
 294                                                 reg = <10>;
 295                                         };
 296
 297                                         mci0_clk: mci0_clk {
 298                                                 #clock-cells = <0>;
 299                                                 reg = <11>;
 300                                         };
 301
 302                                         twi0_clk: twi0_clk {
 303                                                 #clock-cells = <0>;
 304                                                 reg = <12>;
 305                                         };
 306
 307                                         twi1_clk: twi1_clk {
 308                                                 #clock-cells = <0>;
 309                                                 reg = <13>;
 310                                         };
 311
 312                                         spi0_clk: spi0_clk {
 313                                                 #clock-cells = <0>;
 314                                                 reg = <14>;
 315                                         };
 316
 317                                         spi1_clk: spi1_clk {
 318                                                 #clock-cells = <0>;
 319                                                 reg = <15>;
 320                                         };
 321
 322                                         ssc0_clk: ssc0_clk {
 323                                                 #clock-cells = <0>;
 324                                                 reg = <16>;
 325                                         };
 326
 327                                         ssc1_clk: ssc1_clk {
 328                                                 #clock-cells = <0>;
 329                                                 reg = <17>;
 330                                         };
 331
 332                                         tcb0_clk: tcb0_clk {
 333                                                 #clock-cells = <0>;
 334                                                 reg = <18>;
 335                                         };
 336
 337                                         pwm_clk: pwm_clk {
 338                                                 #clock-cells = <0>;
 339                                                 reg = <19>;
 340                                         };
 341
 342                                         adc_clk: adc_clk {
 343                                                 #clock-cells = <0>;
 344                                                 reg = <20>;
 345                                         };
 346
 347                                         dma0_clk: dma0_clk {
 348                                                 #clock-cells = <0>;
 349                                                 reg = <21>;
 350                                         };
 351
 352                                         uhphs_clk: uhphs_clk {
 353                                                 #clock-cells = <0>;
 354                                                 reg = <22>;
 355                                         };
 356
 357                                         lcd_clk: lcd_clk {
 358                                                 #clock-cells = <0>;
 359                                                 reg = <23>;
 360                                         };
 361
 362                                         ac97_clk: ac97_clk {
 363                                                 #clock-cells = <0>;
 364                                                 reg = <24>;
 365                                         };
 366
 367                                         macb0_clk: macb0_clk {
 368                                                 #clock-cells = <0>;
 369                                                 reg = <25>;
 370                                         };
 371
 372                                         isi_clk: isi_clk {
 373                                                 #clock-cells = <0>;
 374                                                 reg = <26>;
 375                                         };
 376
 377                                         udphs_clk: udphs_clk {
 378                                                 #clock-cells = <0>;
 379                                                 reg = <27>;
 380                                         };
 381
 382                                         aestdessha_clk: aestdessha_clk {
 383                                                 #clock-cells = <0>;
 384                                                 reg = <28>;
 385                                         };
 386
 387                                         mci1_clk: mci1_clk {
 388                                                 #clock-cells = <0>;
 389                                                 reg = <29>;
 390                                         };
 391
 392                                         vdec_clk: vdec_clk {
 393                                                 #clock-cells = <0>;
 394                                                 reg = <30>;
 395                                         };
 396                                 };
 397                         };
 398
 399                         rstc@fffffd00 {
 400                                 compatible = "atmel,at91sam9g45-rstc";
 401                                 reg = <0xfffffd00 0x10>;
 402                                 clocks = <&clk32k>;
 403                         };
 404
 405                         pit: timer@fffffd30 {
 406                                 compatible = "atmel,at91sam9260-pit";
 407                                 reg = <0xfffffd30 0xf>;
 408                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 409                                 clocks = <&mck>;
 410                         };
 411
 412
 413                         shdwc@fffffd10 {
 414                                 compatible = "atmel,at91sam9rl-shdwc";
 415                                 reg = <0xfffffd10 0x10>;
 416                                 clocks = <&clk32k>;
 417                         };
 418
 419                         tcb0: timer@fff7c000 {
 420                                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 421                                 #address-cells = <1>;
 422                                 #size-cells = <0>;
 423                                 reg = <0xfff7c000 0x100>;
 424                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 425                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
 426                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 427                         };
 428
 429                         tcb1: timer@fffd4000 {
 430                                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 431                                 #address-cells = <1>;
 432                                 #size-cells = <0>;
 433                                 reg = <0xfffd4000 0x100>;
 434                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 435                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
 436                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 437                         };
 438
 439                         dma: dma-controller@ffffec00 {
 440                                 compatible = "atmel,at91sam9g45-dma";
 441                                 reg = <0xffffec00 0x200>;
 442                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 443                                 #dma-cells = <2>;
 444                                 clocks = <&dma0_clk>;
 445                                 clock-names = "dma_clk";
 446                         };
 447
 448                         pinctrl@fffff200 {
 449                                 #address-cells = <1>;
 450                                 #size-cells = <1>;
 451                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 452                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 453
 454                                 atmel,mux-mask = <
 455                                       /*    A         B     */
 456                                        0xffffffff 0xffc003ff  /* pioA */
 457                                        0xffffffff 0x800f8f00  /* pioB */
 458                                        0xffffffff 0x00000e00  /* pioC */
 459                                        0xffffffff 0xff0c1381  /* pioD */
 460                                        0xffffffff 0x81ffff81  /* pioE */
 461                                       >;
 462
 463                                 /* shared pinctrl settings */
 464                                 ac97 {
 465                                         pinctrl_ac97: ac97-0 {
 466                                                 atmel,pins =
 467                                                         <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97RX */
 468                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97TX */
 469                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97FS */
 470                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* AC97CK */
 471                                         };
 472                                 };
 473
 474                                 adc0 {
 475                                         pinctrl_adc0_adtrg: adc0_adtrg {
 476                                                 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 477                                         };
 478                                         pinctrl_adc0_ad0: adc0_ad0 {
 479                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 480                                         };
 481                                         pinctrl_adc0_ad1: adc0_ad1 {
 482                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 483                                         };
 484                                         pinctrl_adc0_ad2: adc0_ad2 {
 485                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 486                                         };
 487                                         pinctrl_adc0_ad3: adc0_ad3 {
 488                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 489                                         };
 490                                         pinctrl_adc0_ad4: adc0_ad4 {
 491                                                 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 492                                         };
 493                                         pinctrl_adc0_ad5: adc0_ad5 {
 494                                                 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 495                                         };
 496                                         pinctrl_adc0_ad6: adc0_ad6 {
 497                                                 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 498                                         };
 499                                         pinctrl_adc0_ad7: adc0_ad7 {
 500                                                 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 501                                         };
 502                                 };
 503
 504                                 dbgu {
 505                                         pinctrl_dbgu: dbgu-0 {
 506                                                 atmel,pins =
 507                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 508                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 509                                         };
 510                                 };
 511
 512                                 i2c0 {
 513                                         pinctrl_i2c0: i2c0-0 {
 514                                                 atmel,pins =
 515                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
 516                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
 517                                         };
 518                                 };
 519
 520                                 i2c1 {
 521                                         pinctrl_i2c1: i2c1-0 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
 524                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
 525                                         };
 526                                 };
 527
 528                                 isi {
 529                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
 532                                                         AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
 533                                                         AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
 534                                                         AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
 535                                                         AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
 536                                                         AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
 537                                                         AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
 538                                                         AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
 539                                                         AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
 540                                                         AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
 541                                                         AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
 542                                         };
 543
 544                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
 545                                                 atmel,pins =
 546                                                         <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
 547                                                         AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
 548                                         };
 549
 550                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
 551                                                 atmel,pins =
 552                                                         <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
 553                                                         AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
 554                                         };
 555                                 };
 556
 557                                 usart0 {
 558                                         pinctrl_usart0: usart0-0 {
 559                                                 atmel,pins =
 560                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
 561                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 562                                         };
 563
 564                                         pinctrl_usart0_rts: usart0_rts-0 {
 565                                                 atmel,pins =
 566                                                         <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
 567                                         };
 568
 569                                         pinctrl_usart0_cts: usart0_cts-0 {
 570                                                 atmel,pins =
 571                                                         <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
 572                                         };
 573                                 };
 574
 575                                 usart1 {
 576                                         pinctrl_usart1: usart1-0 {
 577                                                 atmel,pins =
 578                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
 579                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 580                                         };
 581
 582                                         pinctrl_usart1_rts: usart1_rts-0 {
 583                                                 atmel,pins =
 584                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
 585                                         };
 586
 587                                         pinctrl_usart1_cts: usart1_cts-0 {
 588                                                 atmel,pins =
 589                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
 590                                         };
 591                                 };
 592
 593                                 usart2 {
 594                                         pinctrl_usart2: usart2-0 {
 595                                                 atmel,pins =
 596                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
 597                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 598                                         };
 599
 600                                         pinctrl_usart2_rts: usart2_rts-0 {
 601                                                 atmel,pins =
 602                                                         <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC9 periph B */
 603                                         };
 604
 605                                         pinctrl_usart2_cts: usart2_cts-0 {
 606                                                 atmel,pins =
 607                                                         <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
 608                                         };
 609                                 };
 610
 611                                 usart3 {
 612                                         pinctrl_usart3: usart3-0 {
 613                                                 atmel,pins =
 614                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
 615                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 616                                         };
 617
 618                                         pinctrl_usart3_rts: usart3_rts-0 {
 619                                                 atmel,pins =
 620                                                         <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
 621                                         };
 622
 623                                         pinctrl_usart3_cts: usart3_cts-0 {
 624                                                 atmel,pins =
 625                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
 626                                         };
 627                                 };
 628
 629                                 nand {
 630                                         pinctrl_nand_rb: nand-rb-0 {
 631                                                 atmel,pins =
 632                                                         <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 633                                         };
 634
 635                                         pinctrl_nand_cs: nand-cs-0 {
 636                                                 atmel,pins =
 637                                                          <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 638                                         };
 639                                 };
 640
 641                                 macb {
 642                                         pinctrl_macb_rmii: macb_rmii-0 {
 643                                                 atmel,pins =
 644                                                         <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
 645                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
 646                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 647                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 648                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 649                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 650                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
 651                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 652                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
 653                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
 654                                         };
 655
 656                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA6 periph B */
 659                                                          AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA7 periph B */
 660                                                          AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA8 periph B */
 661                                                          AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA9 periph B */
 662                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 663                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 664                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA29 periph B */
 665                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 666                                         };
 667                                 };
 668
 669                                 mmc0 {
 670                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 671                                                 atmel,pins =
 672                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A */
 673                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 674                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA2 periph A with pullup */
 675                                         };
 676
 677                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 678                                                 atmel,pins =
 679                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
 680                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
 681                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
 682                                         };
 683
 684                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 685                                                 atmel,pins =
 686                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 687                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 688                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 689                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA9 periph A with pullup */
 690                                         };
 691                                 };
 692
 693                                 mmc1 {
 694                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 695                                                 atmel,pins =
 696                                                         <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA31 periph A */
 697                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA22 periph A with pullup */
 698                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
 699                                         };
 700
 701                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 702                                                 atmel,pins =
 703                                                         <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
 704                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA25 periph A with pullup */
 705                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA26 periph A with pullup */
 706                                         };
 707
 708                                         pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
 709                                                 atmel,pins =
 710                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA27 periph A with pullup */
 711                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
 712                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA29 periph A with pullup */
 713                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA30 periph A with pullup */
 714                                         };
 715                                 };
 716
 717                                 ssc0 {
 718                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 719                                                 atmel,pins =
 720                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A */
 721                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A */
 722                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD2 periph A */
 723                                         };
 724
 725                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 726                                                 atmel,pins =
 727                                                         <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A */
 728                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD4 periph A */
 729                                                          AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD5 periph A */
 730                                         };
 731                                 };
 732
 733                                 ssc1 {
 734                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 735                                                 atmel,pins =
 736                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A */
 737                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A */
 738                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
 739                                         };
 740
 741                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 742                                                 atmel,pins =
 743                                                         <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD13 periph A */
 744                                                          AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A */
 745                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
 746                                         };
 747                                 };
 748
 749                                 spi0 {
 750                                         pinctrl_spi0: spi0-0 {
 751                                                 atmel,pins =
 752                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI0_MISO pin */
 753                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI0_MOSI pin */
 754                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI0_SPCK pin */
 755                                         };
 756                                 };
 757
 758                                 spi1 {
 759                                         pinctrl_spi1: spi1-0 {
 760                                                 atmel,pins =
 761                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A SPI1_MISO pin */
 762                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A SPI1_MOSI pin */
 763                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
 764                                         };
 765                                 };
 766
 767                                 tcb0 {
 768                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 769                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 770                                         };
 771
 772                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 773                                                 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 774                                         };
 775
 776                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 777                                                 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 778                                         };
 779
 780                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 781                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 782                                         };
 783
 784                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 785                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 786                                         };
 787
 788                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 789                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 790                                         };
 791
 792                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 793                                                 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 794                                         };
 795
 796                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 797                                                 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 798                                         };
 799
 800                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 801                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 802                                         };
 803                                 };
 804
 805                                 tcb1 {
 806                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 807                                                 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 808                                         };
 809
 810                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 811                                                 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 812                                         };
 813
 814                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 815                                                 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 816                                         };
 817
 818                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 819                                                 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 820                                         };
 821
 822                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 823                                                 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 824                                         };
 825
 826                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 827                                                 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 828                                         };
 829
 830                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 831                                                 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 832                                         };
 833
 834                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 835                                                 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 836                                         };
 837
 838                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 839                                                 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 840                                         };
 841                                 };
 842
 843                                 fb {
 844                                         pinctrl_fb: fb-0 {
 845                                                 atmel,pins =
 846                                                         <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE0 periph A */
 847                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE2 periph A */
 848                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE3 periph A */
 849                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE4 periph A */
 850                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE5 periph A */
 851                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE6 periph A */
 852                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE7 periph A */
 853                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE8 periph A */
 854                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE9 periph A */
 855                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE10 periph A */
 856                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE11 periph A */
 857                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE12 periph A */
 858                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE13 periph A */
 859                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE14 periph A */
 860                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE15 periph A */
 861                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE16 periph A */
 862                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE17 periph A */
 863                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE18 periph A */
 864                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE19 periph A */
 865                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE20 periph A */
 866                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
 867                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE22 periph A */
 868                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
 869                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
 870                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
 871                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
 872                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
 873                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
 874                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
 875                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
 876                                         };
 877                                 };
 878
 879                                 pioA: gpio@fffff200 {
 880                                         compatible = "atmel,at91rm9200-gpio";
 881                                         reg = <0xfffff200 0x200>;
 882                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 883                                         #gpio-cells = <2>;
 884                                         gpio-controller;
 885                                         interrupt-controller;
 886                                         #interrupt-cells = <2>;
 887                                         clocks = <&pioA_clk>;
 888                                 };
 889
 890                                 pioB: gpio@fffff400 {
 891                                         compatible = "atmel,at91rm9200-gpio";
 892                                         reg = <0xfffff400 0x200>;
 893                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 894                                         #gpio-cells = <2>;
 895                                         gpio-controller;
 896                                         interrupt-controller;
 897                                         #interrupt-cells = <2>;
 898                                         clocks = <&pioB_clk>;
 899                                 };
 900
 901                                 pioC: gpio@fffff600 {
 902                                         compatible = "atmel,at91rm9200-gpio";
 903                                         reg = <0xfffff600 0x200>;
 904                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 905                                         #gpio-cells = <2>;
 906                                         gpio-controller;
 907                                         interrupt-controller;
 908                                         #interrupt-cells = <2>;
 909                                         clocks = <&pioC_clk>;
 910                                 };
 911
 912                                 pioD: gpio@fffff800 {
 913                                         compatible = "atmel,at91rm9200-gpio";
 914                                         reg = <0xfffff800 0x200>;
 915                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 916                                         #gpio-cells = <2>;
 917                                         gpio-controller;
 918                                         interrupt-controller;
 919                                         #interrupt-cells = <2>;
 920                                         clocks = <&pioDE_clk>;
 921                                 };
 922
 923                                 pioE: gpio@fffffa00 {
 924                                         compatible = "atmel,at91rm9200-gpio";
 925                                         reg = <0xfffffa00 0x200>;
 926                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 927                                         #gpio-cells = <2>;
 928                                         gpio-controller;
 929                                         interrupt-controller;
 930                                         #interrupt-cells = <2>;
 931                                         clocks = <&pioDE_clk>;
 932                                 };
 933                         };
 934
 935                         dbgu: serial@ffffee00 {
 936                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 937                                 reg = <0xffffee00 0x200>;
 938                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 939                                 pinctrl-names = "default";
 940                                 pinctrl-0 = <&pinctrl_dbgu>;
 941                                 clocks = <&mck>;
 942                                 clock-names = "usart";
 943                                 status = "disabled";
 944                         };
 945
 946                         usart0: serial@fff8c000 {
 947                                 compatible = "atmel,at91sam9260-usart";
 948                                 reg = <0xfff8c000 0x200>;
 949                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 950                                 atmel,use-dma-rx;
 951                                 atmel,use-dma-tx;
 952                                 pinctrl-names = "default";
 953                                 pinctrl-0 = <&pinctrl_usart0>;
 954                                 clocks = <&usart0_clk>;
 955                                 clock-names = "usart";
 956                                 status = "disabled";
 957                         };
 958
 959                         usart1: serial@fff90000 {
 960                                 compatible = "atmel,at91sam9260-usart";
 961                                 reg = <0xfff90000 0x200>;
 962                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 963                                 atmel,use-dma-rx;
 964                                 atmel,use-dma-tx;
 965                                 pinctrl-names = "default";
 966                                 pinctrl-0 = <&pinctrl_usart1>;
 967                                 clocks = <&usart1_clk>;
 968                                 clock-names = "usart";
 969                                 status = "disabled";
 970                         };
 971
 972                         usart2: serial@fff94000 {
 973                                 compatible = "atmel,at91sam9260-usart";
 974                                 reg = <0xfff94000 0x200>;
 975                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 976                                 atmel,use-dma-rx;
 977                                 atmel,use-dma-tx;
 978                                 pinctrl-names = "default";
 979                                 pinctrl-0 = <&pinctrl_usart2>;
 980                                 clocks = <&usart2_clk>;
 981                                 clock-names = "usart";
 982                                 status = "disabled";
 983                         };
 984
 985                         usart3: serial@fff98000 {
 986                                 compatible = "atmel,at91sam9260-usart";
 987                                 reg = <0xfff98000 0x200>;
 988                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
 989                                 atmel,use-dma-rx;
 990                                 atmel,use-dma-tx;
 991                                 pinctrl-names = "default";
 992                                 pinctrl-0 = <&pinctrl_usart3>;
 993                                 clocks = <&usart3_clk>;
 994                                 clock-names = "usart";
 995                                 status = "disabled";
 996                         };
 997
 998                         macb0: ethernet@fffbc000 {
 999                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
1000                                 reg = <0xfffbc000 0x100>;
1001                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
1002                                 pinctrl-names = "default";
1003                                 pinctrl-0 = <&pinctrl_macb_rmii>;
1004                                 clocks = <&macb0_clk>, <&macb0_clk>;
1005                                 clock-names = "hclk", "pclk";
1006                                 status = "disabled";
1007                         };
1008
1009                         trng@fffcc000 {
1010                                 compatible = "atmel,at91sam9g45-trng";
1011                                 reg = <0xfffcc000 0x100>;
1012                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
1013                                 clocks = <&trng_clk>;
1014                         };
1015
1016                         i2c0: i2c@fff84000 {
1017                                 compatible = "atmel,at91sam9g10-i2c";
1018                                 reg = <0xfff84000 0x100>;
1019                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
1020                                 pinctrl-names = "default";
1021                                 pinctrl-0 = <&pinctrl_i2c0>;
1022                                 #address-cells = <1>;
1023                                 #size-cells = <0>;
1024                                 clocks = <&twi0_clk>;
1025                                 status = "disabled";
1026                         };
1027
1028                         i2c1: i2c@fff88000 {
1029                                 compatible = "atmel,at91sam9g10-i2c";
1030                                 reg = <0xfff88000 0x100>;
1031                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
1032                                 pinctrl-names = "default";
1033                                 pinctrl-0 = <&pinctrl_i2c1>;
1034                                 #address-cells = <1>;
1035                                 #size-cells = <0>;
1036                                 clocks = <&twi1_clk>;
1037                                 status = "disabled";
1038                         };
1039
1040                         ssc0: ssc@fff9c000 {
1041                                 compatible = "atmel,at91sam9g45-ssc";
1042                                 reg = <0xfff9c000 0x4000>;
1043                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1044                                 pinctrl-names = "default";
1045                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
1046                                 clocks = <&ssc0_clk>;
1047                                 clock-names = "pclk";
1048                                 status = "disabled";
1049                         };
1050
1051                         ssc1: ssc@fffa0000 {
1052                                 compatible = "atmel,at91sam9g45-ssc";
1053                                 reg = <0xfffa0000 0x4000>;
1054                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
1055                                 pinctrl-names = "default";
1056                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1057                                 clocks = <&ssc1_clk>;
1058                                 clock-names = "pclk";
1059                                 status = "disabled";
1060                         };
1061
1062                         ac97: sound@fffac000 {
1063                                 compatible = "atmel,at91sam9263-ac97c";
1064                                 reg = <0xfffac000 0x4000>;
1065                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
1066                                 pinctrl-names = "default";
1067                                 pinctrl-0 = <&pinctrl_ac97>;
1068                                 clocks = <&ac97_clk>;
1069                                 clock-names = "ac97_clk";
1070                                 status = "disabled";
1071                         };
1072
1073                         adc0: adc@fffb0000 {
1074                                 #address-cells = <1>;
1075                                 #size-cells = <0>;
1076                                 compatible = "atmel,at91sam9g45-adc";
1077                                 reg = <0xfffb0000 0x100>;
1078                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1079                                 clocks = <&adc_clk>, <&adc_op_clk>;
1080                                 clock-names = "adc_clk", "adc_op_clk";
1081                                 atmel,adc-channels-used = <0xff>;
1082                                 atmel,adc-vref = <3300>;
1083                                 atmel,adc-startup-time = <40>;
1084                                 atmel,adc-res = <8 10>;
1085                                 atmel,adc-res-names = "lowres", "highres";
1086                                 atmel,adc-use-res = "highres";
1087
1088                                 trigger0 {
1089                                         trigger-name = "external-rising";
1090                                         trigger-value = <0x1>;
1091                                         trigger-external;
1092                                 };
1093                                 trigger1 {
1094                                         trigger-name = "external-falling";
1095                                         trigger-value = <0x2>;
1096                                         trigger-external;
1097                                 };
1098
1099                                 trigger2 {
1100                                         trigger-name = "external-any";
1101                                         trigger-value = <0x3>;
1102                                         trigger-external;
1103                                 };
1104
1105                                 trigger3 {
1106                                         trigger-name = "continuous";
1107                                         trigger-value = <0x6>;
1108                                 };
1109                         };
1110
1111                         isi@fffb4000 {
1112                                 compatible = "atmel,at91sam9g45-isi";
1113                                 reg = <0xfffb4000 0x4000>;
1114                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1115                                 clocks = <&isi_clk>;
1116                                 clock-names = "isi_clk";
1117                                 status = "disabled";
1118                                 port {
1119                                         #address-cells = <1>;
1120                                         #size-cells = <0>;
1121                                 };
1122                         };
1123
1124                         pwm0: pwm@fffb8000 {
1125                                 compatible = "atmel,at91sam9rl-pwm";
1126                                 reg = <0xfffb8000 0x300>;
1127                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1128                                 #pwm-cells = <3>;
1129                                 clocks = <&pwm_clk>;
1130                                 status = "disabled";
1131                         };
1132
1133                         mmc0: mmc@fff80000 {
1134                                 compatible = "atmel,hsmci";
1135                                 reg = <0xfff80000 0x600>;
1136                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1137                                 pinctrl-names = "default";
1138                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1139                                 dma-names = "rxtx";
1140                                 #address-cells = <1>;
1141                                 #size-cells = <0>;
1142                                 clocks = <&mci0_clk>;
1143                                 clock-names = "mci_clk";
1144                                 status = "disabled";
1145                         };
1146
1147                         mmc1: mmc@fffd0000 {
1148                                 compatible = "atmel,hsmci";
1149                                 reg = <0xfffd0000 0x600>;
1150                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1151                                 pinctrl-names = "default";
1152                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1153                                 dma-names = "rxtx";
1154                                 #address-cells = <1>;
1155                                 #size-cells = <0>;
1156                                 clocks = <&mci1_clk>;
1157                                 clock-names = "mci_clk";
1158                                 status = "disabled";
1159                         };
1160
1161                         watchdog@fffffd40 {
1162                                 compatible = "atmel,at91sam9260-wdt";
1163                                 reg = <0xfffffd40 0x10>;
1164                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1165                                 clocks = <&clk32k>;
1166                                 atmel,watchdog-type = "hardware";
1167                                 atmel,reset-type = "all";
1168                                 atmel,dbg-halt;
1169                                 status = "disabled";
1170                         };
1171
1172                         spi0: spi@fffa4000 {
1173                                 #address-cells = <1>;
1174                                 #size-cells = <0>;
1175                                 compatible = "atmel,at91rm9200-spi";
1176                                 reg = <0xfffa4000 0x200>;
1177                                 interrupts = <14 4 3>;
1178                                 pinctrl-names = "default";
1179                                 pinctrl-0 = <&pinctrl_spi0>;
1180                                 clocks = <&spi0_clk>;
1181                                 clock-names = "spi_clk";
1182                                 status = "disabled";
1183                         };
1184
1185                         spi1: spi@fffa8000 {
1186                                 #address-cells = <1>;
1187                                 #size-cells = <0>;
1188                                 compatible = "atmel,at91rm9200-spi";
1189                                 reg = <0xfffa8000 0x200>;
1190                                 interrupts = <15 4 3>;
1191                                 pinctrl-names = "default";
1192                                 pinctrl-0 = <&pinctrl_spi1>;
1193                                 clocks = <&spi1_clk>;
1194                                 clock-names = "spi_clk";
1195                                 status = "disabled";
1196                         };
1197
1198                         usb2: gadget@fff78000 {
1199                                 #address-cells = <1>;
1200                                 #size-cells = <0>;
1201                                 compatible = "atmel,at91sam9g45-udc";
1202                                 reg = <0x00600000 0x80000
1203                                        0xfff78000 0x400>;
1204                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1205                                 clocks = <&udphs_clk>, <&utmi>;
1206                                 clock-names = "pclk", "hclk";
1207                                 status = "disabled";
1208
1209                                 ep@0 {
1210                                         reg = <0>;
1211                                         atmel,fifo-size = <64>;
1212                                         atmel,nb-banks = <1>;
1213                                 };
1214
1215                                 ep@1 {
1216                                         reg = <1>;
1217                                         atmel,fifo-size = <1024>;
1218                                         atmel,nb-banks = <2>;
1219                                         atmel,can-dma;
1220                                         atmel,can-isoc;
1221                                 };
1222
1223                                 ep@2 {
1224                                         reg = <2>;
1225                                         atmel,fifo-size = <1024>;
1226                                         atmel,nb-banks = <2>;
1227                                         atmel,can-dma;
1228                                         atmel,can-isoc;
1229                                 };
1230
1231                                 ep@3 {
1232                                         reg = <3>;
1233                                         atmel,fifo-size = <1024>;
1234                                         atmel,nb-banks = <3>;
1235                                         atmel,can-dma;
1236                                 };
1237
1238                                 ep@4 {
1239                                         reg = <4>;
1240                                         atmel,fifo-size = <1024>;
1241                                         atmel,nb-banks = <3>;
1242                                         atmel,can-dma;
1243                                 };
1244
1245                                 ep@5 {
1246                                         reg = <5>;
1247                                         atmel,fifo-size = <1024>;
1248                                         atmel,nb-banks = <3>;
1249                                         atmel,can-dma;
1250                                         atmel,can-isoc;
1251                                 };
1252
1253                                 ep@6 {
1254                                         reg = <6>;
1255                                         atmel,fifo-size = <1024>;
1256                                         atmel,nb-banks = <3>;
1257                                         atmel,can-dma;
1258                                         atmel,can-isoc;
1259                                 };
1260                         };
1261
1262                         sckc@fffffd50 {
1263                                 compatible = "atmel,at91sam9x5-sckc";
1264                                 reg = <0xfffffd50 0x4>;
1265
1266                                 slow_osc: slow_osc {
1267                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1268                                         #clock-cells = <0>;
1269                                         atmel,startup-time-usec = <1200000>;
1270                                         clocks = <&slow_xtal>;
1271                                 };
1272
1273                                 slow_rc_osc: slow_rc_osc {
1274                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1275                                         #clock-cells = <0>;
1276                                         atmel,startup-time-usec = <75>;
1277                                         clock-frequency = <32768>;
1278                                         clock-accuracy = <50000000>;
1279                                 };
1280
1281                                 clk32k: slck {
1282                                         compatible = "atmel,at91sam9x5-clk-slow";
1283                                         #clock-cells = <0>;
1284                                         clocks = <&slow_rc_osc &slow_osc>;
1285                                 };
1286                         };
1287
1288                         rtc@fffffd20 {
1289                                 compatible = "atmel,at91sam9260-rtt";
1290                                 reg = <0xfffffd20 0x10>;
1291                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1292                                 clocks = <&clk32k>;
1293                                 status = "disabled";
1294                         };
1295
1296                         rtc@fffffdb0 {
1297                                 compatible = "atmel,at91rm9200-rtc";
1298                                 reg = <0xfffffdb0 0x30>;
1299                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1300                                 clocks = <&clk32k>;
1301                                 status = "disabled";
1302                         };
1303
1304                         gpbr: syscon@fffffd60 {
1305                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
1306                                 reg = <0xfffffd60 0x10>;
1307                                 status = "disabled";
1308                         };
1309                 };
1310
1311                 fb0: fb@500000 {
1312                         compatible = "atmel,at91sam9g45-lcdc";
1313                         reg = <0x00500000 0x1000>;
1314                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1315                         pinctrl-names = "default";
1316                         pinctrl-0 = <&pinctrl_fb>;
1317                         clocks = <&lcd_clk>, <&lcd_clk>;
1318                         clock-names = "hclk", "lcdc_clk";
1319                         status = "disabled";
1320                 };
1321
1322                 usb0: ohci@700000 {
1323                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1324                         reg = <0x00700000 0x100000>;
1325                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1326                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1327                         clock-names = "ohci_clk", "hclk", "uhpck";
1328                         status = "disabled";
1329                 };
1330
1331                 usb1: ehci@800000 {
1332                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1333                         reg = <0x00800000 0x100000>;
1334                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1335                         clocks = <&utmi>, <&uhphs_clk>;
1336                         clock-names = "usb_clk", "ehci_clk";
1337                         status = "disabled";
1338                 };
1339
1340                 ebi: ebi@10000000 {
1341                         compatible = "atmel,at91sam9g45-ebi";
1342                         #address-cells = <2>;
1343                         #size-cells = <1>;
1344                         atmel,smc = <&smc>;
1345                         atmel,matrix = <&matrix>;
1346                         reg = <0x10000000 0x80000000>;
1347                         ranges = <0x0 0x0 0x10000000 0x10000000
1348                                   0x1 0x0 0x20000000 0x10000000
1349                                   0x2 0x0 0x30000000 0x10000000
1350                                   0x3 0x0 0x40000000 0x10000000
1351                                   0x4 0x0 0x50000000 0x10000000
1352                                   0x5 0x0 0x60000000 0x10000000>;
1353                         clocks = <&mck>;
1354                         status = "disabled";
1355
1356                         nand_controller: nand-controller {
1357                                 compatible = "atmel,at91sam9g45-nand-controller";
1358                                 #address-cells = <2>;
1359                                 #size-cells = <1>;
1360                                 ranges;
1361                                 status = "disabled";
1362                         };
1363                 };
1364         };
1365
1366         i2c-gpio-0 {
1367                 compatible = "i2c-gpio";
1368                 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1369                          &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1370                         >;
1371                 i2c-gpio,sda-open-drain;
1372                 i2c-gpio,scl-open-drain;
1373                 i2c-gpio,delay-us = <5>;        /* ~100 kHz */
1374                 #address-cells = <1>;
1375                 #size-cells = <0>;
1376                 status = "disabled";
1377         };
1378 };