2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
43 compatible = "arm,arm926ej-s";
49 reg = <0x20000000 0x04000000>;
53 slow_xtal: slow_xtal {
54 compatible = "fixed-clock";
56 clock-frequency = <0>;
59 main_xtal: main_xtal {
60 compatible = "fixed-clock";
62 clock-frequency = <0>;
65 adc_op_clk: adc_op_clk{
66 compatible = "fixed-clock";
68 clock-frequency = <5000000>;
73 compatible = "mmio-sram";
74 reg = <0x002ff000 0x2000>;
78 compatible = "simple-bus";
84 compatible = "simple-bus";
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <29 30 31>;
97 ramc0: ramc@ffffea00 {
98 compatible = "atmel,at91sam9260-sdramc";
99 reg = <0xffffea00 0x200>;
103 compatible = "atmel,at91sam9260-smc", "syscon";
104 reg = <0xffffec00 0x200>;
107 matrix: matrix@ffffee00 {
108 compatible = "atmel,at91sam9260-matrix", "syscon";
109 reg = <0xffffee00 0x200>;
113 compatible = "atmel,at91sam9260-pmc", "syscon";
114 reg = <0xfffffc00 0x100>;
115 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
117 clocks = <&slow_xtal>, <&main_xtal>;
118 clock-names = "slow_xtal", "main_xtal";
122 compatible = "atmel,at91sam9260-rstc";
123 reg = <0xfffffd00 0x10>;
124 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
128 compatible = "atmel,at91sam9260-shdwc";
129 reg = <0xfffffd10 0x10>;
130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
133 pit: timer@fffffd30 {
134 compatible = "atmel,at91sam9260-pit";
135 reg = <0xfffffd30 0xf>;
136 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
137 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
140 tcb0: timer@fffa0000 {
141 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
142 #address-cells = <1>;
144 reg = <0xfffa0000 0x100>;
145 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
146 18 IRQ_TYPE_LEVEL_HIGH 0
147 19 IRQ_TYPE_LEVEL_HIGH 0>;
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
149 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
152 tcb1: timer@fffdc000 {
153 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
154 #address-cells = <1>;
156 reg = <0xfffdc000 0x100>;
157 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
158 27 IRQ_TYPE_LEVEL_HIGH 0
159 28 IRQ_TYPE_LEVEL_HIGH 0>;
160 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
161 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
165 #address-cells = <1>;
167 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
168 ranges = <0xfffff400 0xfffff400 0x600>;
172 0xffffffff 0xffc00c3b /* pioA */
173 0xffffffff 0x7fff3ccf /* pioB */
174 0xffffffff 0x007fffff /* pioC */
177 /* shared pinctrl settings */
179 pinctrl_dbgu: dbgu-0 {
181 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
182 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
187 pinctrl_usart0: usart0-0 {
189 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
190 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
193 pinctrl_usart0_rts: usart0_rts-0 {
195 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
198 pinctrl_usart0_cts: usart0_cts-0 {
200 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
203 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
205 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
206 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
209 pinctrl_usart0_dcd: usart0_dcd-0 {
211 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
214 pinctrl_usart0_ri: usart0_ri-0 {
216 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
221 pinctrl_usart1: usart1-0 {
223 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
224 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
227 pinctrl_usart1_rts: usart1_rts-0 {
229 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
232 pinctrl_usart1_cts: usart1_cts-0 {
234 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
239 pinctrl_usart2: usart2-0 {
241 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
242 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
245 pinctrl_usart2_rts: usart2_rts-0 {
247 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
250 pinctrl_usart2_cts: usart2_cts-0 {
252 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
257 pinctrl_usart3: usart3-0 {
259 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
260 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
263 pinctrl_usart3_rts: usart3_rts-0 {
265 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
268 pinctrl_usart3_cts: usart3_cts-0 {
270 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
275 pinctrl_uart0: uart0-0 {
277 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
278 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
283 pinctrl_uart1: uart1-0 {
285 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
286 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
291 pinctrl_nand_rb: nand-rb-0 {
293 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
296 pinctrl_nand_cs: nand-cs-0 {
298 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
303 pinctrl_macb_rmii: macb_rmii-0 {
305 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
306 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
307 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
308 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
309 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
310 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
311 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
312 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
313 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
314 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
317 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
319 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
320 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
321 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
322 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
323 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
324 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
325 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
326 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
329 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
331 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
332 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
333 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
334 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
335 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
336 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
337 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
338 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
343 pinctrl_mmc0_clk: mmc0_clk-0 {
345 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
348 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
350 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
351 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
354 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
356 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
357 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
358 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
361 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
363 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
364 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
367 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
369 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
370 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
371 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
376 pinctrl_ssc0_tx: ssc0_tx-0 {
378 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
379 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
380 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
383 pinctrl_ssc0_rx: ssc0_rx-0 {
385 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
386 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
387 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
392 pinctrl_spi0: spi0-0 {
394 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
395 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
396 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
401 pinctrl_spi1: spi1-0 {
403 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
404 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
405 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
410 pinctrl_i2c_gpio0: i2c_gpio0-0 {
412 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
413 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
418 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
419 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
423 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
426 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
427 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
431 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
434 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
435 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
439 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
442 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
443 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
447 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
450 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
451 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
456 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
457 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
460 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
461 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
465 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
469 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
473 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
477 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
481 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
485 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
489 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493 pioA: gpio@fffff400 {
494 compatible = "atmel,at91rm9200-gpio";
495 reg = <0xfffff400 0x200>;
496 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
499 interrupt-controller;
500 #interrupt-cells = <2>;
501 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
504 pioB: gpio@fffff600 {
505 compatible = "atmel,at91rm9200-gpio";
506 reg = <0xfffff600 0x200>;
507 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
510 interrupt-controller;
511 #interrupt-cells = <2>;
512 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
515 pioC: gpio@fffff800 {
516 compatible = "atmel,at91rm9200-gpio";
517 reg = <0xfffff800 0x200>;
518 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
521 interrupt-controller;
522 #interrupt-cells = <2>;
523 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
527 dbgu: serial@fffff200 {
528 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
529 reg = <0xfffff200 0x200>;
530 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_dbgu>;
533 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
534 clock-names = "usart";
538 usart0: serial@fffb0000 {
539 compatible = "atmel,at91sam9260-usart";
540 reg = <0xfffb0000 0x200>;
541 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_usart0>;
546 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
547 clock-names = "usart";
551 usart1: serial@fffb4000 {
552 compatible = "atmel,at91sam9260-usart";
553 reg = <0xfffb4000 0x200>;
554 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
557 pinctrl-names = "default";
558 pinctrl-0 = <&pinctrl_usart1>;
559 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
560 clock-names = "usart";
564 usart2: serial@fffb8000 {
565 compatible = "atmel,at91sam9260-usart";
566 reg = <0xfffb8000 0x200>;
567 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_usart2>;
572 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
573 clock-names = "usart";
577 usart3: serial@fffd0000 {
578 compatible = "atmel,at91sam9260-usart";
579 reg = <0xfffd0000 0x200>;
580 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
583 pinctrl-names = "default";
584 pinctrl-0 = <&pinctrl_usart3>;
585 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
586 clock-names = "usart";
590 uart0: serial@fffd4000 {
591 compatible = "atmel,at91sam9260-usart";
592 reg = <0xfffd4000 0x200>;
593 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_uart0>;
598 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
599 clock-names = "usart";
603 uart1: serial@fffd8000 {
604 compatible = "atmel,at91sam9260-usart";
605 reg = <0xfffd8000 0x200>;
606 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_uart1>;
611 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
612 clock-names = "usart";
616 macb0: ethernet@fffc4000 {
617 compatible = "cdns,at91sam9260-macb", "cdns,macb";
618 reg = <0xfffc4000 0x100>;
619 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_macb_rmii>;
622 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
623 clock-names = "hclk", "pclk";
627 usb1: gadget@fffa4000 {
628 compatible = "atmel,at91sam9260-udc";
629 reg = <0xfffa4000 0x4000>;
630 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
631 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
632 clock-names = "pclk", "hclk";
637 compatible = "atmel,at91sam9260-i2c";
638 reg = <0xfffac000 0x100>;
639 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
640 #address-cells = <1>;
642 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
647 compatible = "atmel,hsmci";
648 reg = <0xfffa8000 0x600>;
649 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
650 #address-cells = <1>;
652 pinctrl-names = "default";
653 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
654 clock-names = "mci_clk";
659 compatible = "atmel,at91rm9200-ssc";
660 reg = <0xfffbc000 0x4000>;
661 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
662 pinctrl-names = "default";
663 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
664 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
665 clock-names = "pclk";
670 #address-cells = <1>;
672 compatible = "atmel,at91rm9200-spi";
673 reg = <0xfffc8000 0x200>;
674 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_spi0>;
677 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
678 clock-names = "spi_clk";
683 #address-cells = <1>;
685 compatible = "atmel,at91rm9200-spi";
686 reg = <0xfffcc000 0x200>;
687 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_spi1>;
690 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
691 clock-names = "spi_clk";
696 #address-cells = <1>;
698 compatible = "atmel,at91sam9260-adc";
699 reg = <0xfffe0000 0x100>;
700 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
701 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
702 clock-names = "adc_clk", "adc_op_clk";
703 atmel,adc-use-external-triggers;
704 atmel,adc-channels-used = <0xf>;
705 atmel,adc-vref = <3300>;
706 atmel,adc-startup-time = <15>;
707 atmel,adc-res = <8 10>;
708 atmel,adc-res-names = "lowres", "highres";
709 atmel,adc-use-res = "highres";
712 trigger-name = "timer-counter-0";
713 trigger-value = <0x1>;
716 trigger-name = "timer-counter-1";
717 trigger-value = <0x3>;
721 trigger-name = "timer-counter-2";
722 trigger-value = <0x5>;
726 trigger-name = "external";
727 trigger-value = <0xd>;
733 compatible = "atmel,at91sam9260-rtt";
734 reg = <0xfffffd20 0x10>;
735 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
736 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
741 compatible = "atmel,at91sam9260-wdt";
742 reg = <0xfffffd40 0x10>;
743 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
744 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
745 atmel,watchdog-type = "hardware";
746 atmel,reset-type = "all";
751 gpbr: syscon@fffffd50 {
752 compatible = "atmel,at91sam9260-gpbr", "syscon";
753 reg = <0xfffffd50 0x10>;
759 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
760 reg = <0x00500000 0x100000>;
761 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
762 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
763 clock-names = "ohci_clk", "hclk", "uhpck";
768 compatible = "atmel,at91sam9260-ebi";
769 #address-cells = <2>;
772 atmel,matrix = <&matrix>;
773 reg = <0x10000000 0x80000000>;
774 ranges = <0x0 0x0 0x10000000 0x10000000
775 0x1 0x0 0x20000000 0x10000000
776 0x2 0x0 0x30000000 0x10000000
777 0x3 0x0 0x40000000 0x10000000
778 0x4 0x0 0x50000000 0x10000000
779 0x5 0x0 0x60000000 0x10000000
780 0x6 0x0 0x70000000 0x10000000
781 0x7 0x0 0x80000000 0x10000000>;
782 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
785 nand_controller: nand-controller {
786 compatible = "atmel,at91sam9260-nand-controller";
787 #address-cells = <2>;
796 compatible = "i2c-gpio";
797 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
798 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
800 i2c-gpio,sda-open-drain;
801 i2c-gpio,scl-open-drain;
802 i2c-gpio,delay-us = <2>; /* ~100 kHz */
803 #address-cells = <1>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&pinctrl_i2c_gpio0>;