2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
8 * Based on at91sam9260.dtsi
10 * Licensed under GPLv2 or later.
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
21 model = "Atmel AT91RM9200 family SoC";
22 compatible = "atmel,at91rm9200";
23 interrupt-parent = <&aic>;
47 compatible = "arm,arm920t";
53 device_type = "memory";
54 reg = <0x20000000 0x04000000>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
72 compatible = "mmio-sram";
73 reg = <0x00200000 0x4000>;
77 compatible = "simple-bus";
83 compatible = "simple-bus";
88 aic: interrupt-controller@fffff000 {
89 #interrupt-cells = <3>;
90 compatible = "atmel,at91rm9200-aic";
92 reg = <0xfffff000 0x200>;
93 atmel,external-irqs = <25 26 27 28 29 30 31>;
96 ramc0: ramc@ffffff00 {
97 compatible = "atmel,at91rm9200-sdramc", "syscon";
98 reg = <0xffffff00 0x100>;
102 compatible = "atmel,at91rm9200-pmc", "syscon";
103 reg = <0xfffffc00 0x100>;
104 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
105 interrupt-controller;
106 #address-cells = <1>;
108 #interrupt-cells = <1>;
111 compatible = "atmel,at91rm9200-clk-main-osc";
113 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
114 clocks = <&main_xtal>;
118 compatible = "atmel,at91rm9200-clk-main";
120 clocks = <&main_osc>;
124 compatible = "atmel,at91rm9200-clk-pll";
126 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
129 atmel,clk-input-range = <1000000 32000000>;
130 #atmel,pll-clk-output-range-cells = <3>;
131 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
132 <150000000 180000000 2>;
136 compatible = "atmel,at91rm9200-clk-pll";
138 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
141 atmel,clk-input-range = <1000000 32000000>;
142 #atmel,pll-clk-output-range-cells = <3>;
143 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
144 <150000000 180000000 2>;
148 compatible = "atmel,at91rm9200-clk-master";
150 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
151 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
152 atmel,clk-output-range = <0 80000000>;
153 atmel,clk-divisors = <1 2 3 4>;
157 compatible = "atmel,at91rm9200-clk-usb";
159 atmel,clk-divisors = <1 2 0 0>;
164 compatible = "atmel,at91rm9200-clk-programmable";
165 #address-cells = <1>;
167 interrupt-parent = <&pmc>;
168 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
173 interrupts = <AT91_PMC_PCKRDY(0)>;
179 interrupts = <AT91_PMC_PCKRDY(1)>;
185 interrupts = <AT91_PMC_PCKRDY(2)>;
191 interrupts = <AT91_PMC_PCKRDY(3)>;
196 compatible = "atmel,at91rm9200-clk-system";
197 #address-cells = <1>;
238 compatible = "atmel,at91rm9200-clk-peripheral";
239 #address-cells = <1>;
263 usart0_clk: usart0_clk {
268 usart1_clk: usart1_clk {
273 usart2_clk: usart2_clk {
278 usart3_clk: usart3_clk {
353 macb0_clk: macb0_clk {
361 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
362 reg = <0xfffffd00 0x100>;
363 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
364 clocks = <&slow_xtal>;
367 compatible = "atmel,at91rm9200-wdt";
372 compatible = "atmel,at91rm9200-rtc";
373 reg = <0xfffffe00 0x40>;
374 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
375 clocks = <&slow_xtal>;
379 tcb0: timer@fffa0000 {
380 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
381 #address-cells = <1>;
383 reg = <0xfffa0000 0x100>;
384 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
385 18 IRQ_TYPE_LEVEL_HIGH 0
386 19 IRQ_TYPE_LEVEL_HIGH 0>;
387 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
388 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
391 tcb1: timer@fffa4000 {
392 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
393 #address-cells = <1>;
395 reg = <0xfffa4000 0x100>;
396 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
397 21 IRQ_TYPE_LEVEL_HIGH 0
398 22 IRQ_TYPE_LEVEL_HIGH 0>;
399 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&slow_xtal>;
400 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
404 compatible = "atmel,at91rm9200-i2c";
405 reg = <0xfffb8000 0x4000>;
406 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_twi>;
409 clocks = <&twi0_clk>;
410 #address-cells = <1>;
416 compatible = "atmel,hsmci";
417 reg = <0xfffb4000 0x4000>;
418 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
419 clocks = <&mci0_clk>;
420 clock-names = "mci_clk";
421 #address-cells = <1>;
423 pinctrl-names = "default";
428 compatible = "atmel,at91rm9200-ssc";
429 reg = <0xfffd0000 0x4000>;
430 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
433 clocks = <&ssc0_clk>;
434 clock-names = "pclk";
439 compatible = "atmel,at91rm9200-ssc";
440 reg = <0xfffd4000 0x4000>;
441 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
444 clocks = <&ssc1_clk>;
445 clock-names = "pclk";
450 compatible = "atmel,at91rm9200-ssc";
451 reg = <0xfffd8000 0x4000>;
452 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
455 clocks = <&ssc2_clk>;
456 clock-names = "pclk";
460 macb0: ethernet@fffbc000 {
461 compatible = "cdns,at91rm9200-emac", "cdns,emac";
462 reg = <0xfffbc000 0x4000>;
463 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
465 pinctrl-names = "default";
466 pinctrl-0 = <&pinctrl_macb_rmii>;
467 clocks = <&macb0_clk>;
468 clock-names = "ether_clk";
473 #address-cells = <1>;
475 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
476 ranges = <0xfffff400 0xfffff400 0x800>;
480 0xffffffff 0xffffffff /* pioA */
481 0xffffffff 0x083fffff /* pioB */
482 0xffff3fff 0x00000000 /* pioC */
483 0x03ff87ff 0x0fffff80 /* pioD */
486 /* shared pinctrl settings */
488 pinctrl_dbgu: dbgu-0 {
490 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
491 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
496 pinctrl_uart0: uart0-0 {
498 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE
499 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
502 pinctrl_uart0_cts: uart0_cts-0 {
504 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
507 pinctrl_uart0_rts: uart0_rts-0 {
509 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
514 pinctrl_uart1: uart1-0 {
516 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
517 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
520 pinctrl_uart1_rts: uart1_rts-0 {
522 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
525 pinctrl_uart1_cts: uart1_cts-0 {
527 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
530 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
532 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
533 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
536 pinctrl_uart1_dcd: uart1_dcd-0 {
538 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
541 pinctrl_uart1_ri: uart1_ri-0 {
543 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
548 pinctrl_uart2: uart2-0 {
550 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
551 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
554 pinctrl_uart2_rts: uart2_rts-0 {
556 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
559 pinctrl_uart2_cts: uart2_cts-0 {
561 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
566 pinctrl_uart3: uart3-0 {
568 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
569 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
572 pinctrl_uart3_rts: uart3_rts-0 {
574 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
577 pinctrl_uart3_cts: uart3_cts-0 {
579 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
584 pinctrl_nand: nand-0 {
586 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
587 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
592 pinctrl_macb_rmii: macb_rmii-0 {
594 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
595 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
596 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
597 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
598 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
599 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
600 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
601 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
602 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
603 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
606 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
608 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
609 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
610 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
611 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
612 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
613 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
614 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
615 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
620 pinctrl_mmc0_clk: mmc0_clk-0 {
622 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
625 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
627 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
628 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
631 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
633 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
634 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
635 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
638 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
640 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
641 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
644 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
646 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
647 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
648 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
653 pinctrl_ssc0_tx: ssc0_tx-0 {
655 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
656 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
657 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
660 pinctrl_ssc0_rx: ssc0_rx-0 {
662 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
663 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
664 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
669 pinctrl_ssc1_tx: ssc1_tx-0 {
671 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
672 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
673 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
676 pinctrl_ssc1_rx: ssc1_rx-0 {
678 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
679 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
680 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
685 pinctrl_ssc2_tx: ssc2_tx-0 {
687 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
688 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
689 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
692 pinctrl_ssc2_rx: ssc2_rx-0 {
694 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
695 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
696 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
703 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
704 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
707 pinctrl_twi_gpio: twi_gpio-0 {
709 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
710 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
715 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
716 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
719 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
720 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
723 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
724 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
727 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
728 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
731 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
732 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
735 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
736 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
739 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
740 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
743 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
744 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
747 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
748 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
753 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
754 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
757 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
758 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
761 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
762 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
765 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
766 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
769 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
770 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
773 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
774 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
777 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
778 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
781 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
782 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
785 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
786 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
791 pinctrl_spi0: spi0-0 {
793 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
794 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
795 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
799 pioA: gpio@fffff400 {
800 compatible = "atmel,at91rm9200-gpio";
801 reg = <0xfffff400 0x200>;
802 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
805 interrupt-controller;
806 #interrupt-cells = <2>;
807 clocks = <&pioA_clk>;
810 pioB: gpio@fffff600 {
811 compatible = "atmel,at91rm9200-gpio";
812 reg = <0xfffff600 0x200>;
813 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
816 interrupt-controller;
817 #interrupt-cells = <2>;
818 clocks = <&pioB_clk>;
821 pioC: gpio@fffff800 {
822 compatible = "atmel,at91rm9200-gpio";
823 reg = <0xfffff800 0x200>;
824 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
827 interrupt-controller;
828 #interrupt-cells = <2>;
829 clocks = <&pioC_clk>;
832 pioD: gpio@fffffa00 {
833 compatible = "atmel,at91rm9200-gpio";
834 reg = <0xfffffa00 0x200>;
835 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
838 interrupt-controller;
839 #interrupt-cells = <2>;
840 clocks = <&pioD_clk>;
844 dbgu: serial@fffff200 {
845 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
846 reg = <0xfffff200 0x200>;
847 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&pinctrl_dbgu>;
851 clock-names = "usart";
855 usart0: serial@fffc0000 {
856 compatible = "atmel,at91rm9200-usart";
857 reg = <0xfffc0000 0x200>;
858 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
861 pinctrl-names = "default";
862 pinctrl-0 = <&pinctrl_uart0>;
863 clocks = <&usart0_clk>;
864 clock-names = "usart";
868 usart1: serial@fffc4000 {
869 compatible = "atmel,at91rm9200-usart";
870 reg = <0xfffc4000 0x200>;
871 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
874 pinctrl-names = "default";
875 pinctrl-0 = <&pinctrl_uart1>;
876 clocks = <&usart1_clk>;
877 clock-names = "usart";
881 usart2: serial@fffc8000 {
882 compatible = "atmel,at91rm9200-usart";
883 reg = <0xfffc8000 0x200>;
884 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_uart2>;
889 clocks = <&usart2_clk>;
890 clock-names = "usart";
894 usart3: serial@fffcc000 {
895 compatible = "atmel,at91rm9200-usart";
896 reg = <0xfffcc000 0x200>;
897 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
900 pinctrl-names = "default";
901 pinctrl-0 = <&pinctrl_uart3>;
902 clocks = <&usart3_clk>;
903 clock-names = "usart";
907 usb1: gadget@fffb0000 {
908 compatible = "atmel,at91rm9200-udc";
909 reg = <0xfffb0000 0x4000>;
910 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
911 clocks = <&udc_clk>, <&udpck>;
912 clock-names = "pclk", "hclk";
917 #address-cells = <1>;
919 compatible = "atmel,at91rm9200-spi";
920 reg = <0xfffe0000 0x200>;
921 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
922 pinctrl-names = "default";
923 pinctrl-0 = <&pinctrl_spi0>;
924 clocks = <&spi0_clk>;
925 clock-names = "spi_clk";
930 nand0: nand@40000000 {
931 compatible = "atmel,at91rm9200-nand";
932 #address-cells = <1>;
934 reg = <0x40000000 0x10000000>;
935 atmel,nand-addr-offset = <21>;
936 atmel,nand-cmd-offset = <22>;
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_nand>;
939 nand-ecc-mode = "soft";
940 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
942 &pioB 1 GPIO_ACTIVE_HIGH
948 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
949 reg = <0x00300000 0x100000>;
950 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
951 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
952 clock-names = "ohci_clk", "hclk", "uhpck";
958 compatible = "i2c-gpio";
959 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
960 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
962 i2c-gpio,sda-open-drain;
963 i2c-gpio,scl-open-drain;
964 i2c-gpio,delay-us = <2>; /* ~100 kHz */
965 pinctrl-names = "default";
966 pinctrl-0 = <&pinctrl_twi_gpio>;
967 #address-cells = <1>;