arch/arm/boot/dts/aspeed-g6.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 // Copyright 2019 IBM Corp.
   3
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/clock/ast2600-clock.h>
   6
   7 / {
   8         model = "Aspeed BMC";
   9         compatible = "aspeed,ast2600";
  10         #address-cells = <1>;
  11         #size-cells = <1>;
  12         interrupt-parent = <&gic>;
  13
  14         aliases {
  15                 serial4 = &uart5;
  16         };
  17
  18
  19         cpus {
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22                 enable-method = "aspeed,ast2600-smp";
  23
  24                 cpu@f00 {
  25                         compatible = "arm,cortex-a7";
  26                         device_type = "cpu";
  27                         reg = <0xf00>;
  28                 };
  29
  30                 cpu@f01 {
  31                         compatible = "arm,cortex-a7";
  32                         device_type = "cpu";
  33                         reg = <0xf01>;
  34                 };
  35         };
  36
  37         timer {
  38                 compatible = "arm,armv7-timer";
  39                 interrupt-parent = <&gic>;
  40                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  41                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  42                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  43                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  44                 clocks = <&syscon ASPEED_CLK_HPLL>;
  45                 arm,cpu-registers-not-fw-configured;
  46         };
  47
  48         ahb {
  49                 compatible = "simple-bus";
  50                 #address-cells = <1>;
  51                 #size-cells = <1>;
  52                 device_type = "soc";
  53                 ranges;
  54
  55                 gic: interrupt-controller@40461000 {
  56                         compatible = "arm,cortex-a7-gic";
  57                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  58                         #interrupt-cells = <3>;
  59                         interrupt-controller;
  60                         interrupt-parent = <&gic>;
  61                         reg = <0x40461000 0x1000>,
  62                             <0x40462000 0x1000>,
  63                             <0x40464000 0x2000>,
  64                             <0x40466000 0x2000>;
  65                         };
  66
  67                 mdio0: mdio@1e650000 {
  68                         compatible = "aspeed,ast2600-mdio";
  69                         reg = <0x1e650000 0x8>;
  70                         #address-cells = <1>;
  71                         #size-cells = <0>;
  72                         status = "disabled";
  73                 };
  74
  75                 mdio1: mdio@1e650008 {
  76                         compatible = "aspeed,ast2600-mdio";
  77                         reg = <0x1e650008 0x8>;
  78                         #address-cells = <1>;
  79                         #size-cells = <0>;
  80                         status = "disabled";
  81                 };
  82
  83                 mdio2: mdio@1e650010 {
  84                         compatible = "aspeed,ast2600-mdio";
  85                         reg = <0x1e650010 0x8>;
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         status = "disabled";
  89                 };
  90
  91                 mdio3: mdio@1e650018 {
  92                         compatible = "aspeed,ast2600-mdio";
  93                         reg = <0x1e650018 0x8>;
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                         status = "disabled";
  97                 };
  98
  99                 mac0: ftgmac@1e660000 {
 100                         compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
 101                         reg = <0x1e660000 0x180>;
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 105                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 106                         status = "disabled";
 107                 };
 108
 109                 mac1: ftgmac@1e680000 {
 110                         compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
 111                         reg = <0x1e680000 0x180>;
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 115                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 116                         status = "disabled";
 117                 };
 118
 119                 mac2: ftgmac@1e670000 {
 120                         compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
 121                         reg = <0x1e670000 0x180>;
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 125                         clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
 126                         status = "disabled";
 127                 };
 128
 129                 mac3: ftgmac@1e690000 {
 130                         compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
 131                         reg = <0x1e690000 0x180>;
 132                         #address-cells = <1>;
 133                         #size-cells = <0>;
 134                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 135                         clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
 136                         status = "disabled";
 137                 };
 138
 139                 apb {
 140                         compatible = "simple-bus";
 141                         #address-cells = <1>;
 142                         #size-cells = <1>;
 143                         ranges;
 144
 145                         syscon: syscon@1e6e2000 {
 146                                 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
 147                                 reg = <0x1e6e2000 0x1000>;
 148                                 ranges = <0 0x1e6e2000 0x1000>;
 149                                 #address-cells = <1>;
 150                                 #size-cells = <1>;
 151                                 #clock-cells = <1>;
 152                                 #reset-cells = <1>;
 153
 154                                 pinctrl: pinctrl {
 155                                         compatible = "aspeed,ast2600-pinctrl";
 156                                 };
 157
 158                                 smp-memram@180 {
 159                                         compatible = "aspeed,ast2600-smpmem";
 160                                         reg = <0x180 0x40>;
 161                                 };
 162                         };
 163
 164                         rng: hwrng@1e6e2524 {
 165                                 compatible = "timeriomem_rng";
 166                                 reg = <0x1e6e2524 0x4>;
 167                                 period = <1>;
 168                                 quality = <100>;
 169                         };
 170
 171                         rtc: rtc@1e781000 {
 172                                 compatible = "aspeed,ast2600-rtc";
 173                                 reg = <0x1e781000 0x18>;
 174                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 175                                 status = "disabled";
 176                         };
 177
 178                         uart5: serial@1e784000 {
 179                                 compatible = "ns16550a";
 180                                 reg = <0x1e784000 0x1000>;
 181                                 reg-shift = <2>;
 182                                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 183                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 184                                 no-loopback-test;
 185                         };
 186
 187                         wdt1: watchdog@1e785000 {
 188                                 compatible = "aspeed,ast2600-wdt";
 189                                 reg = <0x1e785000 0x40>;
 190                         };
 191
 192                         wdt2: watchdog@1e785040 {
 193                                 compatible = "aspeed,ast2600-wdt";
 194                                 reg = <0x1e785040 0x40>;
 195                                 status = "disabled";
 196                         };
 197
 198                         wdt3: watchdog@1e785080 {
 199                                 compatible = "aspeed,ast2600-wdt";
 200                                 reg = <0x1e785080 0x40>;
 201                                 status = "disabled";
 202                         };
 203
 204                         wdt4: watchdog@1e7850C0 {
 205                                 compatible = "aspeed,ast2600-wdt";
 206                                 reg = <0x1e7850C0 0x40>;
 207                                 status = "disabled";
 208                         };
 209
 210                         sdc: sdc@1e740000 {
 211                                 compatible = "aspeed,ast2600-sd-controller";
 212                                 reg = <0x1e740000 0x100>;
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0x1e740000 0x10000>;
 216                                 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
 217                                 status = "disabled";
 218
 219                                 sdhci0: sdhci@1e740100 {
 220                                         compatible = "aspeed,ast2600-sdhci", "sdhci";
 221                                         reg = <0x100 0x100>;
 222                                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 223                                         sdhci,auto-cmd12;
 224                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 225                                         status = "disabled";
 226                                 };
 227
 228                                 sdhci1: sdhci@1e740200 {
 229                                         compatible = "aspeed,ast2600-sdhci", "sdhci";
 230                                         reg = <0x200 0x100>;
 231                                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 232                                         sdhci,auto-cmd12;
 233                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 234                                         status = "disabled";
 235                                 };
 236                         };
 237
 238                         emmc: sdc@1e750000 {
 239                                 compatible = "aspeed,ast2600-sd-controller";
 240                                 reg = <0x1e750000 0x100>;
 241                                 #address-cells = <1>;
 242                                 #size-cells = <1>;
 243                                 ranges = <0 0x1e750000 0x10000>;
 244                                 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
 245                                 status = "disabled";
 246
 247                                 sdhci@1e750100 {
 248                                         compatible = "aspeed,ast2600-sdhci";
 249                                         reg = <0x100 0x100>;
 250                                         sdhci,auto-cmd12;
 251                                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 252                                         clocks = <&syscon ASPEED_CLK_EMMC>;
 253                                         pinctrl-names = "default";
 254                                         pinctrl-0 = <&pinctrl_emmc_default>;
 255                                 };
 256                         };
 257                 };
 258         };
 259 };
 260
 261 #include "aspeed-g6-pinctrl.dtsi"