1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
51 compatible = "simple-bus";
56 fmc: flash-controller@1e620000 {
57 reg = < 0x1e620000 0xc4
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2500-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 compatible = "jedec,spi-nor";
77 compatible = "jedec,spi-nor";
82 spi1: flash-controller@1e630000 {
83 reg = < 0x1e630000 0xc4
84 0x30000000 0x08000000 >;
87 compatible = "aspeed,ast2500-spi";
88 clocks = <&syscon ASPEED_CLK_AHB>;
92 compatible = "jedec,spi-nor";
97 compatible = "jedec,spi-nor";
102 spi2: flash-controller@1e631000 {
103 reg = < 0x1e631000 0xc4
104 0x38000000 0x08000000 >;
105 #address-cells = <1>;
107 compatible = "aspeed,ast2500-spi";
108 clocks = <&syscon ASPEED_CLK_AHB>;
112 compatible = "jedec,spi-nor";
117 compatible = "jedec,spi-nor";
122 vic: interrupt-controller@1e6c0080 {
123 compatible = "aspeed,ast2400-vic";
124 interrupt-controller;
125 #interrupt-cells = <1>;
126 valid-sources = <0xfefff7ff 0x0807ffff>;
127 reg = <0x1e6c0080 0x80>;
130 cvic: copro-interrupt-controller@1e6c2000 {
131 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
132 valid-sources = <0xffffffff>;
133 copro-sw-interrupts = <1>;
134 reg = <0x1e6c2000 0x80>;
137 mac0: ethernet@1e660000 {
138 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
139 reg = <0x1e660000 0x180>;
141 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
145 mac1: ethernet@1e680000 {
146 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
147 reg = <0x1e680000 0x180>;
149 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
153 ehci0: usb@1e6a1000 {
154 compatible = "aspeed,ast2500-ehci", "generic-ehci";
155 reg = <0x1e6a1000 0x100>;
157 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_usb2ah_default>;
163 ehci1: usb@1e6a3000 {
164 compatible = "aspeed,ast2500-ehci", "generic-ehci";
165 reg = <0x1e6a3000 0x100>;
167 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_usb2bh_default>;
174 compatible = "aspeed,ast2500-uhci", "generic-uhci";
175 reg = <0x1e6b0000 0x100>;
178 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
181 * No default pinmux, it will follow EHCI, use an explicit pinmux
182 * override if you don't enable EHCI
186 vhub: usb-vhub@1e6a0000 {
187 compatible = "aspeed,ast2500-usb-vhub";
188 reg = <0x1e6a0000 0x300>;
190 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usb2ad_default>;
197 compatible = "simple-bus";
198 #address-cells = <1>;
202 syscon: syscon@1e6e2000 {
203 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
204 reg = <0x1e6e2000 0x1a8>;
205 #address-cells = <1>;
211 compatible = "aspeed,g5-pinctrl";
212 aspeed,external-nodes = <&gfx &lhc>;
217 rng: hwrng@1e6e2078 {
218 compatible = "timeriomem_rng";
219 reg = <0x1e6e2078 0x4>;
224 gfx: display@1e6e6000 {
225 compatible = "aspeed,ast2500-gfx", "syscon";
226 reg = <0x1e6e6000 0x1000>;
231 compatible = "aspeed,ast2500-adc";
232 reg = <0x1e6e9000 0xb0>;
233 clocks = <&syscon ASPEED_CLK_APB>;
234 resets = <&syscon ASPEED_RESET_ADC>;
235 #io-channel-cells = <1>;
239 sram: sram@1e720000 {
240 compatible = "mmio-sram";
241 reg = <0x1e720000 0x9000>; // 36K
244 gpio: gpio@1e780000 {
247 compatible = "aspeed,ast2500-gpio";
248 reg = <0x1e780000 0x1000>;
250 gpio-ranges = <&pinctrl 0 0 220>;
251 clocks = <&syscon ASPEED_CLK_APB>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
256 timer: timer@1e782000 {
257 /* This timer is a Faraday FTTMR010 derivative */
258 compatible = "aspeed,ast2400-timer";
259 reg = <0x1e782000 0x90>;
260 interrupts = <16 17 18 35 36 37 38 39>;
261 clocks = <&syscon ASPEED_CLK_APB>;
262 clock-names = "PCLK";
265 uart1: serial@1e783000 {
266 compatible = "ns16550a";
267 reg = <0x1e783000 0x20>;
270 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
271 resets = <&lpc_reset 4>;
276 uart5: serial@1e784000 {
277 compatible = "ns16550a";
278 reg = <0x1e784000 0x20>;
281 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
286 wdt1: watchdog@1e785000 {
287 compatible = "aspeed,ast2500-wdt";
288 reg = <0x1e785000 0x20>;
289 clocks = <&syscon ASPEED_CLK_APB>;
292 wdt2: watchdog@1e785020 {
293 compatible = "aspeed,ast2500-wdt";
294 reg = <0x1e785020 0x20>;
295 clocks = <&syscon ASPEED_CLK_APB>;
298 wdt3: watchdog@1e785040 {
299 compatible = "aspeed,ast2500-wdt";
300 reg = <0x1e785040 0x20>;
301 clocks = <&syscon ASPEED_CLK_APB>;
305 pwm_tacho: pwm-tacho-controller@1e786000 {
306 compatible = "aspeed,ast2500-pwm-tacho";
307 #address-cells = <1>;
309 reg = <0x1e786000 0x1000>;
310 clocks = <&syscon ASPEED_CLK_24M>;
311 resets = <&syscon ASPEED_RESET_PWM>;
315 vuart: serial@1e787000 {
316 compatible = "aspeed,ast2500-vuart";
317 reg = <0x1e787000 0x40>;
320 clocks = <&syscon ASPEED_CLK_APB>;
326 compatible = "aspeed,ast2500-lpc", "simple-mfd";
327 reg = <0x1e789000 0x1000>;
329 #address-cells = <1>;
331 ranges = <0x0 0x1e789000 0x1000>;
334 compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
338 #address-cells = <1>;
340 ranges = <0x0 0x0 0x80>;
343 compatible = "aspeed,ast2500-kcs-bmc";
349 compatible = "aspeed,ast2500-kcs-bmc";
355 compatible = "aspeed,ast2500-kcs-bmc";
362 lpc_host: lpc-host@80 {
363 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
367 #address-cells = <1>;
369 ranges = <0x0 0x80 0x1e0>;
372 compatible = "aspeed,ast2500-kcs-bmc";
378 lpc_ctrl: lpc-ctrl@0 {
379 compatible = "aspeed,ast2500-lpc-ctrl";
381 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
385 lpc_snoop: lpc-snoop@0 {
386 compatible = "aspeed,ast2500-lpc-snoop";
393 compatible = "aspeed,ast2500-lhc";
394 reg = <0x20 0x24 0x48 0x8>;
397 lpc_reset: reset-controller@18 {
398 compatible = "aspeed,ast2500-lpc-reset";
404 compatible = "aspeed,ast2500-ibt-bmc";
412 uart2: serial@1e78d000 {
413 compatible = "ns16550a";
414 reg = <0x1e78d000 0x20>;
417 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
418 resets = <&lpc_reset 5>;
423 uart3: serial@1e78e000 {
424 compatible = "ns16550a";
425 reg = <0x1e78e000 0x20>;
428 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
429 resets = <&lpc_reset 6>;
434 uart4: serial@1e78f000 {
435 compatible = "ns16550a";
436 reg = <0x1e78f000 0x20>;
439 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
440 resets = <&lpc_reset 7>;
446 compatible = "simple-bus";
447 #address-cells = <1>;
449 ranges = <0 0x1e78a000 0x1000>;
456 i2c_ic: interrupt-controller@0 {
457 #interrupt-cells = <1>;
458 compatible = "aspeed,ast2500-i2c-ic";
461 interrupt-controller;
465 #address-cells = <1>;
467 #interrupt-cells = <1>;
470 compatible = "aspeed,ast2500-i2c-bus";
471 clocks = <&syscon ASPEED_CLK_APB>;
472 resets = <&syscon ASPEED_RESET_I2C>;
473 bus-frequency = <100000>;
475 interrupt-parent = <&i2c_ic>;
477 /* Does not need pinctrl properties */
481 #address-cells = <1>;
483 #interrupt-cells = <1>;
486 compatible = "aspeed,ast2500-i2c-bus";
487 clocks = <&syscon ASPEED_CLK_APB>;
488 resets = <&syscon ASPEED_RESET_I2C>;
489 bus-frequency = <100000>;
491 interrupt-parent = <&i2c_ic>;
493 /* Does not need pinctrl properties */
497 #address-cells = <1>;
499 #interrupt-cells = <1>;
502 compatible = "aspeed,ast2500-i2c-bus";
503 clocks = <&syscon ASPEED_CLK_APB>;
504 resets = <&syscon ASPEED_RESET_I2C>;
505 bus-frequency = <100000>;
507 interrupt-parent = <&i2c_ic>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_i2c3_default>;
514 #address-cells = <1>;
516 #interrupt-cells = <1>;
519 compatible = "aspeed,ast2500-i2c-bus";
520 clocks = <&syscon ASPEED_CLK_APB>;
521 resets = <&syscon ASPEED_RESET_I2C>;
522 bus-frequency = <100000>;
524 interrupt-parent = <&i2c_ic>;
525 pinctrl-names = "default";
526 pinctrl-0 = <&pinctrl_i2c4_default>;
531 #address-cells = <1>;
533 #interrupt-cells = <1>;
536 compatible = "aspeed,ast2500-i2c-bus";
537 clocks = <&syscon ASPEED_CLK_APB>;
538 resets = <&syscon ASPEED_RESET_I2C>;
539 bus-frequency = <100000>;
541 interrupt-parent = <&i2c_ic>;
542 pinctrl-names = "default";
543 pinctrl-0 = <&pinctrl_i2c5_default>;
548 #address-cells = <1>;
550 #interrupt-cells = <1>;
553 compatible = "aspeed,ast2500-i2c-bus";
554 clocks = <&syscon ASPEED_CLK_APB>;
555 resets = <&syscon ASPEED_RESET_I2C>;
556 bus-frequency = <100000>;
558 interrupt-parent = <&i2c_ic>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_i2c6_default>;
565 #address-cells = <1>;
567 #interrupt-cells = <1>;
570 compatible = "aspeed,ast2500-i2c-bus";
571 clocks = <&syscon ASPEED_CLK_APB>;
572 resets = <&syscon ASPEED_RESET_I2C>;
573 bus-frequency = <100000>;
575 interrupt-parent = <&i2c_ic>;
576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_i2c7_default>;
582 #address-cells = <1>;
584 #interrupt-cells = <1>;
587 compatible = "aspeed,ast2500-i2c-bus";
588 clocks = <&syscon ASPEED_CLK_APB>;
589 resets = <&syscon ASPEED_RESET_I2C>;
590 bus-frequency = <100000>;
592 interrupt-parent = <&i2c_ic>;
593 pinctrl-names = "default";
594 pinctrl-0 = <&pinctrl_i2c8_default>;
599 #address-cells = <1>;
601 #interrupt-cells = <1>;
604 compatible = "aspeed,ast2500-i2c-bus";
605 clocks = <&syscon ASPEED_CLK_APB>;
606 resets = <&syscon ASPEED_RESET_I2C>;
607 bus-frequency = <100000>;
609 interrupt-parent = <&i2c_ic>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_i2c9_default>;
616 #address-cells = <1>;
618 #interrupt-cells = <1>;
621 compatible = "aspeed,ast2500-i2c-bus";
622 clocks = <&syscon ASPEED_CLK_APB>;
623 resets = <&syscon ASPEED_RESET_I2C>;
624 bus-frequency = <100000>;
626 interrupt-parent = <&i2c_ic>;
627 pinctrl-names = "default";
628 pinctrl-0 = <&pinctrl_i2c10_default>;
633 #address-cells = <1>;
635 #interrupt-cells = <1>;
638 compatible = "aspeed,ast2500-i2c-bus";
639 clocks = <&syscon ASPEED_CLK_APB>;
640 resets = <&syscon ASPEED_RESET_I2C>;
641 bus-frequency = <100000>;
643 interrupt-parent = <&i2c_ic>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_i2c11_default>;
650 #address-cells = <1>;
652 #interrupt-cells = <1>;
655 compatible = "aspeed,ast2500-i2c-bus";
656 clocks = <&syscon ASPEED_CLK_APB>;
657 resets = <&syscon ASPEED_RESET_I2C>;
658 bus-frequency = <100000>;
660 interrupt-parent = <&i2c_ic>;
661 pinctrl-names = "default";
662 pinctrl-0 = <&pinctrl_i2c12_default>;
667 #address-cells = <1>;
669 #interrupt-cells = <1>;
672 compatible = "aspeed,ast2500-i2c-bus";
673 clocks = <&syscon ASPEED_CLK_APB>;
674 resets = <&syscon ASPEED_RESET_I2C>;
675 bus-frequency = <100000>;
677 interrupt-parent = <&i2c_ic>;
678 pinctrl-names = "default";
679 pinctrl-0 = <&pinctrl_i2c13_default>;
684 #address-cells = <1>;
686 #interrupt-cells = <1>;
689 compatible = "aspeed,ast2500-i2c-bus";
690 clocks = <&syscon ASPEED_CLK_APB>;
691 resets = <&syscon ASPEED_RESET_I2C>;
692 bus-frequency = <100000>;
694 interrupt-parent = <&i2c_ic>;
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_i2c14_default>;
702 pinctrl_acpi_default: acpi_default {
707 pinctrl_adc0_default: adc0_default {
712 pinctrl_adc1_default: adc1_default {
717 pinctrl_adc10_default: adc10_default {
722 pinctrl_adc11_default: adc11_default {
727 pinctrl_adc12_default: adc12_default {
732 pinctrl_adc13_default: adc13_default {
737 pinctrl_adc14_default: adc14_default {
742 pinctrl_adc15_default: adc15_default {
747 pinctrl_adc2_default: adc2_default {
752 pinctrl_adc3_default: adc3_default {
757 pinctrl_adc4_default: adc4_default {
762 pinctrl_adc5_default: adc5_default {
767 pinctrl_adc6_default: adc6_default {
772 pinctrl_adc7_default: adc7_default {
777 pinctrl_adc8_default: adc8_default {
782 pinctrl_adc9_default: adc9_default {
787 pinctrl_bmcint_default: bmcint_default {
792 pinctrl_ddcclk_default: ddcclk_default {
797 pinctrl_ddcdat_default: ddcdat_default {
802 pinctrl_espi_default: espi_default {
807 pinctrl_fwspics1_default: fwspics1_default {
808 function = "FWSPICS1";
812 pinctrl_fwspics2_default: fwspics2_default {
813 function = "FWSPICS2";
817 pinctrl_gpid0_default: gpid0_default {
822 pinctrl_gpid2_default: gpid2_default {
827 pinctrl_gpid4_default: gpid4_default {
832 pinctrl_gpid6_default: gpid6_default {
837 pinctrl_gpie0_default: gpie0_default {
842 pinctrl_gpie2_default: gpie2_default {
847 pinctrl_gpie4_default: gpie4_default {
852 pinctrl_gpie6_default: gpie6_default {
857 pinctrl_i2c10_default: i2c10_default {
862 pinctrl_i2c11_default: i2c11_default {
867 pinctrl_i2c12_default: i2c12_default {
872 pinctrl_i2c13_default: i2c13_default {
877 pinctrl_i2c14_default: i2c14_default {
882 pinctrl_i2c3_default: i2c3_default {
887 pinctrl_i2c4_default: i2c4_default {
892 pinctrl_i2c5_default: i2c5_default {
897 pinctrl_i2c6_default: i2c6_default {
902 pinctrl_i2c7_default: i2c7_default {
907 pinctrl_i2c8_default: i2c8_default {
912 pinctrl_i2c9_default: i2c9_default {
917 pinctrl_lad0_default: lad0_default {
922 pinctrl_lad1_default: lad1_default {
927 pinctrl_lad2_default: lad2_default {
932 pinctrl_lad3_default: lad3_default {
937 pinctrl_lclk_default: lclk_default {
942 pinctrl_lframe_default: lframe_default {
947 pinctrl_lpchc_default: lpchc_default {
952 pinctrl_lpcpd_default: lpcpd_default {
957 pinctrl_lpcplus_default: lpcplus_default {
958 function = "LPCPLUS";
962 pinctrl_lpcpme_default: lpcpme_default {
967 pinctrl_lpcrst_default: lpcrst_default {
972 pinctrl_lpcsmi_default: lpcsmi_default {
977 pinctrl_lsirq_default: lsirq_default {
982 pinctrl_mac1link_default: mac1link_default {
983 function = "MAC1LINK";
987 pinctrl_mac2link_default: mac2link_default {
988 function = "MAC2LINK";
992 pinctrl_mdio1_default: mdio1_default {
997 pinctrl_mdio2_default: mdio2_default {
1002 pinctrl_ncts1_default: ncts1_default {
1007 pinctrl_ncts2_default: ncts2_default {
1012 pinctrl_ncts3_default: ncts3_default {
1017 pinctrl_ncts4_default: ncts4_default {
1022 pinctrl_ndcd1_default: ndcd1_default {
1027 pinctrl_ndcd2_default: ndcd2_default {
1032 pinctrl_ndcd3_default: ndcd3_default {
1037 pinctrl_ndcd4_default: ndcd4_default {
1042 pinctrl_ndsr1_default: ndsr1_default {
1047 pinctrl_ndsr2_default: ndsr2_default {
1052 pinctrl_ndsr3_default: ndsr3_default {
1057 pinctrl_ndsr4_default: ndsr4_default {
1062 pinctrl_ndtr1_default: ndtr1_default {
1067 pinctrl_ndtr2_default: ndtr2_default {
1072 pinctrl_ndtr3_default: ndtr3_default {
1077 pinctrl_ndtr4_default: ndtr4_default {
1082 pinctrl_nri1_default: nri1_default {
1087 pinctrl_nri2_default: nri2_default {
1092 pinctrl_nri3_default: nri3_default {
1097 pinctrl_nri4_default: nri4_default {
1102 pinctrl_nrts1_default: nrts1_default {
1107 pinctrl_nrts2_default: nrts2_default {
1112 pinctrl_nrts3_default: nrts3_default {
1117 pinctrl_nrts4_default: nrts4_default {
1122 pinctrl_oscclk_default: oscclk_default {
1123 function = "OSCCLK";
1127 pinctrl_pewake_default: pewake_default {
1128 function = "PEWAKE";
1132 pinctrl_pnor_default: pnor_default {
1137 pinctrl_pwm0_default: pwm0_default {
1142 pinctrl_pwm1_default: pwm1_default {
1147 pinctrl_pwm2_default: pwm2_default {
1152 pinctrl_pwm3_default: pwm3_default {
1157 pinctrl_pwm4_default: pwm4_default {
1162 pinctrl_pwm5_default: pwm5_default {
1167 pinctrl_pwm6_default: pwm6_default {
1172 pinctrl_pwm7_default: pwm7_default {
1177 pinctrl_rgmii1_default: rgmii1_default {
1178 function = "RGMII1";
1182 pinctrl_rgmii2_default: rgmii2_default {
1183 function = "RGMII2";
1187 pinctrl_rmii1_default: rmii1_default {
1192 pinctrl_rmii2_default: rmii2_default {
1197 pinctrl_rxd1_default: rxd1_default {
1202 pinctrl_rxd2_default: rxd2_default {
1207 pinctrl_rxd3_default: rxd3_default {
1212 pinctrl_rxd4_default: rxd4_default {
1217 pinctrl_salt1_default: salt1_default {
1222 pinctrl_salt10_default: salt10_default {
1223 function = "SALT10";
1227 pinctrl_salt11_default: salt11_default {
1228 function = "SALT11";
1232 pinctrl_salt12_default: salt12_default {
1233 function = "SALT12";
1237 pinctrl_salt13_default: salt13_default {
1238 function = "SALT13";
1242 pinctrl_salt14_default: salt14_default {
1243 function = "SALT14";
1247 pinctrl_salt2_default: salt2_default {
1252 pinctrl_salt3_default: salt3_default {
1257 pinctrl_salt4_default: salt4_default {
1262 pinctrl_salt5_default: salt5_default {
1267 pinctrl_salt6_default: salt6_default {
1272 pinctrl_salt7_default: salt7_default {
1277 pinctrl_salt8_default: salt8_default {
1282 pinctrl_salt9_default: salt9_default {
1287 pinctrl_scl1_default: scl1_default {
1292 pinctrl_scl2_default: scl2_default {
1297 pinctrl_sd1_default: sd1_default {
1302 pinctrl_sd2_default: sd2_default {
1307 pinctrl_sda1_default: sda1_default {
1312 pinctrl_sda2_default: sda2_default {
1317 pinctrl_sgps1_default: sgps1_default {
1322 pinctrl_sgps2_default: sgps2_default {
1327 pinctrl_sioonctrl_default: sioonctrl_default {
1328 function = "SIOONCTRL";
1329 groups = "SIOONCTRL";
1332 pinctrl_siopbi_default: siopbi_default {
1333 function = "SIOPBI";
1337 pinctrl_siopbo_default: siopbo_default {
1338 function = "SIOPBO";
1342 pinctrl_siopwreq_default: siopwreq_default {
1343 function = "SIOPWREQ";
1344 groups = "SIOPWREQ";
1347 pinctrl_siopwrgd_default: siopwrgd_default {
1348 function = "SIOPWRGD";
1349 groups = "SIOPWRGD";
1352 pinctrl_sios3_default: sios3_default {
1357 pinctrl_sios5_default: sios5_default {
1362 pinctrl_siosci_default: siosci_default {
1363 function = "SIOSCI";
1367 pinctrl_spi1_default: spi1_default {
1372 pinctrl_spi1cs1_default: spi1cs1_default {
1373 function = "SPI1CS1";
1377 pinctrl_spi1debug_default: spi1debug_default {
1378 function = "SPI1DEBUG";
1379 groups = "SPI1DEBUG";
1382 pinctrl_spi1passthru_default: spi1passthru_default {
1383 function = "SPI1PASSTHRU";
1384 groups = "SPI1PASSTHRU";
1387 pinctrl_spi2ck_default: spi2ck_default {
1388 function = "SPI2CK";
1392 pinctrl_spi2cs0_default: spi2cs0_default {
1393 function = "SPI2CS0";
1397 pinctrl_spi2cs1_default: spi2cs1_default {
1398 function = "SPI2CS1";
1402 pinctrl_spi2miso_default: spi2miso_default {
1403 function = "SPI2MISO";
1404 groups = "SPI2MISO";
1407 pinctrl_spi2mosi_default: spi2mosi_default {
1408 function = "SPI2MOSI";
1409 groups = "SPI2MOSI";
1412 pinctrl_timer3_default: timer3_default {
1413 function = "TIMER3";
1417 pinctrl_timer4_default: timer4_default {
1418 function = "TIMER4";
1422 pinctrl_timer5_default: timer5_default {
1423 function = "TIMER5";
1427 pinctrl_timer6_default: timer6_default {
1428 function = "TIMER6";
1432 pinctrl_timer7_default: timer7_default {
1433 function = "TIMER7";
1437 pinctrl_timer8_default: timer8_default {
1438 function = "TIMER8";
1442 pinctrl_txd1_default: txd1_default {
1447 pinctrl_txd2_default: txd2_default {
1452 pinctrl_txd3_default: txd3_default {
1457 pinctrl_txd4_default: txd4_default {
1462 pinctrl_uart6_default: uart6_default {
1467 pinctrl_usbcki_default: usbcki_default {
1468 function = "USBCKI";
1472 pinctrl_usb2ah_default: usb2ah_default {
1473 function = "USB2AH";
1477 pinctrl_usb2ad_default: usb2ad_default {
1478 function = "USB2AD";
1482 pinctrl_usb11bhid_default: usb11bhid_default {
1483 function = "USB11BHID";
1484 groups = "USB11BHID";
1487 pinctrl_usb2bh_default: usb2bh_default {
1488 function = "USB2BH";
1492 pinctrl_vgabiosrom_default: vgabiosrom_default {
1493 function = "VGABIOSROM";
1494 groups = "VGABIOSROM";
1497 pinctrl_vgahs_default: vgahs_default {
1502 pinctrl_vgavs_default: vgavs_default {
1507 pinctrl_vpi24_default: vpi24_default {
1512 pinctrl_vpo_default: vpo_default {
1517 pinctrl_wdtrst1_default: wdtrst1_default {
1518 function = "WDTRST1";
1522 pinctrl_wdtrst2_default: wdtrst2_default {
1523 function = "WDTRST2";