arch/arm/boot/dts/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2500";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm1176jzf-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         memory@80000000 {
  46                 device_type = "memory";
  47                 reg = <0x80000000 0>;
  48         };
  49
  50         ahb {
  51                 compatible = "simple-bus";
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 ranges;
  55
  56                 fmc: flash-controller@1e620000 {
  57                         reg = < 0x1e620000 0xc4
  58                                 0x20000000 0x10000000 >;
  59                         #address-cells = <1>;
  60                         #size-cells = <0>;
  61                         compatible = "aspeed,ast2500-fmc";
  62                         clocks = <&syscon ASPEED_CLK_AHB>;
  63                         status = "disabled";
  64                         interrupts = <19>;
  65                         flash@0 {
  66                                 reg = < 0 >;
  67                                 compatible = "jedec,spi-nor";
  68                                 status = "disabled";
  69                         };
  70                         flash@1 {
  71                                 reg = < 1 >;
  72                                 compatible = "jedec,spi-nor";
  73                                 status = "disabled";
  74                         };
  75                         flash@2 {
  76                                 reg = < 2 >;
  77                                 compatible = "jedec,spi-nor";
  78                                 status = "disabled";
  79                         };
  80                 };
  81
  82                 spi1: flash-controller@1e630000 {
  83                         reg = < 0x1e630000 0xc4
  84                                 0x30000000 0x08000000 >;
  85                         #address-cells = <1>;
  86                         #size-cells = <0>;
  87                         compatible = "aspeed,ast2500-spi";
  88                         clocks = <&syscon ASPEED_CLK_AHB>;
  89                         status = "disabled";
  90                         flash@0 {
  91                                 reg = < 0 >;
  92                                 compatible = "jedec,spi-nor";
  93                                 status = "disabled";
  94                         };
  95                         flash@1 {
  96                                 reg = < 1 >;
  97                                 compatible = "jedec,spi-nor";
  98                                 status = "disabled";
  99                         };
 100                 };
 101
 102                 spi2: flash-controller@1e631000 {
 103                         reg = < 0x1e631000 0xc4
 104                                 0x38000000 0x08000000 >;
 105                         #address-cells = <1>;
 106                         #size-cells = <0>;
 107                         compatible = "aspeed,ast2500-spi";
 108                         clocks = <&syscon ASPEED_CLK_AHB>;
 109                         status = "disabled";
 110                         flash@0 {
 111                                 reg = < 0 >;
 112                                 compatible = "jedec,spi-nor";
 113                                 status = "disabled";
 114                         };
 115                         flash@1 {
 116                                 reg = < 1 >;
 117                                 compatible = "jedec,spi-nor";
 118                                 status = "disabled";
 119                         };
 120                 };
 121
 122                 vic: interrupt-controller@1e6c0080 {
 123                         compatible = "aspeed,ast2400-vic";
 124                         interrupt-controller;
 125                         #interrupt-cells = <1>;
 126                         valid-sources = <0xfefff7ff 0x0807ffff>;
 127                         reg = <0x1e6c0080 0x80>;
 128                 };
 129
 130                 mac0: ethernet@1e660000 {
 131                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 132                         reg = <0x1e660000 0x180>;
 133                         interrupts = <2>;
 134                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 135                         status = "disabled";
 136                 };
 137
 138                 mac1: ethernet@1e680000 {
 139                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 140                         reg = <0x1e680000 0x180>;
 141                         interrupts = <3>;
 142                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 143                         status = "disabled";
 144                 };
 145
 146                 apb {
 147                         compatible = "simple-bus";
 148                         #address-cells = <1>;
 149                         #size-cells = <1>;
 150                         ranges;
 151
 152                         syscon: syscon@1e6e2000 {
 153                                 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 154                                 reg = <0x1e6e2000 0x1a8>;
 155                                 #address-cells = <1>;
 156                                 #size-cells = <0>;
 157                                 #clock-cells = <1>;
 158                                 #reset-cells = <1>;
 159
 160                                 pinctrl: pinctrl {
 161                                         compatible = "aspeed,g5-pinctrl";
 162                                         aspeed,external-nodes = <&gfx &lhc>;
 163
 164                                 };
 165                         };
 166
 167                         gfx: display@1e6e6000 {
 168                                 compatible = "aspeed,ast2500-gfx", "syscon";
 169                                 reg = <0x1e6e6000 0x1000>;
 170                                 reg-io-width = <4>;
 171                         };
 172
 173                         adc: adc@1e6e9000 {
 174                                 compatible = "aspeed,ast2500-adc";
 175                                 reg = <0x1e6e9000 0xb0>;
 176                                 clocks = <&syscon ASPEED_CLK_APB>;
 177                                 resets = <&syscon ASPEED_RESET_ADC>;
 178                                 #io-channel-cells = <1>;
 179                                 status = "disabled";
 180                         };
 181
 182                         sram@1e720000 {
 183                                 compatible = "mmio-sram";
 184                                 reg = <0x1e720000 0x9000>;      // 36K
 185                         };
 186
 187                         gpio: gpio@1e780000 {
 188                                 #gpio-cells = <2>;
 189                                 gpio-controller;
 190                                 compatible = "aspeed,ast2500-gpio";
 191                                 reg = <0x1e780000 0x1000>;
 192                                 interrupts = <20>;
 193                                 gpio-ranges = <&pinctrl 0 0 220>;
 194                                 clocks = <&syscon ASPEED_CLK_APB>;
 195                                 interrupt-controller;
 196                         };
 197
 198                         timer: timer@1e782000 {
 199                                 /* This timer is a Faraday FTTMR010 derivative */
 200                                 compatible = "aspeed,ast2400-timer";
 201                                 reg = <0x1e782000 0x90>;
 202                                 interrupts = <16 17 18 35 36 37 38 39>;
 203                                 clocks = <&syscon ASPEED_CLK_APB>;
 204                                 clock-names = "PCLK";
 205                         };
 206
 207                         uart1: serial@1e783000 {
 208                                 compatible = "ns16550a";
 209                                 reg = <0x1e783000 0x20>;
 210                                 reg-shift = <2>;
 211                                 interrupts = <9>;
 212                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 213                                 resets = <&lpc_reset 4>;
 214                                 no-loopback-test;
 215                                 status = "disabled";
 216                         };
 217
 218                         uart5: serial@1e784000 {
 219                                 compatible = "ns16550a";
 220                                 reg = <0x1e784000 0x20>;
 221                                 reg-shift = <2>;
 222                                 interrupts = <10>;
 223                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 224                                 no-loopback-test;
 225                                 status = "disabled";
 226                         };
 227
 228                         wdt1: watchdog@1e785000 {
 229                                 compatible = "aspeed,ast2500-wdt";
 230                                 reg = <0x1e785000 0x20>;
 231                                 clocks = <&syscon ASPEED_CLK_APB>;
 232                         };
 233
 234                         wdt2: watchdog@1e785020 {
 235                                 compatible = "aspeed,ast2500-wdt";
 236                                 reg = <0x1e785020 0x20>;
 237                                 clocks = <&syscon ASPEED_CLK_APB>;
 238                         };
 239
 240                         wdt3: watchdog@1e785040 {
 241                                 compatible = "aspeed,ast2500-wdt";
 242                                 reg = <0x1e785040 0x20>;
 243                                 clocks = <&syscon ASPEED_CLK_APB>;
 244                                 status = "disabled";
 245                         };
 246
 247                         pwm_tacho: pwm-tacho-controller@1e786000 {
 248                                 compatible = "aspeed,ast2500-pwm-tacho";
 249                                 #address-cells = <1>;
 250                                 #size-cells = <0>;
 251                                 reg = <0x1e786000 0x1000>;
 252                                 clocks = <&syscon ASPEED_CLK_APB>;
 253                                 resets = <&syscon ASPEED_RESET_PWM>;
 254                                 status = "disabled";
 255                         };
 256
 257                         vuart: serial@1e787000 {
 258                                 compatible = "aspeed,ast2500-vuart";
 259                                 reg = <0x1e787000 0x40>;
 260                                 reg-shift = <2>;
 261                                 interrupts = <8>;
 262                                 clocks = <&syscon ASPEED_CLK_APB>;
 263                                 no-loopback-test;
 264                                 status = "disabled";
 265                         };
 266
 267                         lpc: lpc@1e789000 {
 268                                 compatible = "aspeed,ast2500-lpc", "simple-mfd";
 269                                 reg = <0x1e789000 0x1000>;
 270
 271                                 #address-cells = <1>;
 272                                 #size-cells = <1>;
 273                                 ranges = <0x0 0x1e789000 0x1000>;
 274
 275                                 lpc_bmc: lpc-bmc@0 {
 276                                         compatible = "aspeed,ast2500-lpc-bmc";
 277                                         reg = <0x0 0x80>;
 278                                 };
 279
 280                                 lpc_host: lpc-host@80 {
 281                                         compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
 282                                         reg = <0x80 0x1e0>;
 283                                         reg-io-width = <4>;
 284
 285                                         #address-cells = <1>;
 286                                         #size-cells = <1>;
 287                                         ranges = <0x0 0x80 0x1e0>;
 288
 289                                         lpc_ctrl: lpc-ctrl@0 {
 290                                                 compatible = "aspeed,ast2500-lpc-ctrl";
 291                                                 reg = <0x0 0x80>;
 292                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 293                                                 status = "disabled";
 294                                         };
 295
 296                                         lpc_snoop: lpc-snoop@0 {
 297                                                 compatible = "aspeed,ast2500-lpc-snoop";
 298                                                 reg = <0x0 0x80>;
 299                                                 interrupts = <8>;
 300                                                 status = "disabled";
 301                                         };
 302
 303                                         lhc: lhc@20 {
 304                                                 compatible = "aspeed,ast2500-lhc";
 305                                                 reg = <0x20 0x24 0x48 0x8>;
 306                                         };
 307
 308                                         lpc_reset: reset-controller@18 {
 309                                                 compatible = "aspeed,ast2500-lpc-reset";
 310                                                 reg = <0x18 0x4>;
 311                                                 #reset-cells = <1>;
 312                                         };
 313
 314                                         ibt: ibt@c0 {
 315                                                 compatible = "aspeed,ast2500-ibt-bmc";
 316                                                 reg = <0xc0 0x18>;
 317                                                 interrupts = <8>;
 318                                                 status = "disabled";
 319                                         };
 320                                 };
 321                         };
 322
 323                         uart2: serial@1e78d000 {
 324                                 compatible = "ns16550a";
 325                                 reg = <0x1e78d000 0x20>;
 326                                 reg-shift = <2>;
 327                                 interrupts = <32>;
 328                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 329                                 resets = <&lpc_reset 5>;
 330                                 no-loopback-test;
 331                                 status = "disabled";
 332                         };
 333
 334                         uart3: serial@1e78e000 {
 335                                 compatible = "ns16550a";
 336                                 reg = <0x1e78e000 0x20>;
 337                                 reg-shift = <2>;
 338                                 interrupts = <33>;
 339                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 340                                 resets = <&lpc_reset 6>;
 341                                 no-loopback-test;
 342                                 status = "disabled";
 343                         };
 344
 345                         uart4: serial@1e78f000 {
 346                                 compatible = "ns16550a";
 347                                 reg = <0x1e78f000 0x20>;
 348                                 reg-shift = <2>;
 349                                 interrupts = <34>;
 350                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 351                                 resets = <&lpc_reset 7>;
 352                                 no-loopback-test;
 353                                 status = "disabled";
 354                         };
 355
 356                         i2c: i2c@1e78a000 {
 357                                 compatible = "simple-bus";
 358                                 #address-cells = <1>;
 359                                 #size-cells = <1>;
 360                                 ranges = <0 0x1e78a000 0x1000>;
 361                         };
 362                 };
 363         };
 364 };
 365
 366 &i2c {
 367         i2c_ic: interrupt-controller@0 {
 368                 #interrupt-cells = <1>;
 369                 compatible = "aspeed,ast2500-i2c-ic";
 370                 reg = <0x0 0x40>;
 371                 interrupts = <12>;
 372                 interrupt-controller;
 373         };
 374
 375         i2c0: i2c-bus@40 {
 376                 #address-cells = <1>;
 377                 #size-cells = <0>;
 378                 #interrupt-cells = <1>;
 379
 380                 reg = <0x40 0x40>;
 381                 compatible = "aspeed,ast2500-i2c-bus";
 382                 clocks = <&syscon ASPEED_CLK_APB>;
 383                 resets = <&syscon ASPEED_RESET_I2C>;
 384                 bus-frequency = <100000>;
 385                 interrupts = <0>;
 386                 interrupt-parent = <&i2c_ic>;
 387                 status = "disabled";
 388                 /* Does not need pinctrl properties */
 389         };
 390
 391         i2c1: i2c-bus@80 {
 392                 #address-cells = <1>;
 393                 #size-cells = <0>;
 394                 #interrupt-cells = <1>;
 395
 396                 reg = <0x80 0x40>;
 397                 compatible = "aspeed,ast2500-i2c-bus";
 398                 clocks = <&syscon ASPEED_CLK_APB>;
 399                 resets = <&syscon ASPEED_RESET_I2C>;
 400                 bus-frequency = <100000>;
 401                 interrupts = <1>;
 402                 interrupt-parent = <&i2c_ic>;
 403                 status = "disabled";
 404                 /* Does not need pinctrl properties */
 405         };
 406
 407         i2c2: i2c-bus@c0 {
 408                 #address-cells = <1>;
 409                 #size-cells = <0>;
 410                 #interrupt-cells = <1>;
 411
 412                 reg = <0xc0 0x40>;
 413                 compatible = "aspeed,ast2500-i2c-bus";
 414                 clocks = <&syscon ASPEED_CLK_APB>;
 415                 resets = <&syscon ASPEED_RESET_I2C>;
 416                 bus-frequency = <100000>;
 417                 interrupts = <2>;
 418                 interrupt-parent = <&i2c_ic>;
 419                 pinctrl-names = "default";
 420                 pinctrl-0 = <&pinctrl_i2c3_default>;
 421                 status = "disabled";
 422         };
 423
 424         i2c3: i2c-bus@100 {
 425                 #address-cells = <1>;
 426                 #size-cells = <0>;
 427                 #interrupt-cells = <1>;
 428
 429                 reg = <0x100 0x40>;
 430                 compatible = "aspeed,ast2500-i2c-bus";
 431                 clocks = <&syscon ASPEED_CLK_APB>;
 432                 resets = <&syscon ASPEED_RESET_I2C>;
 433                 bus-frequency = <100000>;
 434                 interrupts = <3>;
 435                 interrupt-parent = <&i2c_ic>;
 436                 pinctrl-names = "default";
 437                 pinctrl-0 = <&pinctrl_i2c4_default>;
 438                 status = "disabled";
 439         };
 440
 441         i2c4: i2c-bus@140 {
 442                 #address-cells = <1>;
 443                 #size-cells = <0>;
 444                 #interrupt-cells = <1>;
 445
 446                 reg = <0x140 0x40>;
 447                 compatible = "aspeed,ast2500-i2c-bus";
 448                 clocks = <&syscon ASPEED_CLK_APB>;
 449                 resets = <&syscon ASPEED_RESET_I2C>;
 450                 bus-frequency = <100000>;
 451                 interrupts = <4>;
 452                 interrupt-parent = <&i2c_ic>;
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&pinctrl_i2c5_default>;
 455                 status = "disabled";
 456         };
 457
 458         i2c5: i2c-bus@180 {
 459                 #address-cells = <1>;
 460                 #size-cells = <0>;
 461                 #interrupt-cells = <1>;
 462
 463                 reg = <0x180 0x40>;
 464                 compatible = "aspeed,ast2500-i2c-bus";
 465                 clocks = <&syscon ASPEED_CLK_APB>;
 466                 resets = <&syscon ASPEED_RESET_I2C>;
 467                 bus-frequency = <100000>;
 468                 interrupts = <5>;
 469                 interrupt-parent = <&i2c_ic>;
 470                 pinctrl-names = "default";
 471                 pinctrl-0 = <&pinctrl_i2c6_default>;
 472                 status = "disabled";
 473         };
 474
 475         i2c6: i2c-bus@1c0 {
 476                 #address-cells = <1>;
 477                 #size-cells = <0>;
 478                 #interrupt-cells = <1>;
 479
 480                 reg = <0x1c0 0x40>;
 481                 compatible = "aspeed,ast2500-i2c-bus";
 482                 clocks = <&syscon ASPEED_CLK_APB>;
 483                 resets = <&syscon ASPEED_RESET_I2C>;
 484                 bus-frequency = <100000>;
 485                 interrupts = <6>;
 486                 interrupt-parent = <&i2c_ic>;
 487                 pinctrl-names = "default";
 488                 pinctrl-0 = <&pinctrl_i2c7_default>;
 489                 status = "disabled";
 490         };
 491
 492         i2c7: i2c-bus@300 {
 493                 #address-cells = <1>;
 494                 #size-cells = <0>;
 495                 #interrupt-cells = <1>;
 496
 497                 reg = <0x300 0x40>;
 498                 compatible = "aspeed,ast2500-i2c-bus";
 499                 clocks = <&syscon ASPEED_CLK_APB>;
 500                 resets = <&syscon ASPEED_RESET_I2C>;
 501                 bus-frequency = <100000>;
 502                 interrupts = <7>;
 503                 interrupt-parent = <&i2c_ic>;
 504                 pinctrl-names = "default";
 505                 pinctrl-0 = <&pinctrl_i2c8_default>;
 506                 status = "disabled";
 507         };
 508
 509         i2c8: i2c-bus@340 {
 510                 #address-cells = <1>;
 511                 #size-cells = <0>;
 512                 #interrupt-cells = <1>;
 513
 514                 reg = <0x340 0x40>;
 515                 compatible = "aspeed,ast2500-i2c-bus";
 516                 clocks = <&syscon ASPEED_CLK_APB>;
 517                 resets = <&syscon ASPEED_RESET_I2C>;
 518                 bus-frequency = <100000>;
 519                 interrupts = <8>;
 520                 interrupt-parent = <&i2c_ic>;
 521                 pinctrl-names = "default";
 522                 pinctrl-0 = <&pinctrl_i2c9_default>;
 523                 status = "disabled";
 524         };
 525
 526         i2c9: i2c-bus@380 {
 527                 #address-cells = <1>;
 528                 #size-cells = <0>;
 529                 #interrupt-cells = <1>;
 530
 531                 reg = <0x380 0x40>;
 532                 compatible = "aspeed,ast2500-i2c-bus";
 533                 clocks = <&syscon ASPEED_CLK_APB>;
 534                 resets = <&syscon ASPEED_RESET_I2C>;
 535                 bus-frequency = <100000>;
 536                 interrupts = <9>;
 537                 interrupt-parent = <&i2c_ic>;
 538                 pinctrl-names = "default";
 539                 pinctrl-0 = <&pinctrl_i2c10_default>;
 540                 status = "disabled";
 541         };
 542
 543         i2c10: i2c-bus@3c0 {
 544                 #address-cells = <1>;
 545                 #size-cells = <0>;
 546                 #interrupt-cells = <1>;
 547
 548                 reg = <0x3c0 0x40>;
 549                 compatible = "aspeed,ast2500-i2c-bus";
 550                 clocks = <&syscon ASPEED_CLK_APB>;
 551                 resets = <&syscon ASPEED_RESET_I2C>;
 552                 bus-frequency = <100000>;
 553                 interrupts = <10>;
 554                 interrupt-parent = <&i2c_ic>;
 555                 pinctrl-names = "default";
 556                 pinctrl-0 = <&pinctrl_i2c11_default>;
 557                 status = "disabled";
 558         };
 559
 560         i2c11: i2c-bus@400 {
 561                 #address-cells = <1>;
 562                 #size-cells = <0>;
 563                 #interrupt-cells = <1>;
 564
 565                 reg = <0x400 0x40>;
 566                 compatible = "aspeed,ast2500-i2c-bus";
 567                 clocks = <&syscon ASPEED_CLK_APB>;
 568                 resets = <&syscon ASPEED_RESET_I2C>;
 569                 bus-frequency = <100000>;
 570                 interrupts = <11>;
 571                 interrupt-parent = <&i2c_ic>;
 572                 pinctrl-names = "default";
 573                 pinctrl-0 = <&pinctrl_i2c12_default>;
 574                 status = "disabled";
 575         };
 576
 577         i2c12: i2c-bus@440 {
 578                 #address-cells = <1>;
 579                 #size-cells = <0>;
 580                 #interrupt-cells = <1>;
 581
 582                 reg = <0x440 0x40>;
 583                 compatible = "aspeed,ast2500-i2c-bus";
 584                 clocks = <&syscon ASPEED_CLK_APB>;
 585                 resets = <&syscon ASPEED_RESET_I2C>;
 586                 bus-frequency = <100000>;
 587                 interrupts = <12>;
 588                 interrupt-parent = <&i2c_ic>;
 589                 pinctrl-names = "default";
 590                 pinctrl-0 = <&pinctrl_i2c13_default>;
 591                 status = "disabled";
 592         };
 593
 594         i2c13: i2c-bus@480 {
 595                 #address-cells = <1>;
 596                 #size-cells = <0>;
 597                 #interrupt-cells = <1>;
 598
 599                 reg = <0x480 0x40>;
 600                 compatible = "aspeed,ast2500-i2c-bus";
 601                 clocks = <&syscon ASPEED_CLK_APB>;
 602                 resets = <&syscon ASPEED_RESET_I2C>;
 603                 bus-frequency = <100000>;
 604                 interrupts = <13>;
 605                 interrupt-parent = <&i2c_ic>;
 606                 pinctrl-names = "default";
 607                 pinctrl-0 = <&pinctrl_i2c14_default>;
 608                 status = "disabled";
 609         };
 610 };
 611
 612 &pinctrl {
 613         pinctrl_acpi_default: acpi_default {
 614                 function = "ACPI";
 615                 groups = "ACPI";
 616         };
 617
 618         pinctrl_adc0_default: adc0_default {
 619                 function = "ADC0";
 620                 groups = "ADC0";
 621         };
 622
 623         pinctrl_adc1_default: adc1_default {
 624                 function = "ADC1";
 625                 groups = "ADC1";
 626         };
 627
 628         pinctrl_adc10_default: adc10_default {
 629                 function = "ADC10";
 630                 groups = "ADC10";
 631         };
 632
 633         pinctrl_adc11_default: adc11_default {
 634                 function = "ADC11";
 635                 groups = "ADC11";
 636         };
 637
 638         pinctrl_adc12_default: adc12_default {
 639                 function = "ADC12";
 640                 groups = "ADC12";
 641         };
 642
 643         pinctrl_adc13_default: adc13_default {
 644                 function = "ADC13";
 645                 groups = "ADC13";
 646         };
 647
 648         pinctrl_adc14_default: adc14_default {
 649                 function = "ADC14";
 650                 groups = "ADC14";
 651         };
 652
 653         pinctrl_adc15_default: adc15_default {
 654                 function = "ADC15";
 655                 groups = "ADC15";
 656         };
 657
 658         pinctrl_adc2_default: adc2_default {
 659                 function = "ADC2";
 660                 groups = "ADC2";
 661         };
 662
 663         pinctrl_adc3_default: adc3_default {
 664                 function = "ADC3";
 665                 groups = "ADC3";
 666         };
 667
 668         pinctrl_adc4_default: adc4_default {
 669                 function = "ADC4";
 670                 groups = "ADC4";
 671         };
 672
 673         pinctrl_adc5_default: adc5_default {
 674                 function = "ADC5";
 675                 groups = "ADC5";
 676         };
 677
 678         pinctrl_adc6_default: adc6_default {
 679                 function = "ADC6";
 680                 groups = "ADC6";
 681         };
 682
 683         pinctrl_adc7_default: adc7_default {
 684                 function = "ADC7";
 685                 groups = "ADC7";
 686         };
 687
 688         pinctrl_adc8_default: adc8_default {
 689                 function = "ADC8";
 690                 groups = "ADC8";
 691         };
 692
 693         pinctrl_adc9_default: adc9_default {
 694                 function = "ADC9";
 695                 groups = "ADC9";
 696         };
 697
 698         pinctrl_bmcint_default: bmcint_default {
 699                 function = "BMCINT";
 700                 groups = "BMCINT";
 701         };
 702
 703         pinctrl_ddcclk_default: ddcclk_default {
 704                 function = "DDCCLK";
 705                 groups = "DDCCLK";
 706         };
 707
 708         pinctrl_ddcdat_default: ddcdat_default {
 709                 function = "DDCDAT";
 710                 groups = "DDCDAT";
 711         };
 712
 713         pinctrl_espi_default: espi_default {
 714                 function = "ESPI";
 715                 groups = "ESPI";
 716         };
 717
 718         pinctrl_fwspics1_default: fwspics1_default {
 719                 function = "FWSPICS1";
 720                 groups = "FWSPICS1";
 721         };
 722
 723         pinctrl_fwspics2_default: fwspics2_default {
 724                 function = "FWSPICS2";
 725                 groups = "FWSPICS2";
 726         };
 727
 728         pinctrl_gpid0_default: gpid0_default {
 729                 function = "GPID0";
 730                 groups = "GPID0";
 731         };
 732
 733         pinctrl_gpid2_default: gpid2_default {
 734                 function = "GPID2";
 735                 groups = "GPID2";
 736         };
 737
 738         pinctrl_gpid4_default: gpid4_default {
 739                 function = "GPID4";
 740                 groups = "GPID4";
 741         };
 742
 743         pinctrl_gpid6_default: gpid6_default {
 744                 function = "GPID6";
 745                 groups = "GPID6";
 746         };
 747
 748         pinctrl_gpie0_default: gpie0_default {
 749                 function = "GPIE0";
 750                 groups = "GPIE0";
 751         };
 752
 753         pinctrl_gpie2_default: gpie2_default {
 754                 function = "GPIE2";
 755                 groups = "GPIE2";
 756         };
 757
 758         pinctrl_gpie4_default: gpie4_default {
 759                 function = "GPIE4";
 760                 groups = "GPIE4";
 761         };
 762
 763         pinctrl_gpie6_default: gpie6_default {
 764                 function = "GPIE6";
 765                 groups = "GPIE6";
 766         };
 767
 768         pinctrl_i2c10_default: i2c10_default {
 769                 function = "I2C10";
 770                 groups = "I2C10";
 771         };
 772
 773         pinctrl_i2c11_default: i2c11_default {
 774                 function = "I2C11";
 775                 groups = "I2C11";
 776         };
 777
 778         pinctrl_i2c12_default: i2c12_default {
 779                 function = "I2C12";
 780                 groups = "I2C12";
 781         };
 782
 783         pinctrl_i2c13_default: i2c13_default {
 784                 function = "I2C13";
 785                 groups = "I2C13";
 786         };
 787
 788         pinctrl_i2c14_default: i2c14_default {
 789                 function = "I2C14";
 790                 groups = "I2C14";
 791         };
 792
 793         pinctrl_i2c3_default: i2c3_default {
 794                 function = "I2C3";
 795                 groups = "I2C3";
 796         };
 797
 798         pinctrl_i2c4_default: i2c4_default {
 799                 function = "I2C4";
 800                 groups = "I2C4";
 801         };
 802
 803         pinctrl_i2c5_default: i2c5_default {
 804                 function = "I2C5";
 805                 groups = "I2C5";
 806         };
 807
 808         pinctrl_i2c6_default: i2c6_default {
 809                 function = "I2C6";
 810                 groups = "I2C6";
 811         };
 812
 813         pinctrl_i2c7_default: i2c7_default {
 814                 function = "I2C7";
 815                 groups = "I2C7";
 816         };
 817
 818         pinctrl_i2c8_default: i2c8_default {
 819                 function = "I2C8";
 820                 groups = "I2C8";
 821         };
 822
 823         pinctrl_i2c9_default: i2c9_default {
 824                 function = "I2C9";
 825                 groups = "I2C9";
 826         };
 827
 828         pinctrl_lad0_default: lad0_default {
 829                 function = "LAD0";
 830                 groups = "LAD0";
 831         };
 832
 833         pinctrl_lad1_default: lad1_default {
 834                 function = "LAD1";
 835                 groups = "LAD1";
 836         };
 837
 838         pinctrl_lad2_default: lad2_default {
 839                 function = "LAD2";
 840                 groups = "LAD2";
 841         };
 842
 843         pinctrl_lad3_default: lad3_default {
 844                 function = "LAD3";
 845                 groups = "LAD3";
 846         };
 847
 848         pinctrl_lclk_default: lclk_default {
 849                 function = "LCLK";
 850                 groups = "LCLK";
 851         };
 852
 853         pinctrl_lframe_default: lframe_default {
 854                 function = "LFRAME";
 855                 groups = "LFRAME";
 856         };
 857
 858         pinctrl_lpchc_default: lpchc_default {
 859                 function = "LPCHC";
 860                 groups = "LPCHC";
 861         };
 862
 863         pinctrl_lpcpd_default: lpcpd_default {
 864                 function = "LPCPD";
 865                 groups = "LPCPD";
 866         };
 867
 868         pinctrl_lpcplus_default: lpcplus_default {
 869                 function = "LPCPLUS";
 870                 groups = "LPCPLUS";
 871         };
 872
 873         pinctrl_lpcpme_default: lpcpme_default {
 874                 function = "LPCPME";
 875                 groups = "LPCPME";
 876         };
 877
 878         pinctrl_lpcrst_default: lpcrst_default {
 879                 function = "LPCRST";
 880                 groups = "LPCRST";
 881         };
 882
 883         pinctrl_lpcsmi_default: lpcsmi_default {
 884                 function = "LPCSMI";
 885                 groups = "LPCSMI";
 886         };
 887
 888         pinctrl_lsirq_default: lsirq_default {
 889                 function = "LSIRQ";
 890                 groups = "LSIRQ";
 891         };
 892
 893         pinctrl_mac1link_default: mac1link_default {
 894                 function = "MAC1LINK";
 895                 groups = "MAC1LINK";
 896         };
 897
 898         pinctrl_mac2link_default: mac2link_default {
 899                 function = "MAC2LINK";
 900                 groups = "MAC2LINK";
 901         };
 902
 903         pinctrl_mdio1_default: mdio1_default {
 904                 function = "MDIO1";
 905                 groups = "MDIO1";
 906         };
 907
 908         pinctrl_mdio2_default: mdio2_default {
 909                 function = "MDIO2";
 910                 groups = "MDIO2";
 911         };
 912
 913         pinctrl_ncts1_default: ncts1_default {
 914                 function = "NCTS1";
 915                 groups = "NCTS1";
 916         };
 917
 918         pinctrl_ncts2_default: ncts2_default {
 919                 function = "NCTS2";
 920                 groups = "NCTS2";
 921         };
 922
 923         pinctrl_ncts3_default: ncts3_default {
 924                 function = "NCTS3";
 925                 groups = "NCTS3";
 926         };
 927
 928         pinctrl_ncts4_default: ncts4_default {
 929                 function = "NCTS4";
 930                 groups = "NCTS4";
 931         };
 932
 933         pinctrl_ndcd1_default: ndcd1_default {
 934                 function = "NDCD1";
 935                 groups = "NDCD1";
 936         };
 937
 938         pinctrl_ndcd2_default: ndcd2_default {
 939                 function = "NDCD2";
 940                 groups = "NDCD2";
 941         };
 942
 943         pinctrl_ndcd3_default: ndcd3_default {
 944                 function = "NDCD3";
 945                 groups = "NDCD3";
 946         };
 947
 948         pinctrl_ndcd4_default: ndcd4_default {
 949                 function = "NDCD4";
 950                 groups = "NDCD4";
 951         };
 952
 953         pinctrl_ndsr1_default: ndsr1_default {
 954                 function = "NDSR1";
 955                 groups = "NDSR1";
 956         };
 957
 958         pinctrl_ndsr2_default: ndsr2_default {
 959                 function = "NDSR2";
 960                 groups = "NDSR2";
 961         };
 962
 963         pinctrl_ndsr3_default: ndsr3_default {
 964                 function = "NDSR3";
 965                 groups = "NDSR3";
 966         };
 967
 968         pinctrl_ndsr4_default: ndsr4_default {
 969                 function = "NDSR4";
 970                 groups = "NDSR4";
 971         };
 972
 973         pinctrl_ndtr1_default: ndtr1_default {
 974                 function = "NDTR1";
 975                 groups = "NDTR1";
 976         };
 977
 978         pinctrl_ndtr2_default: ndtr2_default {
 979                 function = "NDTR2";
 980                 groups = "NDTR2";
 981         };
 982
 983         pinctrl_ndtr3_default: ndtr3_default {
 984                 function = "NDTR3";
 985                 groups = "NDTR3";
 986         };
 987
 988         pinctrl_ndtr4_default: ndtr4_default {
 989                 function = "NDTR4";
 990                 groups = "NDTR4";
 991         };
 992
 993         pinctrl_nri1_default: nri1_default {
 994                 function = "NRI1";
 995                 groups = "NRI1";
 996         };
 997
 998         pinctrl_nri2_default: nri2_default {
 999                 function = "NRI2";
1000                 groups = "NRI2";
1001         };
1002
1003         pinctrl_nri3_default: nri3_default {
1004                 function = "NRI3";
1005                 groups = "NRI3";
1006         };
1007
1008         pinctrl_nri4_default: nri4_default {
1009                 function = "NRI4";
1010                 groups = "NRI4";
1011         };
1012
1013         pinctrl_nrts1_default: nrts1_default {
1014                 function = "NRTS1";
1015                 groups = "NRTS1";
1016         };
1017
1018         pinctrl_nrts2_default: nrts2_default {
1019                 function = "NRTS2";
1020                 groups = "NRTS2";
1021         };
1022
1023         pinctrl_nrts3_default: nrts3_default {
1024                 function = "NRTS3";
1025                 groups = "NRTS3";
1026         };
1027
1028         pinctrl_nrts4_default: nrts4_default {
1029                 function = "NRTS4";
1030                 groups = "NRTS4";
1031         };
1032
1033         pinctrl_oscclk_default: oscclk_default {
1034                 function = "OSCCLK";
1035                 groups = "OSCCLK";
1036         };
1037
1038         pinctrl_pewake_default: pewake_default {
1039                 function = "PEWAKE";
1040                 groups = "PEWAKE";
1041         };
1042
1043         pinctrl_pnor_default: pnor_default {
1044                 function = "PNOR";
1045                 groups = "PNOR";
1046         };
1047
1048         pinctrl_pwm0_default: pwm0_default {
1049                 function = "PWM0";
1050                 groups = "PWM0";
1051         };
1052
1053         pinctrl_pwm1_default: pwm1_default {
1054                 function = "PWM1";
1055                 groups = "PWM1";
1056         };
1057
1058         pinctrl_pwm2_default: pwm2_default {
1059                 function = "PWM2";
1060                 groups = "PWM2";
1061         };
1062
1063         pinctrl_pwm3_default: pwm3_default {
1064                 function = "PWM3";
1065                 groups = "PWM3";
1066         };
1067
1068         pinctrl_pwm4_default: pwm4_default {
1069                 function = "PWM4";
1070                 groups = "PWM4";
1071         };
1072
1073         pinctrl_pwm5_default: pwm5_default {
1074                 function = "PWM5";
1075                 groups = "PWM5";
1076         };
1077
1078         pinctrl_pwm6_default: pwm6_default {
1079                 function = "PWM6";
1080                 groups = "PWM6";
1081         };
1082
1083         pinctrl_pwm7_default: pwm7_default {
1084                 function = "PWM7";
1085                 groups = "PWM7";
1086         };
1087
1088         pinctrl_rgmii1_default: rgmii1_default {
1089                 function = "RGMII1";
1090                 groups = "RGMII1";
1091         };
1092
1093         pinctrl_rgmii2_default: rgmii2_default {
1094                 function = "RGMII2";
1095                 groups = "RGMII2";
1096         };
1097
1098         pinctrl_rmii1_default: rmii1_default {
1099                 function = "RMII1";
1100                 groups = "RMII1";
1101         };
1102
1103         pinctrl_rmii2_default: rmii2_default {
1104                 function = "RMII2";
1105                 groups = "RMII2";
1106         };
1107
1108         pinctrl_rxd1_default: rxd1_default {
1109                 function = "RXD1";
1110                 groups = "RXD1";
1111         };
1112
1113         pinctrl_rxd2_default: rxd2_default {
1114                 function = "RXD2";
1115                 groups = "RXD2";
1116         };
1117
1118         pinctrl_rxd3_default: rxd3_default {
1119                 function = "RXD3";
1120                 groups = "RXD3";
1121         };
1122
1123         pinctrl_rxd4_default: rxd4_default {
1124                 function = "RXD4";
1125                 groups = "RXD4";
1126         };
1127
1128         pinctrl_salt1_default: salt1_default {
1129                 function = "SALT1";
1130                 groups = "SALT1";
1131         };
1132
1133         pinctrl_salt10_default: salt10_default {
1134                 function = "SALT10";
1135                 groups = "SALT10";
1136         };
1137
1138         pinctrl_salt11_default: salt11_default {
1139                 function = "SALT11";
1140                 groups = "SALT11";
1141         };
1142
1143         pinctrl_salt12_default: salt12_default {
1144                 function = "SALT12";
1145                 groups = "SALT12";
1146         };
1147
1148         pinctrl_salt13_default: salt13_default {
1149                 function = "SALT13";
1150                 groups = "SALT13";
1151         };
1152
1153         pinctrl_salt14_default: salt14_default {
1154                 function = "SALT14";
1155                 groups = "SALT14";
1156         };
1157
1158         pinctrl_salt2_default: salt2_default {
1159                 function = "SALT2";
1160                 groups = "SALT2";
1161         };
1162
1163         pinctrl_salt3_default: salt3_default {
1164                 function = "SALT3";
1165                 groups = "SALT3";
1166         };
1167
1168         pinctrl_salt4_default: salt4_default {
1169                 function = "SALT4";
1170                 groups = "SALT4";
1171         };
1172
1173         pinctrl_salt5_default: salt5_default {
1174                 function = "SALT5";
1175                 groups = "SALT5";
1176         };
1177
1178         pinctrl_salt6_default: salt6_default {
1179                 function = "SALT6";
1180                 groups = "SALT6";
1181         };
1182
1183         pinctrl_salt7_default: salt7_default {
1184                 function = "SALT7";
1185                 groups = "SALT7";
1186         };
1187
1188         pinctrl_salt8_default: salt8_default {
1189                 function = "SALT8";
1190                 groups = "SALT8";
1191         };
1192
1193         pinctrl_salt9_default: salt9_default {
1194                 function = "SALT9";
1195                 groups = "SALT9";
1196         };
1197
1198         pinctrl_scl1_default: scl1_default {
1199                 function = "SCL1";
1200                 groups = "SCL1";
1201         };
1202
1203         pinctrl_scl2_default: scl2_default {
1204                 function = "SCL2";
1205                 groups = "SCL2";
1206         };
1207
1208         pinctrl_sd1_default: sd1_default {
1209                 function = "SD1";
1210                 groups = "SD1";
1211         };
1212
1213         pinctrl_sd2_default: sd2_default {
1214                 function = "SD2";
1215                 groups = "SD2";
1216         };
1217
1218         pinctrl_sda1_default: sda1_default {
1219                 function = "SDA1";
1220                 groups = "SDA1";
1221         };
1222
1223         pinctrl_sda2_default: sda2_default {
1224                 function = "SDA2";
1225                 groups = "SDA2";
1226         };
1227
1228         pinctrl_sgps1_default: sgps1_default {
1229                 function = "SGPS1";
1230                 groups = "SGPS1";
1231         };
1232
1233         pinctrl_sgps2_default: sgps2_default {
1234                 function = "SGPS2";
1235                 groups = "SGPS2";
1236         };
1237
1238         pinctrl_sioonctrl_default: sioonctrl_default {
1239                 function = "SIOONCTRL";
1240                 groups = "SIOONCTRL";
1241         };
1242
1243         pinctrl_siopbi_default: siopbi_default {
1244                 function = "SIOPBI";
1245                 groups = "SIOPBI";
1246         };
1247
1248         pinctrl_siopbo_default: siopbo_default {
1249                 function = "SIOPBO";
1250                 groups = "SIOPBO";
1251         };
1252
1253         pinctrl_siopwreq_default: siopwreq_default {
1254                 function = "SIOPWREQ";
1255                 groups = "SIOPWREQ";
1256         };
1257
1258         pinctrl_siopwrgd_default: siopwrgd_default {
1259                 function = "SIOPWRGD";
1260                 groups = "SIOPWRGD";
1261         };
1262
1263         pinctrl_sios3_default: sios3_default {
1264                 function = "SIOS3";
1265                 groups = "SIOS3";
1266         };
1267
1268         pinctrl_sios5_default: sios5_default {
1269                 function = "SIOS5";
1270                 groups = "SIOS5";
1271         };
1272
1273         pinctrl_siosci_default: siosci_default {
1274                 function = "SIOSCI";
1275                 groups = "SIOSCI";
1276         };
1277
1278         pinctrl_spi1_default: spi1_default {
1279                 function = "SPI1";
1280                 groups = "SPI1";
1281         };
1282
1283         pinctrl_spi1cs1_default: spi1cs1_default {
1284                 function = "SPI1CS1";
1285                 groups = "SPI1CS1";
1286         };
1287
1288         pinctrl_spi1debug_default: spi1debug_default {
1289                 function = "SPI1DEBUG";
1290                 groups = "SPI1DEBUG";
1291         };
1292
1293         pinctrl_spi1passthru_default: spi1passthru_default {
1294                 function = "SPI1PASSTHRU";
1295                 groups = "SPI1PASSTHRU";
1296         };
1297
1298         pinctrl_spi2ck_default: spi2ck_default {
1299                 function = "SPI2CK";
1300                 groups = "SPI2CK";
1301         };
1302
1303         pinctrl_spi2cs0_default: spi2cs0_default {
1304                 function = "SPI2CS0";
1305                 groups = "SPI2CS0";
1306         };
1307
1308         pinctrl_spi2cs1_default: spi2cs1_default {
1309                 function = "SPI2CS1";
1310                 groups = "SPI2CS1";
1311         };
1312
1313         pinctrl_spi2miso_default: spi2miso_default {
1314                 function = "SPI2MISO";
1315                 groups = "SPI2MISO";
1316         };
1317
1318         pinctrl_spi2mosi_default: spi2mosi_default {
1319                 function = "SPI2MOSI";
1320                 groups = "SPI2MOSI";
1321         };
1322
1323         pinctrl_timer3_default: timer3_default {
1324                 function = "TIMER3";
1325                 groups = "TIMER3";
1326         };
1327
1328         pinctrl_timer4_default: timer4_default {
1329                 function = "TIMER4";
1330                 groups = "TIMER4";
1331         };
1332
1333         pinctrl_timer5_default: timer5_default {
1334                 function = "TIMER5";
1335                 groups = "TIMER5";
1336         };
1337
1338         pinctrl_timer6_default: timer6_default {
1339                 function = "TIMER6";
1340                 groups = "TIMER6";
1341         };
1342
1343         pinctrl_timer7_default: timer7_default {
1344                 function = "TIMER7";
1345                 groups = "TIMER7";
1346         };
1347
1348         pinctrl_timer8_default: timer8_default {
1349                 function = "TIMER8";
1350                 groups = "TIMER8";
1351         };
1352
1353         pinctrl_txd1_default: txd1_default {
1354                 function = "TXD1";
1355                 groups = "TXD1";
1356         };
1357
1358         pinctrl_txd2_default: txd2_default {
1359                 function = "TXD2";
1360                 groups = "TXD2";
1361         };
1362
1363         pinctrl_txd3_default: txd3_default {
1364                 function = "TXD3";
1365                 groups = "TXD3";
1366         };
1367
1368         pinctrl_txd4_default: txd4_default {
1369                 function = "TXD4";
1370                 groups = "TXD4";
1371         };
1372
1373         pinctrl_uart6_default: uart6_default {
1374                 function = "UART6";
1375                 groups = "UART6";
1376         };
1377
1378         pinctrl_usbcki_default: usbcki_default {
1379                 function = "USBCKI";
1380                 groups = "USBCKI";
1381         };
1382
1383         pinctrl_vgabiosrom_default: vgabiosrom_default {
1384                 function = "VGABIOSROM";
1385                 groups = "VGABIOSROM";
1386         };
1387
1388         pinctrl_vgahs_default: vgahs_default {
1389                 function = "VGAHS";
1390                 groups = "VGAHS";
1391         };
1392
1393         pinctrl_vgavs_default: vgavs_default {
1394                 function = "VGAVS";
1395                 groups = "VGAVS";
1396         };
1397
1398         pinctrl_vpi24_default: vpi24_default {
1399                 function = "VPI24";
1400                 groups = "VPI24";
1401         };
1402
1403         pinctrl_vpo_default: vpo_default {
1404                 function = "VPO";
1405                 groups = "VPO";
1406         };
1407
1408         pinctrl_wdtrst1_default: wdtrst1_default {
1409                 function = "WDTRST1";
1410                 groups = "WDTRST1";
1411         };
1412
1413         pinctrl_wdtrst2_default: wdtrst2_default {
1414                 function = "WDTRST2";
1415                 groups = "WDTRST2";
1416         };
1417 };