1 #include "skeleton.dtsi"
5 compatible = "aspeed,ast2500";
8 interrupt-parent = <&vic>;
15 compatible = "arm,arm1176jzf-s";
22 compatible = "simple-bus";
27 vic: interrupt-controller@1e6c0080 {
28 compatible = "aspeed,ast2400-vic";
30 #interrupt-cells = <1>;
31 valid-sources = <0xfefff7ff 0x0807ffff>;
32 reg = <0x1e6c0080 0x80>;
35 mac0: ethernet@1e660000 {
36 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
37 reg = <0x1e660000 0x180>;
42 mac1: ethernet@1e680000 {
43 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
44 reg = <0x1e680000 0x180>;
50 compatible = "simple-bus";
55 clk_clkin: clk_clkin@1e6e2070 {
57 compatible = "aspeed,g5-clkin-clock";
58 reg = <0x1e6e2070 0x04>;
61 syscon: syscon@1e6e2000 {
62 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
63 reg = <0x1e6e2000 0x1a8>;
66 compatible = "aspeed,g5-pinctrl";
67 aspeed,external-nodes = <&gfx &lhc>;
69 pinctrl_acpi_default: acpi_default {
74 pinctrl_adc0_default: adc0_default {
79 pinctrl_adc1_default: adc1_default {
84 pinctrl_adc10_default: adc10_default {
89 pinctrl_adc11_default: adc11_default {
94 pinctrl_adc12_default: adc12_default {
99 pinctrl_adc13_default: adc13_default {
104 pinctrl_adc14_default: adc14_default {
109 pinctrl_adc15_default: adc15_default {
114 pinctrl_adc2_default: adc2_default {
119 pinctrl_adc3_default: adc3_default {
124 pinctrl_adc4_default: adc4_default {
129 pinctrl_adc5_default: adc5_default {
134 pinctrl_adc6_default: adc6_default {
139 pinctrl_adc7_default: adc7_default {
144 pinctrl_adc8_default: adc8_default {
149 pinctrl_adc9_default: adc9_default {
154 pinctrl_bmcint_default: bmcint_default {
159 pinctrl_ddcclk_default: ddcclk_default {
164 pinctrl_ddcdat_default: ddcdat_default {
169 pinctrl_espi_default: espi_default {
174 pinctrl_fwspics1_default: fwspics1_default {
175 function = "FWSPICS1";
179 pinctrl_fwspics2_default: fwspics2_default {
180 function = "FWSPICS2";
184 pinctrl_gpid0_default: gpid0_default {
189 pinctrl_gpid2_default: gpid2_default {
194 pinctrl_gpid4_default: gpid4_default {
199 pinctrl_gpid6_default: gpid6_default {
204 pinctrl_gpie0_default: gpie0_default {
209 pinctrl_gpie2_default: gpie2_default {
214 pinctrl_gpie4_default: gpie4_default {
219 pinctrl_gpie6_default: gpie6_default {
224 pinctrl_i2c10_default: i2c10_default {
229 pinctrl_i2c11_default: i2c11_default {
234 pinctrl_i2c12_default: i2c12_default {
239 pinctrl_i2c13_default: i2c13_default {
244 pinctrl_i2c14_default: i2c14_default {
249 pinctrl_i2c3_default: i2c3_default {
254 pinctrl_i2c4_default: i2c4_default {
259 pinctrl_i2c5_default: i2c5_default {
264 pinctrl_i2c6_default: i2c6_default {
269 pinctrl_i2c7_default: i2c7_default {
274 pinctrl_i2c8_default: i2c8_default {
279 pinctrl_i2c9_default: i2c9_default {
284 pinctrl_lad0_default: lad0_default {
289 pinctrl_lad1_default: lad1_default {
294 pinctrl_lad2_default: lad2_default {
299 pinctrl_lad3_default: lad3_default {
304 pinctrl_lclk_default: lclk_default {
309 pinctrl_lframe_default: lframe_default {
314 pinctrl_lpchc_default: lpchc_default {
319 pinctrl_lpcpd_default: lpcpd_default {
324 pinctrl_lpcplus_default: lpcplus_default {
325 function = "LPCPLUS";
329 pinctrl_lpcpme_default: lpcpme_default {
334 pinctrl_lpcrst_default: lpcrst_default {
339 pinctrl_lpcsmi_default: lpcsmi_default {
344 pinctrl_lsirq_default: lsirq_default {
349 pinctrl_mac1link_default: mac1link_default {
350 function = "MAC1LINK";
354 pinctrl_mac2link_default: mac2link_default {
355 function = "MAC2LINK";
359 pinctrl_mdio1_default: mdio1_default {
364 pinctrl_mdio2_default: mdio2_default {
369 pinctrl_ncts1_default: ncts1_default {
374 pinctrl_ncts2_default: ncts2_default {
379 pinctrl_ncts3_default: ncts3_default {
384 pinctrl_ncts4_default: ncts4_default {
389 pinctrl_ndcd1_default: ndcd1_default {
394 pinctrl_ndcd2_default: ndcd2_default {
399 pinctrl_ndcd3_default: ndcd3_default {
404 pinctrl_ndcd4_default: ndcd4_default {
409 pinctrl_ndsr1_default: ndsr1_default {
414 pinctrl_ndsr2_default: ndsr2_default {
419 pinctrl_ndsr3_default: ndsr3_default {
424 pinctrl_ndsr4_default: ndsr4_default {
429 pinctrl_ndtr1_default: ndtr1_default {
434 pinctrl_ndtr2_default: ndtr2_default {
439 pinctrl_ndtr3_default: ndtr3_default {
444 pinctrl_ndtr4_default: ndtr4_default {
449 pinctrl_nri1_default: nri1_default {
454 pinctrl_nri2_default: nri2_default {
459 pinctrl_nri3_default: nri3_default {
464 pinctrl_nri4_default: nri4_default {
469 pinctrl_nrts1_default: nrts1_default {
474 pinctrl_nrts2_default: nrts2_default {
479 pinctrl_nrts3_default: nrts3_default {
484 pinctrl_nrts4_default: nrts4_default {
489 pinctrl_oscclk_default: oscclk_default {
494 pinctrl_pewake_default: pewake_default {
499 pinctrl_pnor_default: pnor_default {
504 pinctrl_pwm0_default: pwm0_default {
509 pinctrl_pwm1_default: pwm1_default {
514 pinctrl_pwm2_default: pwm2_default {
519 pinctrl_pwm3_default: pwm3_default {
524 pinctrl_pwm4_default: pwm4_default {
529 pinctrl_pwm5_default: pwm5_default {
534 pinctrl_pwm6_default: pwm6_default {
539 pinctrl_pwm7_default: pwm7_default {
544 pinctrl_rgmii1_default: rgmii1_default {
549 pinctrl_rgmii2_default: rgmii2_default {
554 pinctrl_rmii1_default: rmii1_default {
559 pinctrl_rmii2_default: rmii2_default {
564 pinctrl_rxd1_default: rxd1_default {
569 pinctrl_rxd2_default: rxd2_default {
574 pinctrl_rxd3_default: rxd3_default {
579 pinctrl_rxd4_default: rxd4_default {
584 pinctrl_salt1_default: salt1_default {
589 pinctrl_salt10_default: salt10_default {
594 pinctrl_salt11_default: salt11_default {
599 pinctrl_salt12_default: salt12_default {
604 pinctrl_salt13_default: salt13_default {
609 pinctrl_salt14_default: salt14_default {
614 pinctrl_salt2_default: salt2_default {
619 pinctrl_salt3_default: salt3_default {
624 pinctrl_salt4_default: salt4_default {
629 pinctrl_salt5_default: salt5_default {
634 pinctrl_salt6_default: salt6_default {
639 pinctrl_salt7_default: salt7_default {
644 pinctrl_salt8_default: salt8_default {
649 pinctrl_salt9_default: salt9_default {
654 pinctrl_scl1_default: scl1_default {
659 pinctrl_scl2_default: scl2_default {
664 pinctrl_sd1_default: sd1_default {
669 pinctrl_sd2_default: sd2_default {
674 pinctrl_sda1_default: sda1_default {
679 pinctrl_sda2_default: sda2_default {
684 pinctrl_sgps1_default: sgps1_default {
689 pinctrl_sgps2_default: sgps2_default {
694 pinctrl_sioonctrl_default: sioonctrl_default {
695 function = "SIOONCTRL";
696 groups = "SIOONCTRL";
699 pinctrl_siopbi_default: siopbi_default {
704 pinctrl_siopbo_default: siopbo_default {
709 pinctrl_siopwreq_default: siopwreq_default {
710 function = "SIOPWREQ";
714 pinctrl_siopwrgd_default: siopwrgd_default {
715 function = "SIOPWRGD";
719 pinctrl_sios3_default: sios3_default {
724 pinctrl_sios5_default: sios5_default {
729 pinctrl_siosci_default: siosci_default {
734 pinctrl_spi1_default: spi1_default {
739 pinctrl_spi1cs1_default: spi1cs1_default {
740 function = "SPI1CS1";
744 pinctrl_spi1debug_default: spi1debug_default {
745 function = "SPI1DEBUG";
746 groups = "SPI1DEBUG";
749 pinctrl_spi1passthru_default: spi1passthru_default {
750 function = "SPI1PASSTHRU";
751 groups = "SPI1PASSTHRU";
754 pinctrl_spi2ck_default: spi2ck_default {
759 pinctrl_spi2cs0_default: spi2cs0_default {
760 function = "SPI2CS0";
764 pinctrl_spi2cs1_default: spi2cs1_default {
765 function = "SPI2CS1";
769 pinctrl_spi2miso_default: spi2miso_default {
770 function = "SPI2MISO";
774 pinctrl_spi2mosi_default: spi2mosi_default {
775 function = "SPI2MOSI";
779 pinctrl_timer3_default: timer3_default {
784 pinctrl_timer4_default: timer4_default {
789 pinctrl_timer5_default: timer5_default {
794 pinctrl_timer6_default: timer6_default {
799 pinctrl_timer7_default: timer7_default {
804 pinctrl_timer8_default: timer8_default {
809 pinctrl_txd1_default: txd1_default {
814 pinctrl_txd2_default: txd2_default {
819 pinctrl_txd3_default: txd3_default {
824 pinctrl_txd4_default: txd4_default {
829 pinctrl_uart6_default: uart6_default {
834 pinctrl_usbcki_default: usbcki_default {
839 pinctrl_vgabiosrom_default: vgabiosrom_default {
840 function = "VGABIOSROM";
841 groups = "VGABIOSROM";
844 pinctrl_vgahs_default: vgahs_default {
849 pinctrl_vgavs_default: vgavs_default {
854 pinctrl_vpi24_default: vpi24_default {
859 pinctrl_vpo_default: vpo_default {
864 pinctrl_wdtrst1_default: wdtrst1_default {
865 function = "WDTRST1";
869 pinctrl_wdtrst2_default: wdtrst2_default {
870 function = "WDTRST2";
877 clk_hpll: clk_hpll@1e6e2024 {
879 compatible = "aspeed,g5-hpll-clock";
880 reg = <0x1e6e2024 0x4>;
881 clocks = <&clk_clkin>;
884 clk_ahb: clk_ahb@1e6e2070 {
886 compatible = "aspeed,g5-ahb-clock";
887 reg = <0x1e6e2070 0x4>;
888 clocks = <&clk_hpll>;
891 clk_apb: clk_apb@1e6e2008 {
893 compatible = "aspeed,g5-apb-clock";
894 reg = <0x1e6e2008 0x4>;
895 clocks = <&clk_hpll>;
898 clk_uart: clk_uart@1e6e2008 {
900 compatible = "aspeed,uart-clock";
901 reg = <0x1e6e202c 0x4>;
904 gfx: display@1e6e6000 {
905 compatible = "aspeed,ast2500-gfx", "syscon";
906 reg = <0x1e6e6000 0x1000>;
911 compatible = "mmio-sram";
912 reg = <0x1e720000 0x9000>; // 36K
915 gpio: gpio@1e780000 {
918 compatible = "aspeed,ast2500-gpio";
919 reg = <0x1e780000 0x1000>;
921 gpio-ranges = <&pinctrl 0 0 220>;
922 interrupt-controller;
925 timer: timer@1e782000 {
926 compatible = "aspeed,ast2400-timer";
927 reg = <0x1e782000 0x90>;
928 // The moxart_timer driver registers only one
929 // interrupt and assumes it's for timer 1
930 //interrupts = <16 17 18 35 36 37 38 39>;
937 compatible = "aspeed,wdt";
938 reg = <0x1e785000 0x1c>;
943 compatible = "aspeed,wdt";
944 reg = <0x1e785020 0x1c>;
950 compatible = "aspeed,wdt";
951 reg = <0x1e785074 0x1c>;
955 uart1: serial@1e783000 {
956 compatible = "ns16550a";
957 reg = <0x1e783000 0x1000>;
960 clocks = <&clk_uart>;
966 compatible = "aspeed,ast2500-lpc", "simple-mfd";
967 reg = <0x1e789000 0x1000>;
969 #address-cells = <1>;
971 ranges = <0 0x1e789000 0x1000>;
974 compatible = "aspeed,ast2500-lpc-bmc";
978 lpc_host: lpc-host@80 {
979 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
982 #address-cells = <1>;
984 ranges = <0 0x80 0x1e0>;
989 compatible = "aspeed,ast2500-lhc";
990 reg = <0x20 0x24 0x48 0x8>;
995 uart2: serial@1e78d000 {
996 compatible = "ns16550a";
997 reg = <0x1e78d000 0x1000>;
1000 clocks = <&clk_uart>;
1002 status = "disabled";
1005 uart3: serial@1e78e000 {
1006 compatible = "ns16550a";
1007 reg = <0x1e78e000 0x1000>;
1010 clocks = <&clk_uart>;
1012 status = "disabled";
1015 uart4: serial@1e78f000 {
1016 compatible = "ns16550a";
1017 reg = <0x1e78f000 0x1000>;
1020 clocks = <&clk_uart>;
1022 status = "disabled";
1025 uart5: serial@1e784000 {
1026 compatible = "ns16550a";
1027 reg = <0x1e784000 0x1000>;
1030 clocks = <&clk_uart>;
1031 current-speed = <38400>;
1033 status = "disabled";
1036 uart6: serial@1e787000 {
1037 compatible = "ns16550a";
1038 reg = <0x1e787000 0x1000>;
1041 clocks = <&clk_uart>;
1043 status = "disabled";