arch/arm/boot/dts/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include "skeleton.dtsi"
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2500";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm1176jzf-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         ahb {
  46                 compatible = "simple-bus";
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 ranges;
  50
  51                 fmc: flash-controller@1e620000 {
  52                         reg = < 0x1e620000 0xc4
  53                                 0x20000000 0x10000000 >;
  54                         #address-cells = <1>;
  55                         #size-cells = <0>;
  56                         compatible = "aspeed,ast2500-fmc";
  57                         status = "disabled";
  58                         interrupts = <19>;
  59                         flash@0 {
  60                                 reg = < 0 >;
  61                                 compatible = "jedec,spi-nor";
  62                                 status = "disabled";
  63                         };
  64                         flash@1 {
  65                                 reg = < 1 >;
  66                                 compatible = "jedec,spi-nor";
  67                                 status = "disabled";
  68                         };
  69                         flash@2 {
  70                                 reg = < 2 >;
  71                                 compatible = "jedec,spi-nor";
  72                                 status = "disabled";
  73                         };
  74                 };
  75
  76                 spi1: flash-controller@1e630000 {
  77                         reg = < 0x1e630000 0xc4
  78                                 0x30000000 0x08000000 >;
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         compatible = "aspeed,ast2500-spi";
  82                         status = "disabled";
  83                         flash@0 {
  84                                 reg = < 0 >;
  85                                 compatible = "jedec,spi-nor";
  86                                 status = "disabled";
  87                         };
  88                         flash@1 {
  89                                 reg = < 1 >;
  90                                 compatible = "jedec,spi-nor";
  91                                 status = "disabled";
  92                         };
  93                 };
  94
  95                 spi2: flash-controller@1e631000 {
  96                         reg = < 0x1e631000 0xc4
  97                                 0x38000000 0x08000000 >;
  98                         #address-cells = <1>;
  99                         #size-cells = <0>;
 100                         compatible = "aspeed,ast2500-spi";
 101                         status = "disabled";
 102                         flash@0 {
 103                                 reg = < 0 >;
 104                                 compatible = "jedec,spi-nor";
 105                                 status = "disabled";
 106                         };
 107                         flash@1 {
 108                                 reg = < 1 >;
 109                                 compatible = "jedec,spi-nor";
 110                                 status = "disabled";
 111                         };
 112                 };
 113
 114                 vic: interrupt-controller@1e6c0080 {
 115                         compatible = "aspeed,ast2400-vic";
 116                         interrupt-controller;
 117                         #interrupt-cells = <1>;
 118                         valid-sources = <0xfefff7ff 0x0807ffff>;
 119                         reg = <0x1e6c0080 0x80>;
 120                 };
 121
 122                 mac0: ethernet@1e660000 {
 123                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 124                         reg = <0x1e660000 0x180>;
 125                         interrupts = <2>;
 126                         status = "disabled";
 127                 };
 128
 129                 mac1: ethernet@1e680000 {
 130                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 131                         reg = <0x1e680000 0x180>;
 132                         interrupts = <3>;
 133                         status = "disabled";
 134                 };
 135
 136                 apb {
 137                         compatible = "simple-bus";
 138                         #address-cells = <1>;
 139                         #size-cells = <1>;
 140                         ranges;
 141
 142                         syscon: syscon@1e6e2000 {
 143                                 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
 144                                 reg = <0x1e6e2000 0x1a8>;
 145                                 #address-cells = <1>;
 146                                 #size-cells = <0>;
 147
 148                                 clk_clkin: clk_clkin@70 {
 149                                         #clock-cells = <0>;
 150                                         compatible = "aspeed,g5-clkin-clock", "fixed-clock";
 151                                         reg = <0x70>;
 152                                         clock-frequency = <24000000>;
 153                                 };
 154
 155                                 clk_hpll: clk_hpll@24 {
 156                                         #clock-cells = <0>;
 157                                         compatible = "aspeed,g5-hpll-clock", "fixed-clock";
 158                                         reg = <0x24>;
 159                                         clocks = <&clk_clkin>;
 160                                         clock-frequency = <792000000>;
 161                                 };
 162
 163                                 clk_ahb: clk_ahb@70 {
 164                                         #clock-cells = <0>;
 165                                         compatible = "aspeed,g5-ahb-clock", "fixed-clock";
 166                                         reg = <0x70>;
 167                                         clocks = <&clk_hpll>;
 168                                         clock-frequency = <198000000>;
 169                                 };
 170
 171                                 clk_apb: clk_apb@8 {
 172                                         #clock-cells = <0>;
 173                                         compatible = "aspeed,g5-apb-clock", "fixed-clock";
 174                                         reg = <0x08>;
 175                                         clocks = <&clk_hpll>;
 176                                         clock-frequency = <24750000>;
 177                                 };
 178
 179                                 clk_uart: clk_uart@2c {
 180                                         #clock-cells = <0>;
 181                                         compatible = "aspeed,uart-clock", "fixed-clock";
 182                                         reg = <0x2c>;
 183                                         clock-frequency = <24000000>;
 184                                 };
 185
 186                                 pinctrl: pinctrl {
 187                                         compatible = "aspeed,g5-pinctrl";
 188                                         aspeed,external-nodes = <&gfx &lhc>;
 189
 190                                 };
 191
 192                         };
 193
 194                         gfx: display@1e6e6000 {
 195                                 compatible = "aspeed,ast2500-gfx", "syscon";
 196                                 reg = <0x1e6e6000 0x1000>;
 197                                 reg-io-width = <4>;
 198                         };
 199
 200                         adc: adc@1e6e9000 {
 201                                 compatible = "aspeed,ast2500-adc";
 202                                 reg = <0x1e6e9000 0xb0>;
 203                                 clocks = <&clk_apb>;
 204                                 #io-channel-cells = <1>;
 205                                 status = "disabled";
 206                         };
 207
 208                         sram@1e720000 {
 209                                 compatible = "mmio-sram";
 210                                 reg = <0x1e720000 0x9000>;      // 36K
 211                         };
 212
 213                         gpio: gpio@1e780000 {
 214                                 #gpio-cells = <2>;
 215                                 gpio-controller;
 216                                 compatible = "aspeed,ast2500-gpio";
 217                                 reg = <0x1e780000 0x1000>;
 218                                 interrupts = <20>;
 219                                 gpio-ranges = <&pinctrl 0 0 220>;
 220                                 interrupt-controller;
 221                         };
 222
 223                         timer: timer@1e782000 {
 224                                 /* This timer is a Faraday FTTMR010 derivative */
 225                                 compatible = "aspeed,ast2400-timer";
 226                                 reg = <0x1e782000 0x90>;
 227                                 interrupts = <16 17 18 35 36 37 38 39>;
 228                                 clocks = <&clk_apb>;
 229                                 clock-names = "PCLK";
 230                         };
 231
 232                         uart1: serial@1e783000 {
 233                                 compatible = "ns16550a";
 234                                 reg = <0x1e783000 0x20>;
 235                                 reg-shift = <2>;
 236                                 interrupts = <9>;
 237                                 clocks = <&clk_uart>;
 238                                 no-loopback-test;
 239                                 status = "disabled";
 240                         };
 241
 242                         uart5: serial@1e784000 {
 243                                 compatible = "ns16550a";
 244                                 reg = <0x1e784000 0x20>;
 245                                 reg-shift = <2>;
 246                                 interrupts = <10>;
 247                                 clocks = <&clk_uart>;
 248                                 no-loopback-test;
 249                                 status = "disabled";
 250                         };
 251
 252                         wdt1: watchdog@1e785000 {
 253                                 compatible = "aspeed,ast2500-wdt";
 254                                 reg = <0x1e785000 0x20>;
 255                         };
 256
 257                         wdt2: watchdog@1e785020 {
 258                                 compatible = "aspeed,ast2500-wdt";
 259                                 reg = <0x1e785020 0x20>;
 260                         };
 261
 262                         wdt3: watchdog@1e785040 {
 263                                 compatible = "aspeed,ast2500-wdt";
 264                                 reg = <0x1e785040 0x20>;
 265                                 status = "disabled";
 266                         };
 267
 268                         lpc: lpc@1e789000 {
 269                                 compatible = "aspeed,ast2500-lpc", "simple-mfd";
 270                                 reg = <0x1e789000 0x1000>;
 271
 272                                 #address-cells = <1>;
 273                                 #size-cells = <1>;
 274                                 ranges = <0 0x1e789000 0x1000>;
 275
 276                                 lpc_bmc: lpc-bmc@0 {
 277                                         compatible = "aspeed,ast2500-lpc-bmc";
 278                                         reg = <0x0 0x80>;
 279                                 };
 280
 281                                 lpc_host: lpc-host@80 {
 282                                         compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
 283                                         reg = <0x80 0x1e0>;
 284
 285                                         #address-cells = <1>;
 286                                         #size-cells = <1>;
 287                                         ranges = <0 0x80 0x1e0>;
 288
 289                                         reg-io-width = <4>;
 290
 291                                         lhc: lhc@20 {
 292                                                 compatible = "aspeed,ast2500-lhc";
 293                                                 reg = <0x20 0x24 0x48 0x8>;
 294                                         };
 295                                 };
 296                         };
 297
 298                         vuart: serial@1e787000 {
 299                                 compatible = "aspeed,ast2500-vuart";
 300                                 reg = <0x1e787000 0x40>;
 301                                 reg-shift = <2>;
 302                                 interrupts = <10>;
 303                                 clocks = <&clk_uart>;
 304                                 no-loopback-test;
 305                                 status = "disabled";
 306                         };
 307
 308                         uart2: serial@1e78d000 {
 309                                 compatible = "ns16550a";
 310                                 reg = <0x1e78d000 0x20>;
 311                                 reg-shift = <2>;
 312                                 interrupts = <32>;
 313                                 clocks = <&clk_uart>;
 314                                 no-loopback-test;
 315                                 status = "disabled";
 316                         };
 317
 318                         uart3: serial@1e78e000 {
 319                                 compatible = "ns16550a";
 320                                 reg = <0x1e78e000 0x20>;
 321                                 reg-shift = <2>;
 322                                 interrupts = <33>;
 323                                 clocks = <&clk_uart>;
 324                                 no-loopback-test;
 325                                 status = "disabled";
 326                         };
 327
 328                         uart4: serial@1e78f000 {
 329                                 compatible = "ns16550a";
 330                                 reg = <0x1e78f000 0x20>;
 331                                 reg-shift = <2>;
 332                                 interrupts = <34>;
 333                                 clocks = <&clk_uart>;
 334                                 no-loopback-test;
 335                                 status = "disabled";
 336                         };
 337
 338                         i2c: i2c@1e78a000 {
 339                                 compatible = "simple-bus";
 340                                 #address-cells = <1>;
 341                                 #size-cells = <1>;
 342                                 ranges = <0 0x1e78a000 0x1000>;
 343                         };
 344                 };
 345         };
 346 };
 347
 348 &i2c {
 349         i2c_ic: interrupt-controller@0 {
 350                 #interrupt-cells = <1>;
 351                 compatible = "aspeed,ast2500-i2c-ic";
 352                 reg = <0x0 0x40>;
 353                 interrupts = <12>;
 354                 interrupt-controller;
 355         };
 356
 357         i2c0: i2c-bus@40 {
 358                 #address-cells = <1>;
 359                 #size-cells = <0>;
 360                 #interrupt-cells = <1>;
 361
 362                 reg = <0x40 0x40>;
 363                 compatible = "aspeed,ast2500-i2c-bus";
 364                 clocks = <&clk_apb>;
 365                 bus-frequency = <100000>;
 366                 interrupts = <0>;
 367                 interrupt-parent = <&i2c_ic>;
 368                 status = "disabled";
 369                 /* Does not need pinctrl properties */
 370         };
 371
 372         i2c1: i2c-bus@80 {
 373                 #address-cells = <1>;
 374                 #size-cells = <0>;
 375                 #interrupt-cells = <1>;
 376
 377                 reg = <0x80 0x40>;
 378                 compatible = "aspeed,ast2500-i2c-bus";
 379                 clocks = <&clk_apb>;
 380                 bus-frequency = <100000>;
 381                 interrupts = <1>;
 382                 interrupt-parent = <&i2c_ic>;
 383                 status = "disabled";
 384                 /* Does not need pinctrl properties */
 385         };
 386
 387         i2c2: i2c-bus@c0 {
 388                 #address-cells = <1>;
 389                 #size-cells = <0>;
 390                 #interrupt-cells = <1>;
 391
 392                 reg = <0xc0 0x40>;
 393                 compatible = "aspeed,ast2500-i2c-bus";
 394                 clocks = <&clk_apb>;
 395                 bus-frequency = <100000>;
 396                 interrupts = <2>;
 397                 interrupt-parent = <&i2c_ic>;
 398                 pinctrl-names = "default";
 399                 pinctrl-0 = <&pinctrl_i2c3_default>;
 400                 status = "disabled";
 401         };
 402
 403         i2c3: i2c-bus@100 {
 404                 #address-cells = <1>;
 405                 #size-cells = <0>;
 406                 #interrupt-cells = <1>;
 407
 408                 reg = <0x100 0x40>;
 409                 compatible = "aspeed,ast2500-i2c-bus";
 410                 clocks = <&clk_apb>;
 411                 bus-frequency = <100000>;
 412                 interrupts = <3>;
 413                 interrupt-parent = <&i2c_ic>;
 414                 pinctrl-names = "default";
 415                 pinctrl-0 = <&pinctrl_i2c4_default>;
 416                 status = "disabled";
 417         };
 418
 419         i2c4: i2c-bus@140 {
 420                 #address-cells = <1>;
 421                 #size-cells = <0>;
 422                 #interrupt-cells = <1>;
 423
 424                 reg = <0x140 0x40>;
 425                 compatible = "aspeed,ast2500-i2c-bus";
 426                 clocks = <&clk_apb>;
 427                 bus-frequency = <100000>;
 428                 interrupts = <4>;
 429                 interrupt-parent = <&i2c_ic>;
 430                 pinctrl-names = "default";
 431                 pinctrl-0 = <&pinctrl_i2c5_default>;
 432                 status = "disabled";
 433         };
 434
 435         i2c5: i2c-bus@180 {
 436                 #address-cells = <1>;
 437                 #size-cells = <0>;
 438                 #interrupt-cells = <1>;
 439
 440                 reg = <0x180 0x40>;
 441                 compatible = "aspeed,ast2500-i2c-bus";
 442                 clocks = <&clk_apb>;
 443                 bus-frequency = <100000>;
 444                 interrupts = <5>;
 445                 interrupt-parent = <&i2c_ic>;
 446                 pinctrl-names = "default";
 447                 pinctrl-0 = <&pinctrl_i2c6_default>;
 448                 status = "disabled";
 449         };
 450
 451         i2c6: i2c-bus@1c0 {
 452                 #address-cells = <1>;
 453                 #size-cells = <0>;
 454                 #interrupt-cells = <1>;
 455
 456                 reg = <0x1c0 0x40>;
 457                 compatible = "aspeed,ast2500-i2c-bus";
 458                 clocks = <&clk_apb>;
 459                 bus-frequency = <100000>;
 460                 interrupts = <6>;
 461                 interrupt-parent = <&i2c_ic>;
 462                 pinctrl-names = "default";
 463                 pinctrl-0 = <&pinctrl_i2c7_default>;
 464                 status = "disabled";
 465         };
 466
 467         i2c7: i2c-bus@300 {
 468                 #address-cells = <1>;
 469                 #size-cells = <0>;
 470                 #interrupt-cells = <1>;
 471
 472                 reg = <0x300 0x40>;
 473                 compatible = "aspeed,ast2500-i2c-bus";
 474                 clocks = <&clk_apb>;
 475                 bus-frequency = <100000>;
 476                 interrupts = <7>;
 477                 interrupt-parent = <&i2c_ic>;
 478                 pinctrl-names = "default";
 479                 pinctrl-0 = <&pinctrl_i2c8_default>;
 480                 status = "disabled";
 481         };
 482
 483         i2c8: i2c-bus@340 {
 484                 #address-cells = <1>;
 485                 #size-cells = <0>;
 486                 #interrupt-cells = <1>;
 487
 488                 reg = <0x340 0x40>;
 489                 compatible = "aspeed,ast2500-i2c-bus";
 490                 clocks = <&clk_apb>;
 491                 bus-frequency = <100000>;
 492                 interrupts = <8>;
 493                 interrupt-parent = <&i2c_ic>;
 494                 pinctrl-names = "default";
 495                 pinctrl-0 = <&pinctrl_i2c9_default>;
 496                 status = "disabled";
 497         };
 498
 499         i2c9: i2c-bus@380 {
 500                 #address-cells = <1>;
 501                 #size-cells = <0>;
 502                 #interrupt-cells = <1>;
 503
 504                 reg = <0x380 0x40>;
 505                 compatible = "aspeed,ast2500-i2c-bus";
 506                 clocks = <&clk_apb>;
 507                 bus-frequency = <100000>;
 508                 interrupts = <9>;
 509                 interrupt-parent = <&i2c_ic>;
 510                 pinctrl-names = "default";
 511                 pinctrl-0 = <&pinctrl_i2c10_default>;
 512                 status = "disabled";
 513         };
 514
 515         i2c10: i2c-bus@3c0 {
 516                 #address-cells = <1>;
 517                 #size-cells = <0>;
 518                 #interrupt-cells = <1>;
 519
 520                 reg = <0x3c0 0x40>;
 521                 compatible = "aspeed,ast2500-i2c-bus";
 522                 clocks = <&clk_apb>;
 523                 bus-frequency = <100000>;
 524                 interrupts = <10>;
 525                 interrupt-parent = <&i2c_ic>;
 526                 pinctrl-names = "default";
 527                 pinctrl-0 = <&pinctrl_i2c11_default>;
 528                 status = "disabled";
 529         };
 530
 531         i2c11: i2c-bus@400 {
 532                 #address-cells = <1>;
 533                 #size-cells = <0>;
 534                 #interrupt-cells = <1>;
 535
 536                 reg = <0x400 0x40>;
 537                 compatible = "aspeed,ast2500-i2c-bus";
 538                 clocks = <&clk_apb>;
 539                 bus-frequency = <100000>;
 540                 interrupts = <11>;
 541                 interrupt-parent = <&i2c_ic>;
 542                 pinctrl-names = "default";
 543                 pinctrl-0 = <&pinctrl_i2c12_default>;
 544                 status = "disabled";
 545         };
 546
 547         i2c12: i2c-bus@440 {
 548                 #address-cells = <1>;
 549                 #size-cells = <0>;
 550                 #interrupt-cells = <1>;
 551
 552                 reg = <0x440 0x40>;
 553                 compatible = "aspeed,ast2500-i2c-bus";
 554                 clocks = <&clk_apb>;
 555                 bus-frequency = <100000>;
 556                 interrupts = <12>;
 557                 interrupt-parent = <&i2c_ic>;
 558                 pinctrl-names = "default";
 559                 pinctrl-0 = <&pinctrl_i2c13_default>;
 560                 status = "disabled";
 561         };
 562
 563         i2c13: i2c-bus@480 {
 564                 #address-cells = <1>;
 565                 #size-cells = <0>;
 566                 #interrupt-cells = <1>;
 567
 568                 reg = <0x480 0x40>;
 569                 compatible = "aspeed,ast2500-i2c-bus";
 570                 clocks = <&clk_apb>;
 571                 bus-frequency = <100000>;
 572                 interrupts = <13>;
 573                 interrupt-parent = <&i2c_ic>;
 574                 pinctrl-names = "default";
 575                 pinctrl-0 = <&pinctrl_i2c14_default>;
 576                 status = "disabled";
 577         };
 578 };
 579
 580 &pinctrl {
 581         pinctrl_acpi_default: acpi_default {
 582                 function = "ACPI";
 583                 groups = "ACPI";
 584         };
 585
 586         pinctrl_adc0_default: adc0_default {
 587                 function = "ADC0";
 588                 groups = "ADC0";
 589         };
 590
 591         pinctrl_adc1_default: adc1_default {
 592                 function = "ADC1";
 593                 groups = "ADC1";
 594         };
 595
 596         pinctrl_adc10_default: adc10_default {
 597                 function = "ADC10";
 598                 groups = "ADC10";
 599         };
 600
 601         pinctrl_adc11_default: adc11_default {
 602                 function = "ADC11";
 603                 groups = "ADC11";
 604         };
 605
 606         pinctrl_adc12_default: adc12_default {
 607                 function = "ADC12";
 608                 groups = "ADC12";
 609         };
 610
 611         pinctrl_adc13_default: adc13_default {
 612                 function = "ADC13";
 613                 groups = "ADC13";
 614         };
 615
 616         pinctrl_adc14_default: adc14_default {
 617                 function = "ADC14";
 618                 groups = "ADC14";
 619         };
 620
 621         pinctrl_adc15_default: adc15_default {
 622                 function = "ADC15";
 623                 groups = "ADC15";
 624         };
 625
 626         pinctrl_adc2_default: adc2_default {
 627                 function = "ADC2";
 628                 groups = "ADC2";
 629         };
 630
 631         pinctrl_adc3_default: adc3_default {
 632                 function = "ADC3";
 633                 groups = "ADC3";
 634         };
 635
 636         pinctrl_adc4_default: adc4_default {
 637                 function = "ADC4";
 638                 groups = "ADC4";
 639         };
 640
 641         pinctrl_adc5_default: adc5_default {
 642                 function = "ADC5";
 643                 groups = "ADC5";
 644         };
 645
 646         pinctrl_adc6_default: adc6_default {
 647                 function = "ADC6";
 648                 groups = "ADC6";
 649         };
 650
 651         pinctrl_adc7_default: adc7_default {
 652                 function = "ADC7";
 653                 groups = "ADC7";
 654         };
 655
 656         pinctrl_adc8_default: adc8_default {
 657                 function = "ADC8";
 658                 groups = "ADC8";
 659         };
 660
 661         pinctrl_adc9_default: adc9_default {
 662                 function = "ADC9";
 663                 groups = "ADC9";
 664         };
 665
 666         pinctrl_bmcint_default: bmcint_default {
 667                 function = "BMCINT";
 668                 groups = "BMCINT";
 669         };
 670
 671         pinctrl_ddcclk_default: ddcclk_default {
 672                 function = "DDCCLK";
 673                 groups = "DDCCLK";
 674         };
 675
 676         pinctrl_ddcdat_default: ddcdat_default {
 677                 function = "DDCDAT";
 678                 groups = "DDCDAT";
 679         };
 680
 681         pinctrl_espi_default: espi_default {
 682                 function = "ESPI";
 683                 groups = "ESPI";
 684         };
 685
 686         pinctrl_fwspics1_default: fwspics1_default {
 687                 function = "FWSPICS1";
 688                 groups = "FWSPICS1";
 689         };
 690
 691         pinctrl_fwspics2_default: fwspics2_default {
 692                 function = "FWSPICS2";
 693                 groups = "FWSPICS2";
 694         };
 695
 696         pinctrl_gpid0_default: gpid0_default {
 697                 function = "GPID0";
 698                 groups = "GPID0";
 699         };
 700
 701         pinctrl_gpid2_default: gpid2_default {
 702                 function = "GPID2";
 703                 groups = "GPID2";
 704         };
 705
 706         pinctrl_gpid4_default: gpid4_default {
 707                 function = "GPID4";
 708                 groups = "GPID4";
 709         };
 710
 711         pinctrl_gpid6_default: gpid6_default {
 712                 function = "GPID6";
 713                 groups = "GPID6";
 714         };
 715
 716         pinctrl_gpie0_default: gpie0_default {
 717                 function = "GPIE0";
 718                 groups = "GPIE0";
 719         };
 720
 721         pinctrl_gpie2_default: gpie2_default {
 722                 function = "GPIE2";
 723                 groups = "GPIE2";
 724         };
 725
 726         pinctrl_gpie4_default: gpie4_default {
 727                 function = "GPIE4";
 728                 groups = "GPIE4";
 729         };
 730
 731         pinctrl_gpie6_default: gpie6_default {
 732                 function = "GPIE6";
 733                 groups = "GPIE6";
 734         };
 735
 736         pinctrl_i2c10_default: i2c10_default {
 737                 function = "I2C10";
 738                 groups = "I2C10";
 739         };
 740
 741         pinctrl_i2c11_default: i2c11_default {
 742                 function = "I2C11";
 743                 groups = "I2C11";
 744         };
 745
 746         pinctrl_i2c12_default: i2c12_default {
 747                 function = "I2C12";
 748                 groups = "I2C12";
 749         };
 750
 751         pinctrl_i2c13_default: i2c13_default {
 752                 function = "I2C13";
 753                 groups = "I2C13";
 754         };
 755
 756         pinctrl_i2c14_default: i2c14_default {
 757                 function = "I2C14";
 758                 groups = "I2C14";
 759         };
 760
 761         pinctrl_i2c3_default: i2c3_default {
 762                 function = "I2C3";
 763                 groups = "I2C3";
 764         };
 765
 766         pinctrl_i2c4_default: i2c4_default {
 767                 function = "I2C4";
 768                 groups = "I2C4";
 769         };
 770
 771         pinctrl_i2c5_default: i2c5_default {
 772                 function = "I2C5";
 773                 groups = "I2C5";
 774         };
 775
 776         pinctrl_i2c6_default: i2c6_default {
 777                 function = "I2C6";
 778                 groups = "I2C6";
 779         };
 780
 781         pinctrl_i2c7_default: i2c7_default {
 782                 function = "I2C7";
 783                 groups = "I2C7";
 784         };
 785
 786         pinctrl_i2c8_default: i2c8_default {
 787                 function = "I2C8";
 788                 groups = "I2C8";
 789         };
 790
 791         pinctrl_i2c9_default: i2c9_default {
 792                 function = "I2C9";
 793                 groups = "I2C9";
 794         };
 795
 796         pinctrl_lad0_default: lad0_default {
 797                 function = "LAD0";
 798                 groups = "LAD0";
 799         };
 800
 801         pinctrl_lad1_default: lad1_default {
 802                 function = "LAD1";
 803                 groups = "LAD1";
 804         };
 805
 806         pinctrl_lad2_default: lad2_default {
 807                 function = "LAD2";
 808                 groups = "LAD2";
 809         };
 810
 811         pinctrl_lad3_default: lad3_default {
 812                 function = "LAD3";
 813                 groups = "LAD3";
 814         };
 815
 816         pinctrl_lclk_default: lclk_default {
 817                 function = "LCLK";
 818                 groups = "LCLK";
 819         };
 820
 821         pinctrl_lframe_default: lframe_default {
 822                 function = "LFRAME";
 823                 groups = "LFRAME";
 824         };
 825
 826         pinctrl_lpchc_default: lpchc_default {
 827                 function = "LPCHC";
 828                 groups = "LPCHC";
 829         };
 830
 831         pinctrl_lpcpd_default: lpcpd_default {
 832                 function = "LPCPD";
 833                 groups = "LPCPD";
 834         };
 835
 836         pinctrl_lpcplus_default: lpcplus_default {
 837                 function = "LPCPLUS";
 838                 groups = "LPCPLUS";
 839         };
 840
 841         pinctrl_lpcpme_default: lpcpme_default {
 842                 function = "LPCPME";
 843                 groups = "LPCPME";
 844         };
 845
 846         pinctrl_lpcrst_default: lpcrst_default {
 847                 function = "LPCRST";
 848                 groups = "LPCRST";
 849         };
 850
 851         pinctrl_lpcsmi_default: lpcsmi_default {
 852                 function = "LPCSMI";
 853                 groups = "LPCSMI";
 854         };
 855
 856         pinctrl_lsirq_default: lsirq_default {
 857                 function = "LSIRQ";
 858                 groups = "LSIRQ";
 859         };
 860
 861         pinctrl_mac1link_default: mac1link_default {
 862                 function = "MAC1LINK";
 863                 groups = "MAC1LINK";
 864         };
 865
 866         pinctrl_mac2link_default: mac2link_default {
 867                 function = "MAC2LINK";
 868                 groups = "MAC2LINK";
 869         };
 870
 871         pinctrl_mdio1_default: mdio1_default {
 872                 function = "MDIO1";
 873                 groups = "MDIO1";
 874         };
 875
 876         pinctrl_mdio2_default: mdio2_default {
 877                 function = "MDIO2";
 878                 groups = "MDIO2";
 879         };
 880
 881         pinctrl_ncts1_default: ncts1_default {
 882                 function = "NCTS1";
 883                 groups = "NCTS1";
 884         };
 885
 886         pinctrl_ncts2_default: ncts2_default {
 887                 function = "NCTS2";
 888                 groups = "NCTS2";
 889         };
 890
 891         pinctrl_ncts3_default: ncts3_default {
 892                 function = "NCTS3";
 893                 groups = "NCTS3";
 894         };
 895
 896         pinctrl_ncts4_default: ncts4_default {
 897                 function = "NCTS4";
 898                 groups = "NCTS4";
 899         };
 900
 901         pinctrl_ndcd1_default: ndcd1_default {
 902                 function = "NDCD1";
 903                 groups = "NDCD1";
 904         };
 905
 906         pinctrl_ndcd2_default: ndcd2_default {
 907                 function = "NDCD2";
 908                 groups = "NDCD2";
 909         };
 910
 911         pinctrl_ndcd3_default: ndcd3_default {
 912                 function = "NDCD3";
 913                 groups = "NDCD3";
 914         };
 915
 916         pinctrl_ndcd4_default: ndcd4_default {
 917                 function = "NDCD4";
 918                 groups = "NDCD4";
 919         };
 920
 921         pinctrl_ndsr1_default: ndsr1_default {
 922                 function = "NDSR1";
 923                 groups = "NDSR1";
 924         };
 925
 926         pinctrl_ndsr2_default: ndsr2_default {
 927                 function = "NDSR2";
 928                 groups = "NDSR2";
 929         };
 930
 931         pinctrl_ndsr3_default: ndsr3_default {
 932                 function = "NDSR3";
 933                 groups = "NDSR3";
 934         };
 935
 936         pinctrl_ndsr4_default: ndsr4_default {
 937                 function = "NDSR4";
 938                 groups = "NDSR4";
 939         };
 940
 941         pinctrl_ndtr1_default: ndtr1_default {
 942                 function = "NDTR1";
 943                 groups = "NDTR1";
 944         };
 945
 946         pinctrl_ndtr2_default: ndtr2_default {
 947                 function = "NDTR2";
 948                 groups = "NDTR2";
 949         };
 950
 951         pinctrl_ndtr3_default: ndtr3_default {
 952                 function = "NDTR3";
 953                 groups = "NDTR3";
 954         };
 955
 956         pinctrl_ndtr4_default: ndtr4_default {
 957                 function = "NDTR4";
 958                 groups = "NDTR4";
 959         };
 960
 961         pinctrl_nri1_default: nri1_default {
 962                 function = "NRI1";
 963                 groups = "NRI1";
 964         };
 965
 966         pinctrl_nri2_default: nri2_default {
 967                 function = "NRI2";
 968                 groups = "NRI2";
 969         };
 970
 971         pinctrl_nri3_default: nri3_default {
 972                 function = "NRI3";
 973                 groups = "NRI3";
 974         };
 975
 976         pinctrl_nri4_default: nri4_default {
 977                 function = "NRI4";
 978                 groups = "NRI4";
 979         };
 980
 981         pinctrl_nrts1_default: nrts1_default {
 982                 function = "NRTS1";
 983                 groups = "NRTS1";
 984         };
 985
 986         pinctrl_nrts2_default: nrts2_default {
 987                 function = "NRTS2";
 988                 groups = "NRTS2";
 989         };
 990
 991         pinctrl_nrts3_default: nrts3_default {
 992                 function = "NRTS3";
 993                 groups = "NRTS3";
 994         };
 995
 996         pinctrl_nrts4_default: nrts4_default {
 997                 function = "NRTS4";
 998                 groups = "NRTS4";
 999         };
1000
1001         pinctrl_oscclk_default: oscclk_default {
1002                 function = "OSCCLK";
1003                 groups = "OSCCLK";
1004         };
1005
1006         pinctrl_pewake_default: pewake_default {
1007                 function = "PEWAKE";
1008                 groups = "PEWAKE";
1009         };
1010
1011         pinctrl_pnor_default: pnor_default {
1012                 function = "PNOR";
1013                 groups = "PNOR";
1014         };
1015
1016         pinctrl_pwm0_default: pwm0_default {
1017                 function = "PWM0";
1018                 groups = "PWM0";
1019         };
1020
1021         pinctrl_pwm1_default: pwm1_default {
1022                 function = "PWM1";
1023                 groups = "PWM1";
1024         };
1025
1026         pinctrl_pwm2_default: pwm2_default {
1027                 function = "PWM2";
1028                 groups = "PWM2";
1029         };
1030
1031         pinctrl_pwm3_default: pwm3_default {
1032                 function = "PWM3";
1033                 groups = "PWM3";
1034         };
1035
1036         pinctrl_pwm4_default: pwm4_default {
1037                 function = "PWM4";
1038                 groups = "PWM4";
1039         };
1040
1041         pinctrl_pwm5_default: pwm5_default {
1042                 function = "PWM5";
1043                 groups = "PWM5";
1044         };
1045
1046         pinctrl_pwm6_default: pwm6_default {
1047                 function = "PWM6";
1048                 groups = "PWM6";
1049         };
1050
1051         pinctrl_pwm7_default: pwm7_default {
1052                 function = "PWM7";
1053                 groups = "PWM7";
1054         };
1055
1056         pinctrl_rgmii1_default: rgmii1_default {
1057                 function = "RGMII1";
1058                 groups = "RGMII1";
1059         };
1060
1061         pinctrl_rgmii2_default: rgmii2_default {
1062                 function = "RGMII2";
1063                 groups = "RGMII2";
1064         };
1065
1066         pinctrl_rmii1_default: rmii1_default {
1067                 function = "RMII1";
1068                 groups = "RMII1";
1069         };
1070
1071         pinctrl_rmii2_default: rmii2_default {
1072                 function = "RMII2";
1073                 groups = "RMII2";
1074         };
1075
1076         pinctrl_rxd1_default: rxd1_default {
1077                 function = "RXD1";
1078                 groups = "RXD1";
1079         };
1080
1081         pinctrl_rxd2_default: rxd2_default {
1082                 function = "RXD2";
1083                 groups = "RXD2";
1084         };
1085
1086         pinctrl_rxd3_default: rxd3_default {
1087                 function = "RXD3";
1088                 groups = "RXD3";
1089         };
1090
1091         pinctrl_rxd4_default: rxd4_default {
1092                 function = "RXD4";
1093                 groups = "RXD4";
1094         };
1095
1096         pinctrl_salt1_default: salt1_default {
1097                 function = "SALT1";
1098                 groups = "SALT1";
1099         };
1100
1101         pinctrl_salt10_default: salt10_default {
1102                 function = "SALT10";
1103                 groups = "SALT10";
1104         };
1105
1106         pinctrl_salt11_default: salt11_default {
1107                 function = "SALT11";
1108                 groups = "SALT11";
1109         };
1110
1111         pinctrl_salt12_default: salt12_default {
1112                 function = "SALT12";
1113                 groups = "SALT12";
1114         };
1115
1116         pinctrl_salt13_default: salt13_default {
1117                 function = "SALT13";
1118                 groups = "SALT13";
1119         };
1120
1121         pinctrl_salt14_default: salt14_default {
1122                 function = "SALT14";
1123                 groups = "SALT14";
1124         };
1125
1126         pinctrl_salt2_default: salt2_default {
1127                 function = "SALT2";
1128                 groups = "SALT2";
1129         };
1130
1131         pinctrl_salt3_default: salt3_default {
1132                 function = "SALT3";
1133                 groups = "SALT3";
1134         };
1135
1136         pinctrl_salt4_default: salt4_default {
1137                 function = "SALT4";
1138                 groups = "SALT4";
1139         };
1140
1141         pinctrl_salt5_default: salt5_default {
1142                 function = "SALT5";
1143                 groups = "SALT5";
1144         };
1145
1146         pinctrl_salt6_default: salt6_default {
1147                 function = "SALT6";
1148                 groups = "SALT6";
1149         };
1150
1151         pinctrl_salt7_default: salt7_default {
1152                 function = "SALT7";
1153                 groups = "SALT7";
1154         };
1155
1156         pinctrl_salt8_default: salt8_default {
1157                 function = "SALT8";
1158                 groups = "SALT8";
1159         };
1160
1161         pinctrl_salt9_default: salt9_default {
1162                 function = "SALT9";
1163                 groups = "SALT9";
1164         };
1165
1166         pinctrl_scl1_default: scl1_default {
1167                 function = "SCL1";
1168                 groups = "SCL1";
1169         };
1170
1171         pinctrl_scl2_default: scl2_default {
1172                 function = "SCL2";
1173                 groups = "SCL2";
1174         };
1175
1176         pinctrl_sd1_default: sd1_default {
1177                 function = "SD1";
1178                 groups = "SD1";
1179         };
1180
1181         pinctrl_sd2_default: sd2_default {
1182                 function = "SD2";
1183                 groups = "SD2";
1184         };
1185
1186         pinctrl_sda1_default: sda1_default {
1187                 function = "SDA1";
1188                 groups = "SDA1";
1189         };
1190
1191         pinctrl_sda2_default: sda2_default {
1192                 function = "SDA2";
1193                 groups = "SDA2";
1194         };
1195
1196         pinctrl_sgps1_default: sgps1_default {
1197                 function = "SGPS1";
1198                 groups = "SGPS1";
1199         };
1200
1201         pinctrl_sgps2_default: sgps2_default {
1202                 function = "SGPS2";
1203                 groups = "SGPS2";
1204         };
1205
1206         pinctrl_sioonctrl_default: sioonctrl_default {
1207                 function = "SIOONCTRL";
1208                 groups = "SIOONCTRL";
1209         };
1210
1211         pinctrl_siopbi_default: siopbi_default {
1212                 function = "SIOPBI";
1213                 groups = "SIOPBI";
1214         };
1215
1216         pinctrl_siopbo_default: siopbo_default {
1217                 function = "SIOPBO";
1218                 groups = "SIOPBO";
1219         };
1220
1221         pinctrl_siopwreq_default: siopwreq_default {
1222                 function = "SIOPWREQ";
1223                 groups = "SIOPWREQ";
1224         };
1225
1226         pinctrl_siopwrgd_default: siopwrgd_default {
1227                 function = "SIOPWRGD";
1228                 groups = "SIOPWRGD";
1229         };
1230
1231         pinctrl_sios3_default: sios3_default {
1232                 function = "SIOS3";
1233                 groups = "SIOS3";
1234         };
1235
1236         pinctrl_sios5_default: sios5_default {
1237                 function = "SIOS5";
1238                 groups = "SIOS5";
1239         };
1240
1241         pinctrl_siosci_default: siosci_default {
1242                 function = "SIOSCI";
1243                 groups = "SIOSCI";
1244         };
1245
1246         pinctrl_spi1_default: spi1_default {
1247                 function = "SPI1";
1248                 groups = "SPI1";
1249         };
1250
1251         pinctrl_spi1cs1_default: spi1cs1_default {
1252                 function = "SPI1CS1";
1253                 groups = "SPI1CS1";
1254         };
1255
1256         pinctrl_spi1debug_default: spi1debug_default {
1257                 function = "SPI1DEBUG";
1258                 groups = "SPI1DEBUG";
1259         };
1260
1261         pinctrl_spi1passthru_default: spi1passthru_default {
1262                 function = "SPI1PASSTHRU";
1263                 groups = "SPI1PASSTHRU";
1264         };
1265
1266         pinctrl_spi2ck_default: spi2ck_default {
1267                 function = "SPI2CK";
1268                 groups = "SPI2CK";
1269         };
1270
1271         pinctrl_spi2cs0_default: spi2cs0_default {
1272                 function = "SPI2CS0";
1273                 groups = "SPI2CS0";
1274         };
1275
1276         pinctrl_spi2cs1_default: spi2cs1_default {
1277                 function = "SPI2CS1";
1278                 groups = "SPI2CS1";
1279         };
1280
1281         pinctrl_spi2miso_default: spi2miso_default {
1282                 function = "SPI2MISO";
1283                 groups = "SPI2MISO";
1284         };
1285
1286         pinctrl_spi2mosi_default: spi2mosi_default {
1287                 function = "SPI2MOSI";
1288                 groups = "SPI2MOSI";
1289         };
1290
1291         pinctrl_timer3_default: timer3_default {
1292                 function = "TIMER3";
1293                 groups = "TIMER3";
1294         };
1295
1296         pinctrl_timer4_default: timer4_default {
1297                 function = "TIMER4";
1298                 groups = "TIMER4";
1299         };
1300
1301         pinctrl_timer5_default: timer5_default {
1302                 function = "TIMER5";
1303                 groups = "TIMER5";
1304         };
1305
1306         pinctrl_timer6_default: timer6_default {
1307                 function = "TIMER6";
1308                 groups = "TIMER6";
1309         };
1310
1311         pinctrl_timer7_default: timer7_default {
1312                 function = "TIMER7";
1313                 groups = "TIMER7";
1314         };
1315
1316         pinctrl_timer8_default: timer8_default {
1317                 function = "TIMER8";
1318                 groups = "TIMER8";
1319         };
1320
1321         pinctrl_txd1_default: txd1_default {
1322                 function = "TXD1";
1323                 groups = "TXD1";
1324         };
1325
1326         pinctrl_txd2_default: txd2_default {
1327                 function = "TXD2";
1328                 groups = "TXD2";
1329         };
1330
1331         pinctrl_txd3_default: txd3_default {
1332                 function = "TXD3";
1333                 groups = "TXD3";
1334         };
1335
1336         pinctrl_txd4_default: txd4_default {
1337                 function = "TXD4";
1338                 groups = "TXD4";
1339         };
1340
1341         pinctrl_uart6_default: uart6_default {
1342                 function = "UART6";
1343                 groups = "UART6";
1344         };
1345
1346         pinctrl_usbcki_default: usbcki_default {
1347                 function = "USBCKI";
1348                 groups = "USBCKI";
1349         };
1350
1351         pinctrl_vgabiosrom_default: vgabiosrom_default {
1352                 function = "VGABIOSROM";
1353                 groups = "VGABIOSROM";
1354         };
1355
1356         pinctrl_vgahs_default: vgahs_default {
1357                 function = "VGAHS";
1358                 groups = "VGAHS";
1359         };
1360
1361         pinctrl_vgavs_default: vgavs_default {
1362                 function = "VGAVS";
1363                 groups = "VGAVS";
1364         };
1365
1366         pinctrl_vpi24_default: vpi24_default {
1367                 function = "VPI24";
1368                 groups = "VPI24";
1369         };
1370
1371         pinctrl_vpo_default: vpo_default {
1372                 function = "VPO";
1373                 groups = "VPO";
1374         };
1375
1376         pinctrl_wdtrst1_default: wdtrst1_default {
1377                 function = "WDTRST1";
1378                 groups = "WDTRST1";
1379         };
1380
1381         pinctrl_wdtrst2_default: wdtrst2_default {
1382                 function = "WDTRST2";
1383                 groups = "WDTRST2";
1384         };
1385 };