arch/arm/boot/dts/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2500";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm1176jzf-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         memory@80000000 {
  46                 device_type = "memory";
  47                 reg = <0x80000000 0>;
  48         };
  49
  50         edac: sdram@1e6e0000 {
  51                 compatible = "aspeed,ast2500-sdram-edac";
  52                 reg = <0x1e6e0000 0x174>;
  53                 interrupts = <0>;
  54                 status = "disabled";
  55         };
  56
  57         ahb {
  58                 compatible = "simple-bus";
  59                 #address-cells = <1>;
  60                 #size-cells = <1>;
  61                 ranges;
  62
  63                 fmc: spi@1e620000 {
  64                         reg = < 0x1e620000 0xc4
  65                                 0x20000000 0x10000000 >;
  66                         #address-cells = <1>;
  67                         #size-cells = <0>;
  68                         compatible = "aspeed,ast2500-fmc";
  69                         clocks = <&syscon ASPEED_CLK_AHB>;
  70                         status = "disabled";
  71                         interrupts = <19>;
  72                         flash@0 {
  73                                 reg = < 0 >;
  74                                 compatible = "jedec,spi-nor";
  75                                 status = "disabled";
  76                         };
  77                         flash@1 {
  78                                 reg = < 1 >;
  79                                 compatible = "jedec,spi-nor";
  80                                 status = "disabled";
  81                         };
  82                         flash@2 {
  83                                 reg = < 2 >;
  84                                 compatible = "jedec,spi-nor";
  85                                 status = "disabled";
  86                         };
  87                 };
  88
  89                 spi1: spi@1e630000 {
  90                         reg = < 0x1e630000 0xc4
  91                                 0x30000000 0x08000000 >;
  92                         #address-cells = <1>;
  93                         #size-cells = <0>;
  94                         compatible = "aspeed,ast2500-spi";
  95                         clocks = <&syscon ASPEED_CLK_AHB>;
  96                         status = "disabled";
  97                         flash@0 {
  98                                 reg = < 0 >;
  99                                 compatible = "jedec,spi-nor";
 100                                 status = "disabled";
 101                         };
 102                         flash@1 {
 103                                 reg = < 1 >;
 104                                 compatible = "jedec,spi-nor";
 105                                 status = "disabled";
 106                         };
 107                 };
 108
 109                 spi2: spi@1e631000 {
 110                         reg = < 0x1e631000 0xc4
 111                                 0x38000000 0x08000000 >;
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         compatible = "aspeed,ast2500-spi";
 115                         clocks = <&syscon ASPEED_CLK_AHB>;
 116                         status = "disabled";
 117                         flash@0 {
 118                                 reg = < 0 >;
 119                                 compatible = "jedec,spi-nor";
 120                                 status = "disabled";
 121                         };
 122                         flash@1 {
 123                                 reg = < 1 >;
 124                                 compatible = "jedec,spi-nor";
 125                                 status = "disabled";
 126                         };
 127                 };
 128
 129                 vic: interrupt-controller@1e6c0080 {
 130                         compatible = "aspeed,ast2400-vic";
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133                         valid-sources = <0xfefff7ff 0x0807ffff>;
 134                         reg = <0x1e6c0080 0x80>;
 135                 };
 136
 137                 cvic: copro-interrupt-controller@1e6c2000 {
 138                         compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
 139                         valid-sources = <0xffffffff>;
 140                         copro-sw-interrupts = <1>;
 141                         reg = <0x1e6c2000 0x80>;
 142                 };
 143
 144                 mac0: ethernet@1e660000 {
 145                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 146                         reg = <0x1e660000 0x180>;
 147                         interrupts = <2>;
 148                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 149                         status = "disabled";
 150                 };
 151
 152                 mac1: ethernet@1e680000 {
 153                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 154                         reg = <0x1e680000 0x180>;
 155                         interrupts = <3>;
 156                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 157                         status = "disabled";
 158                 };
 159
 160                 ehci0: usb@1e6a1000 {
 161                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 162                         reg = <0x1e6a1000 0x100>;
 163                         interrupts = <5>;
 164                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 165                         pinctrl-names = "default";
 166                         pinctrl-0 = <&pinctrl_usb2ah_default>;
 167                         status = "disabled";
 168                 };
 169
 170                 ehci1: usb@1e6a3000 {
 171                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 172                         reg = <0x1e6a3000 0x100>;
 173                         interrupts = <13>;
 174                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
 175                         pinctrl-names = "default";
 176                         pinctrl-0 = <&pinctrl_usb2bh_default>;
 177                         status = "disabled";
 178                 };
 179
 180                 uhci: usb@1e6b0000 {
 181                         compatible = "aspeed,ast2500-uhci", "generic-uhci";
 182                         reg = <0x1e6b0000 0x100>;
 183                         interrupts = <14>;
 184                         #ports = <2>;
 185                         clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
 186                         status = "disabled";
 187                         /*
 188                          * No default pinmux, it will follow EHCI, use an explicit pinmux
 189                          * override if you don't enable EHCI
 190                          */
 191                 };
 192
 193                 vhub: usb-vhub@1e6a0000 {
 194                         compatible = "aspeed,ast2500-usb-vhub";
 195                         reg = <0x1e6a0000 0x300>;
 196                         interrupts = <5>;
 197                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 198                         pinctrl-names = "default";
 199                         pinctrl-0 = <&pinctrl_usb2ad_default>;
 200                         status = "disabled";
 201                 };
 202
 203                 apb {
 204                         compatible = "simple-bus";
 205                         #address-cells = <1>;
 206                         #size-cells = <1>;
 207                         ranges;
 208
 209                         syscon: syscon@1e6e2000 {
 210                                 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 211                                 reg = <0x1e6e2000 0x1a8>;
 212                                 #address-cells = <1>;
 213                                 #size-cells = <0>;
 214                                 #clock-cells = <1>;
 215                                 #reset-cells = <1>;
 216
 217                                 pinctrl: pinctrl {
 218                                         compatible = "aspeed,g5-pinctrl";
 219                                         aspeed,external-nodes = <&gfx &lhc>;
 220
 221                                 };
 222
 223                                 p2a: p2a-control {
 224                                         compatible = "aspeed,ast2500-p2a-ctrl";
 225                                         status = "disabled";
 226                                 };
 227                         };
 228
 229                         rng: hwrng@1e6e2078 {
 230                                 compatible = "timeriomem_rng";
 231                                 reg = <0x1e6e2078 0x4>;
 232                                 period = <1>;
 233                                 quality = <100>;
 234                         };
 235
 236                         gfx: display@1e6e6000 {
 237                                 compatible = "aspeed,ast2500-gfx", "syscon";
 238                                 reg = <0x1e6e6000 0x1000>;
 239                                 reg-io-width = <4>;
 240                                 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
 241                                 resets = <&syscon ASPEED_RESET_CRT1>;
 242                                 status = "disabled";
 243                                 interrupts = <0x19>;
 244                         };
 245
 246                         adc: adc@1e6e9000 {
 247                                 compatible = "aspeed,ast2500-adc";
 248                                 reg = <0x1e6e9000 0xb0>;
 249                                 clocks = <&syscon ASPEED_CLK_APB>;
 250                                 resets = <&syscon ASPEED_RESET_ADC>;
 251                                 #io-channel-cells = <1>;
 252                                 status = "disabled";
 253                         };
 254
 255                         video: video@1e700000 {
 256                                 compatible = "aspeed,ast2500-video-engine";
 257                                 reg = <0x1e700000 0x1000>;
 258                                 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
 259                                          <&syscon ASPEED_CLK_GATE_ECLK>;
 260                                 clock-names = "vclk", "eclk";
 261                                 interrupts = <7>;
 262                                 status = "disabled";
 263                         };
 264
 265                         sram: sram@1e720000 {
 266                                 compatible = "mmio-sram";
 267                                 reg = <0x1e720000 0x9000>;      // 36K
 268                         };
 269
 270                         gpio: gpio@1e780000 {
 271                                 #gpio-cells = <2>;
 272                                 gpio-controller;
 273                                 compatible = "aspeed,ast2500-gpio";
 274                                 reg = <0x1e780000 0x1000>;
 275                                 interrupts = <20>;
 276                                 gpio-ranges = <&pinctrl 0 0 220>;
 277                                 clocks = <&syscon ASPEED_CLK_APB>;
 278                                 interrupt-controller;
 279                                 #interrupt-cells = <2>;
 280                         };
 281
 282                         rtc: rtc@1e781000 {
 283                                 compatible = "aspeed,ast2500-rtc";
 284                                 reg = <0x1e781000 0x18>;
 285                                 status = "disabled";
 286                         };
 287
 288                         timer: timer@1e782000 {
 289                                 /* This timer is a Faraday FTTMR010 derivative */
 290                                 compatible = "aspeed,ast2400-timer";
 291                                 reg = <0x1e782000 0x90>;
 292                                 interrupts = <16 17 18 35 36 37 38 39>;
 293                                 clocks = <&syscon ASPEED_CLK_APB>;
 294                                 clock-names = "PCLK";
 295                         };
 296
 297                         uart1: serial@1e783000 {
 298                                 compatible = "ns16550a";
 299                                 reg = <0x1e783000 0x20>;
 300                                 reg-shift = <2>;
 301                                 interrupts = <9>;
 302                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 303                                 resets = <&lpc_reset 4>;
 304                                 no-loopback-test;
 305                                 status = "disabled";
 306                         };
 307
 308                         uart5: serial@1e784000 {
 309                                 compatible = "ns16550a";
 310                                 reg = <0x1e784000 0x20>;
 311                                 reg-shift = <2>;
 312                                 interrupts = <10>;
 313                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 314                                 no-loopback-test;
 315                                 status = "disabled";
 316                         };
 317
 318                         wdt1: watchdog@1e785000 {
 319                                 compatible = "aspeed,ast2500-wdt";
 320                                 reg = <0x1e785000 0x20>;
 321                                 clocks = <&syscon ASPEED_CLK_APB>;
 322                         };
 323
 324                         wdt2: watchdog@1e785020 {
 325                                 compatible = "aspeed,ast2500-wdt";
 326                                 reg = <0x1e785020 0x20>;
 327                                 clocks = <&syscon ASPEED_CLK_APB>;
 328                         };
 329
 330                         wdt3: watchdog@1e785040 {
 331                                 compatible = "aspeed,ast2500-wdt";
 332                                 reg = <0x1e785040 0x20>;
 333                                 clocks = <&syscon ASPEED_CLK_APB>;
 334                                 status = "disabled";
 335                         };
 336
 337                         pwm_tacho: pwm-tacho-controller@1e786000 {
 338                                 compatible = "aspeed,ast2500-pwm-tacho";
 339                                 #address-cells = <1>;
 340                                 #size-cells = <0>;
 341                                 reg = <0x1e786000 0x1000>;
 342                                 clocks = <&syscon ASPEED_CLK_24M>;
 343                                 resets = <&syscon ASPEED_RESET_PWM>;
 344                                 status = "disabled";
 345                         };
 346
 347                         vuart: serial@1e787000 {
 348                                 compatible = "aspeed,ast2500-vuart";
 349                                 reg = <0x1e787000 0x40>;
 350                                 reg-shift = <2>;
 351                                 interrupts = <8>;
 352                                 clocks = <&syscon ASPEED_CLK_APB>;
 353                                 no-loopback-test;
 354                                 status = "disabled";
 355                         };
 356
 357                         lpc: lpc@1e789000 {
 358                                 compatible = "aspeed,ast2500-lpc", "simple-mfd";
 359                                 reg = <0x1e789000 0x1000>;
 360
 361                                 #address-cells = <1>;
 362                                 #size-cells = <1>;
 363                                 ranges = <0x0 0x1e789000 0x1000>;
 364
 365                                 lpc_bmc: lpc-bmc@0 {
 366                                         compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
 367                                         reg = <0x0 0x80>;
 368                                         reg-io-width = <4>;
 369
 370                                         #address-cells = <1>;
 371                                         #size-cells = <1>;
 372                                         ranges = <0x0 0x0 0x80>;
 373
 374                                         kcs1: kcs1@0 {
 375                                                 compatible = "aspeed,ast2500-kcs-bmc";
 376                                                 interrupts = <8>;
 377                                                 kcs_chan = <1>;
 378                                                 status = "disabled";
 379                                         };
 380                                         kcs2: kcs2@0 {
 381                                                 compatible = "aspeed,ast2500-kcs-bmc";
 382                                                 interrupts = <8>;
 383                                                 kcs_chan = <2>;
 384                                                 status = "disabled";
 385                                         };
 386                                         kcs3: kcs3@0 {
 387                                                 compatible = "aspeed,ast2500-kcs-bmc";
 388                                                 interrupts = <8>;
 389                                                 kcs_chan = <3>;
 390                                                 status = "disabled";
 391                                         };
 392                                 };
 393
 394                                 lpc_host: lpc-host@80 {
 395                                         compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
 396                                         reg = <0x80 0x1e0>;
 397                                         reg-io-width = <4>;
 398
 399                                         #address-cells = <1>;
 400                                         #size-cells = <1>;
 401                                         ranges = <0x0 0x80 0x1e0>;
 402
 403                                         kcs4: kcs4@0 {
 404                                                 compatible = "aspeed,ast2500-kcs-bmc";
 405                                                 interrupts = <8>;
 406                                                 kcs_chan = <4>;
 407                                                 status = "disabled";
 408                                         };
 409
 410                                         lpc_ctrl: lpc-ctrl@0 {
 411                                                 compatible = "aspeed,ast2500-lpc-ctrl";
 412                                                 reg = <0x0 0x80>;
 413                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 414                                                 status = "disabled";
 415                                         };
 416
 417                                         lpc_snoop: lpc-snoop@0 {
 418                                                 compatible = "aspeed,ast2500-lpc-snoop";
 419                                                 reg = <0x0 0x80>;
 420                                                 interrupts = <8>;
 421                                                 status = "disabled";
 422                                         };
 423
 424                                         lhc: lhc@20 {
 425                                                 compatible = "aspeed,ast2500-lhc";
 426                                                 reg = <0x20 0x24 0x48 0x8>;
 427                                         };
 428
 429                                         lpc_reset: reset-controller@18 {
 430                                                 compatible = "aspeed,ast2500-lpc-reset";
 431                                                 reg = <0x18 0x4>;
 432                                                 #reset-cells = <1>;
 433                                         };
 434
 435                                         ibt: ibt@c0 {
 436                                                 compatible = "aspeed,ast2500-ibt-bmc";
 437                                                 reg = <0xc0 0x18>;
 438                                                 interrupts = <8>;
 439                                                 status = "disabled";
 440                                         };
 441                                 };
 442                         };
 443
 444                         uart2: serial@1e78d000 {
 445                                 compatible = "ns16550a";
 446                                 reg = <0x1e78d000 0x20>;
 447                                 reg-shift = <2>;
 448                                 interrupts = <32>;
 449                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 450                                 resets = <&lpc_reset 5>;
 451                                 no-loopback-test;
 452                                 status = "disabled";
 453                         };
 454
 455                         uart3: serial@1e78e000 {
 456                                 compatible = "ns16550a";
 457                                 reg = <0x1e78e000 0x20>;
 458                                 reg-shift = <2>;
 459                                 interrupts = <33>;
 460                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 461                                 resets = <&lpc_reset 6>;
 462                                 no-loopback-test;
 463                                 status = "disabled";
 464                         };
 465
 466                         uart4: serial@1e78f000 {
 467                                 compatible = "ns16550a";
 468                                 reg = <0x1e78f000 0x20>;
 469                                 reg-shift = <2>;
 470                                 interrupts = <34>;
 471                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 472                                 resets = <&lpc_reset 7>;
 473                                 no-loopback-test;
 474                                 status = "disabled";
 475                         };
 476
 477                         i2c: bus@1e78a000 {
 478                                 compatible = "simple-bus";
 479                                 #address-cells = <1>;
 480                                 #size-cells = <1>;
 481                                 ranges = <0 0x1e78a000 0x1000>;
 482                         };
 483                 };
 484         };
 485 };
 486
 487 &i2c {
 488         i2c_ic: interrupt-controller@0 {
 489                 #interrupt-cells = <1>;
 490                 compatible = "aspeed,ast2500-i2c-ic";
 491                 reg = <0x0 0x40>;
 492                 interrupts = <12>;
 493                 interrupt-controller;
 494         };
 495
 496         i2c0: i2c-bus@40 {
 497                 #address-cells = <1>;
 498                 #size-cells = <0>;
 499                 #interrupt-cells = <1>;
 500
 501                 reg = <0x40 0x40>;
 502                 compatible = "aspeed,ast2500-i2c-bus";
 503                 clocks = <&syscon ASPEED_CLK_APB>;
 504                 resets = <&syscon ASPEED_RESET_I2C>;
 505                 bus-frequency = <100000>;
 506                 interrupts = <0>;
 507                 interrupt-parent = <&i2c_ic>;
 508                 status = "disabled";
 509                 /* Does not need pinctrl properties */
 510         };
 511
 512         i2c1: i2c-bus@80 {
 513                 #address-cells = <1>;
 514                 #size-cells = <0>;
 515                 #interrupt-cells = <1>;
 516
 517                 reg = <0x80 0x40>;
 518                 compatible = "aspeed,ast2500-i2c-bus";
 519                 clocks = <&syscon ASPEED_CLK_APB>;
 520                 resets = <&syscon ASPEED_RESET_I2C>;
 521                 bus-frequency = <100000>;
 522                 interrupts = <1>;
 523                 interrupt-parent = <&i2c_ic>;
 524                 status = "disabled";
 525                 /* Does not need pinctrl properties */
 526         };
 527
 528         i2c2: i2c-bus@c0 {
 529                 #address-cells = <1>;
 530                 #size-cells = <0>;
 531                 #interrupt-cells = <1>;
 532
 533                 reg = <0xc0 0x40>;
 534                 compatible = "aspeed,ast2500-i2c-bus";
 535                 clocks = <&syscon ASPEED_CLK_APB>;
 536                 resets = <&syscon ASPEED_RESET_I2C>;
 537                 bus-frequency = <100000>;
 538                 interrupts = <2>;
 539                 interrupt-parent = <&i2c_ic>;
 540                 pinctrl-names = "default";
 541                 pinctrl-0 = <&pinctrl_i2c3_default>;
 542                 status = "disabled";
 543         };
 544
 545         i2c3: i2c-bus@100 {
 546                 #address-cells = <1>;
 547                 #size-cells = <0>;
 548                 #interrupt-cells = <1>;
 549
 550                 reg = <0x100 0x40>;
 551                 compatible = "aspeed,ast2500-i2c-bus";
 552                 clocks = <&syscon ASPEED_CLK_APB>;
 553                 resets = <&syscon ASPEED_RESET_I2C>;
 554                 bus-frequency = <100000>;
 555                 interrupts = <3>;
 556                 interrupt-parent = <&i2c_ic>;
 557                 pinctrl-names = "default";
 558                 pinctrl-0 = <&pinctrl_i2c4_default>;
 559                 status = "disabled";
 560         };
 561
 562         i2c4: i2c-bus@140 {
 563                 #address-cells = <1>;
 564                 #size-cells = <0>;
 565                 #interrupt-cells = <1>;
 566
 567                 reg = <0x140 0x40>;
 568                 compatible = "aspeed,ast2500-i2c-bus";
 569                 clocks = <&syscon ASPEED_CLK_APB>;
 570                 resets = <&syscon ASPEED_RESET_I2C>;
 571                 bus-frequency = <100000>;
 572                 interrupts = <4>;
 573                 interrupt-parent = <&i2c_ic>;
 574                 pinctrl-names = "default";
 575                 pinctrl-0 = <&pinctrl_i2c5_default>;
 576                 status = "disabled";
 577         };
 578
 579         i2c5: i2c-bus@180 {
 580                 #address-cells = <1>;
 581                 #size-cells = <0>;
 582                 #interrupt-cells = <1>;
 583
 584                 reg = <0x180 0x40>;
 585                 compatible = "aspeed,ast2500-i2c-bus";
 586                 clocks = <&syscon ASPEED_CLK_APB>;
 587                 resets = <&syscon ASPEED_RESET_I2C>;
 588                 bus-frequency = <100000>;
 589                 interrupts = <5>;
 590                 interrupt-parent = <&i2c_ic>;
 591                 pinctrl-names = "default";
 592                 pinctrl-0 = <&pinctrl_i2c6_default>;
 593                 status = "disabled";
 594         };
 595
 596         i2c6: i2c-bus@1c0 {
 597                 #address-cells = <1>;
 598                 #size-cells = <0>;
 599                 #interrupt-cells = <1>;
 600
 601                 reg = <0x1c0 0x40>;
 602                 compatible = "aspeed,ast2500-i2c-bus";
 603                 clocks = <&syscon ASPEED_CLK_APB>;
 604                 resets = <&syscon ASPEED_RESET_I2C>;
 605                 bus-frequency = <100000>;
 606                 interrupts = <6>;
 607                 interrupt-parent = <&i2c_ic>;
 608                 pinctrl-names = "default";
 609                 pinctrl-0 = <&pinctrl_i2c7_default>;
 610                 status = "disabled";
 611         };
 612
 613         i2c7: i2c-bus@300 {
 614                 #address-cells = <1>;
 615                 #size-cells = <0>;
 616                 #interrupt-cells = <1>;
 617
 618                 reg = <0x300 0x40>;
 619                 compatible = "aspeed,ast2500-i2c-bus";
 620                 clocks = <&syscon ASPEED_CLK_APB>;
 621                 resets = <&syscon ASPEED_RESET_I2C>;
 622                 bus-frequency = <100000>;
 623                 interrupts = <7>;
 624                 interrupt-parent = <&i2c_ic>;
 625                 pinctrl-names = "default";
 626                 pinctrl-0 = <&pinctrl_i2c8_default>;
 627                 status = "disabled";
 628         };
 629
 630         i2c8: i2c-bus@340 {
 631                 #address-cells = <1>;
 632                 #size-cells = <0>;
 633                 #interrupt-cells = <1>;
 634
 635                 reg = <0x340 0x40>;
 636                 compatible = "aspeed,ast2500-i2c-bus";
 637                 clocks = <&syscon ASPEED_CLK_APB>;
 638                 resets = <&syscon ASPEED_RESET_I2C>;
 639                 bus-frequency = <100000>;
 640                 interrupts = <8>;
 641                 interrupt-parent = <&i2c_ic>;
 642                 pinctrl-names = "default";
 643                 pinctrl-0 = <&pinctrl_i2c9_default>;
 644                 status = "disabled";
 645         };
 646
 647         i2c9: i2c-bus@380 {
 648                 #address-cells = <1>;
 649                 #size-cells = <0>;
 650                 #interrupt-cells = <1>;
 651
 652                 reg = <0x380 0x40>;
 653                 compatible = "aspeed,ast2500-i2c-bus";
 654                 clocks = <&syscon ASPEED_CLK_APB>;
 655                 resets = <&syscon ASPEED_RESET_I2C>;
 656                 bus-frequency = <100000>;
 657                 interrupts = <9>;
 658                 interrupt-parent = <&i2c_ic>;
 659                 pinctrl-names = "default";
 660                 pinctrl-0 = <&pinctrl_i2c10_default>;
 661                 status = "disabled";
 662         };
 663
 664         i2c10: i2c-bus@3c0 {
 665                 #address-cells = <1>;
 666                 #size-cells = <0>;
 667                 #interrupt-cells = <1>;
 668
 669                 reg = <0x3c0 0x40>;
 670                 compatible = "aspeed,ast2500-i2c-bus";
 671                 clocks = <&syscon ASPEED_CLK_APB>;
 672                 resets = <&syscon ASPEED_RESET_I2C>;
 673                 bus-frequency = <100000>;
 674                 interrupts = <10>;
 675                 interrupt-parent = <&i2c_ic>;
 676                 pinctrl-names = "default";
 677                 pinctrl-0 = <&pinctrl_i2c11_default>;
 678                 status = "disabled";
 679         };
 680
 681         i2c11: i2c-bus@400 {
 682                 #address-cells = <1>;
 683                 #size-cells = <0>;
 684                 #interrupt-cells = <1>;
 685
 686                 reg = <0x400 0x40>;
 687                 compatible = "aspeed,ast2500-i2c-bus";
 688                 clocks = <&syscon ASPEED_CLK_APB>;
 689                 resets = <&syscon ASPEED_RESET_I2C>;
 690                 bus-frequency = <100000>;
 691                 interrupts = <11>;
 692                 interrupt-parent = <&i2c_ic>;
 693                 pinctrl-names = "default";
 694                 pinctrl-0 = <&pinctrl_i2c12_default>;
 695                 status = "disabled";
 696         };
 697
 698         i2c12: i2c-bus@440 {
 699                 #address-cells = <1>;
 700                 #size-cells = <0>;
 701                 #interrupt-cells = <1>;
 702
 703                 reg = <0x440 0x40>;
 704                 compatible = "aspeed,ast2500-i2c-bus";
 705                 clocks = <&syscon ASPEED_CLK_APB>;
 706                 resets = <&syscon ASPEED_RESET_I2C>;
 707                 bus-frequency = <100000>;
 708                 interrupts = <12>;
 709                 interrupt-parent = <&i2c_ic>;
 710                 pinctrl-names = "default";
 711                 pinctrl-0 = <&pinctrl_i2c13_default>;
 712                 status = "disabled";
 713         };
 714
 715         i2c13: i2c-bus@480 {
 716                 #address-cells = <1>;
 717                 #size-cells = <0>;
 718                 #interrupt-cells = <1>;
 719
 720                 reg = <0x480 0x40>;
 721                 compatible = "aspeed,ast2500-i2c-bus";
 722                 clocks = <&syscon ASPEED_CLK_APB>;
 723                 resets = <&syscon ASPEED_RESET_I2C>;
 724                 bus-frequency = <100000>;
 725                 interrupts = <13>;
 726                 interrupt-parent = <&i2c_ic>;
 727                 pinctrl-names = "default";
 728                 pinctrl-0 = <&pinctrl_i2c14_default>;
 729                 status = "disabled";
 730         };
 731 };
 732
 733 &pinctrl {
 734         pinctrl_acpi_default: acpi_default {
 735                 function = "ACPI";
 736                 groups = "ACPI";
 737         };
 738
 739         pinctrl_adc0_default: adc0_default {
 740                 function = "ADC0";
 741                 groups = "ADC0";
 742         };
 743
 744         pinctrl_adc1_default: adc1_default {
 745                 function = "ADC1";
 746                 groups = "ADC1";
 747         };
 748
 749         pinctrl_adc10_default: adc10_default {
 750                 function = "ADC10";
 751                 groups = "ADC10";
 752         };
 753
 754         pinctrl_adc11_default: adc11_default {
 755                 function = "ADC11";
 756                 groups = "ADC11";
 757         };
 758
 759         pinctrl_adc12_default: adc12_default {
 760                 function = "ADC12";
 761                 groups = "ADC12";
 762         };
 763
 764         pinctrl_adc13_default: adc13_default {
 765                 function = "ADC13";
 766                 groups = "ADC13";
 767         };
 768
 769         pinctrl_adc14_default: adc14_default {
 770                 function = "ADC14";
 771                 groups = "ADC14";
 772         };
 773
 774         pinctrl_adc15_default: adc15_default {
 775                 function = "ADC15";
 776                 groups = "ADC15";
 777         };
 778
 779         pinctrl_adc2_default: adc2_default {
 780                 function = "ADC2";
 781                 groups = "ADC2";
 782         };
 783
 784         pinctrl_adc3_default: adc3_default {
 785                 function = "ADC3";
 786                 groups = "ADC3";
 787         };
 788
 789         pinctrl_adc4_default: adc4_default {
 790                 function = "ADC4";
 791                 groups = "ADC4";
 792         };
 793
 794         pinctrl_adc5_default: adc5_default {
 795                 function = "ADC5";
 796                 groups = "ADC5";
 797         };
 798
 799         pinctrl_adc6_default: adc6_default {
 800                 function = "ADC6";
 801                 groups = "ADC6";
 802         };
 803
 804         pinctrl_adc7_default: adc7_default {
 805                 function = "ADC7";
 806                 groups = "ADC7";
 807         };
 808
 809         pinctrl_adc8_default: adc8_default {
 810                 function = "ADC8";
 811                 groups = "ADC8";
 812         };
 813
 814         pinctrl_adc9_default: adc9_default {
 815                 function = "ADC9";
 816                 groups = "ADC9";
 817         };
 818
 819         pinctrl_bmcint_default: bmcint_default {
 820                 function = "BMCINT";
 821                 groups = "BMCINT";
 822         };
 823
 824         pinctrl_ddcclk_default: ddcclk_default {
 825                 function = "DDCCLK";
 826                 groups = "DDCCLK";
 827         };
 828
 829         pinctrl_ddcdat_default: ddcdat_default {
 830                 function = "DDCDAT";
 831                 groups = "DDCDAT";
 832         };
 833
 834         pinctrl_espi_default: espi_default {
 835                 function = "ESPI";
 836                 groups = "ESPI";
 837         };
 838
 839         pinctrl_fwspics1_default: fwspics1_default {
 840                 function = "FWSPICS1";
 841                 groups = "FWSPICS1";
 842         };
 843
 844         pinctrl_fwspics2_default: fwspics2_default {
 845                 function = "FWSPICS2";
 846                 groups = "FWSPICS2";
 847         };
 848
 849         pinctrl_gpid0_default: gpid0_default {
 850                 function = "GPID0";
 851                 groups = "GPID0";
 852         };
 853
 854         pinctrl_gpid2_default: gpid2_default {
 855                 function = "GPID2";
 856                 groups = "GPID2";
 857         };
 858
 859         pinctrl_gpid4_default: gpid4_default {
 860                 function = "GPID4";
 861                 groups = "GPID4";
 862         };
 863
 864         pinctrl_gpid6_default: gpid6_default {
 865                 function = "GPID6";
 866                 groups = "GPID6";
 867         };
 868
 869         pinctrl_gpie0_default: gpie0_default {
 870                 function = "GPIE0";
 871                 groups = "GPIE0";
 872         };
 873
 874         pinctrl_gpie2_default: gpie2_default {
 875                 function = "GPIE2";
 876                 groups = "GPIE2";
 877         };
 878
 879         pinctrl_gpie4_default: gpie4_default {
 880                 function = "GPIE4";
 881                 groups = "GPIE4";
 882         };
 883
 884         pinctrl_gpie6_default: gpie6_default {
 885                 function = "GPIE6";
 886                 groups = "GPIE6";
 887         };
 888
 889         pinctrl_i2c10_default: i2c10_default {
 890                 function = "I2C10";
 891                 groups = "I2C10";
 892         };
 893
 894         pinctrl_i2c11_default: i2c11_default {
 895                 function = "I2C11";
 896                 groups = "I2C11";
 897         };
 898
 899         pinctrl_i2c12_default: i2c12_default {
 900                 function = "I2C12";
 901                 groups = "I2C12";
 902         };
 903
 904         pinctrl_i2c13_default: i2c13_default {
 905                 function = "I2C13";
 906                 groups = "I2C13";
 907         };
 908
 909         pinctrl_i2c14_default: i2c14_default {
 910                 function = "I2C14";
 911                 groups = "I2C14";
 912         };
 913
 914         pinctrl_i2c3_default: i2c3_default {
 915                 function = "I2C3";
 916                 groups = "I2C3";
 917         };
 918
 919         pinctrl_i2c4_default: i2c4_default {
 920                 function = "I2C4";
 921                 groups = "I2C4";
 922         };
 923
 924         pinctrl_i2c5_default: i2c5_default {
 925                 function = "I2C5";
 926                 groups = "I2C5";
 927         };
 928
 929         pinctrl_i2c6_default: i2c6_default {
 930                 function = "I2C6";
 931                 groups = "I2C6";
 932         };
 933
 934         pinctrl_i2c7_default: i2c7_default {
 935                 function = "I2C7";
 936                 groups = "I2C7";
 937         };
 938
 939         pinctrl_i2c8_default: i2c8_default {
 940                 function = "I2C8";
 941                 groups = "I2C8";
 942         };
 943
 944         pinctrl_i2c9_default: i2c9_default {
 945                 function = "I2C9";
 946                 groups = "I2C9";
 947         };
 948
 949         pinctrl_lad0_default: lad0_default {
 950                 function = "LAD0";
 951                 groups = "LAD0";
 952         };
 953
 954         pinctrl_lad1_default: lad1_default {
 955                 function = "LAD1";
 956                 groups = "LAD1";
 957         };
 958
 959         pinctrl_lad2_default: lad2_default {
 960                 function = "LAD2";
 961                 groups = "LAD2";
 962         };
 963
 964         pinctrl_lad3_default: lad3_default {
 965                 function = "LAD3";
 966                 groups = "LAD3";
 967         };
 968
 969         pinctrl_lclk_default: lclk_default {
 970                 function = "LCLK";
 971                 groups = "LCLK";
 972         };
 973
 974         pinctrl_lframe_default: lframe_default {
 975                 function = "LFRAME";
 976                 groups = "LFRAME";
 977         };
 978
 979         pinctrl_lpchc_default: lpchc_default {
 980                 function = "LPCHC";
 981                 groups = "LPCHC";
 982         };
 983
 984         pinctrl_lpcpd_default: lpcpd_default {
 985                 function = "LPCPD";
 986                 groups = "LPCPD";
 987         };
 988
 989         pinctrl_lpcplus_default: lpcplus_default {
 990                 function = "LPCPLUS";
 991                 groups = "LPCPLUS";
 992         };
 993
 994         pinctrl_lpcpme_default: lpcpme_default {
 995                 function = "LPCPME";
 996                 groups = "LPCPME";
 997         };
 998
 999         pinctrl_lpcrst_default: lpcrst_default {
1000                 function = "LPCRST";
1001                 groups = "LPCRST";
1002         };
1003
1004         pinctrl_lpcsmi_default: lpcsmi_default {
1005                 function = "LPCSMI";
1006                 groups = "LPCSMI";
1007         };
1008
1009         pinctrl_lsirq_default: lsirq_default {
1010                 function = "LSIRQ";
1011                 groups = "LSIRQ";
1012         };
1013
1014         pinctrl_mac1link_default: mac1link_default {
1015                 function = "MAC1LINK";
1016                 groups = "MAC1LINK";
1017         };
1018
1019         pinctrl_mac2link_default: mac2link_default {
1020                 function = "MAC2LINK";
1021                 groups = "MAC2LINK";
1022         };
1023
1024         pinctrl_mdio1_default: mdio1_default {
1025                 function = "MDIO1";
1026                 groups = "MDIO1";
1027         };
1028
1029         pinctrl_mdio2_default: mdio2_default {
1030                 function = "MDIO2";
1031                 groups = "MDIO2";
1032         };
1033
1034         pinctrl_ncts1_default: ncts1_default {
1035                 function = "NCTS1";
1036                 groups = "NCTS1";
1037         };
1038
1039         pinctrl_ncts2_default: ncts2_default {
1040                 function = "NCTS2";
1041                 groups = "NCTS2";
1042         };
1043
1044         pinctrl_ncts3_default: ncts3_default {
1045                 function = "NCTS3";
1046                 groups = "NCTS3";
1047         };
1048
1049         pinctrl_ncts4_default: ncts4_default {
1050                 function = "NCTS4";
1051                 groups = "NCTS4";
1052         };
1053
1054         pinctrl_ndcd1_default: ndcd1_default {
1055                 function = "NDCD1";
1056                 groups = "NDCD1";
1057         };
1058
1059         pinctrl_ndcd2_default: ndcd2_default {
1060                 function = "NDCD2";
1061                 groups = "NDCD2";
1062         };
1063
1064         pinctrl_ndcd3_default: ndcd3_default {
1065                 function = "NDCD3";
1066                 groups = "NDCD3";
1067         };
1068
1069         pinctrl_ndcd4_default: ndcd4_default {
1070                 function = "NDCD4";
1071                 groups = "NDCD4";
1072         };
1073
1074         pinctrl_ndsr1_default: ndsr1_default {
1075                 function = "NDSR1";
1076                 groups = "NDSR1";
1077         };
1078
1079         pinctrl_ndsr2_default: ndsr2_default {
1080                 function = "NDSR2";
1081                 groups = "NDSR2";
1082         };
1083
1084         pinctrl_ndsr3_default: ndsr3_default {
1085                 function = "NDSR3";
1086                 groups = "NDSR3";
1087         };
1088
1089         pinctrl_ndsr4_default: ndsr4_default {
1090                 function = "NDSR4";
1091                 groups = "NDSR4";
1092         };
1093
1094         pinctrl_ndtr1_default: ndtr1_default {
1095                 function = "NDTR1";
1096                 groups = "NDTR1";
1097         };
1098
1099         pinctrl_ndtr2_default: ndtr2_default {
1100                 function = "NDTR2";
1101                 groups = "NDTR2";
1102         };
1103
1104         pinctrl_ndtr3_default: ndtr3_default {
1105                 function = "NDTR3";
1106                 groups = "NDTR3";
1107         };
1108
1109         pinctrl_ndtr4_default: ndtr4_default {
1110                 function = "NDTR4";
1111                 groups = "NDTR4";
1112         };
1113
1114         pinctrl_nri1_default: nri1_default {
1115                 function = "NRI1";
1116                 groups = "NRI1";
1117         };
1118
1119         pinctrl_nri2_default: nri2_default {
1120                 function = "NRI2";
1121                 groups = "NRI2";
1122         };
1123
1124         pinctrl_nri3_default: nri3_default {
1125                 function = "NRI3";
1126                 groups = "NRI3";
1127         };
1128
1129         pinctrl_nri4_default: nri4_default {
1130                 function = "NRI4";
1131                 groups = "NRI4";
1132         };
1133
1134         pinctrl_nrts1_default: nrts1_default {
1135                 function = "NRTS1";
1136                 groups = "NRTS1";
1137         };
1138
1139         pinctrl_nrts2_default: nrts2_default {
1140                 function = "NRTS2";
1141                 groups = "NRTS2";
1142         };
1143
1144         pinctrl_nrts3_default: nrts3_default {
1145                 function = "NRTS3";
1146                 groups = "NRTS3";
1147         };
1148
1149         pinctrl_nrts4_default: nrts4_default {
1150                 function = "NRTS4";
1151                 groups = "NRTS4";
1152         };
1153
1154         pinctrl_oscclk_default: oscclk_default {
1155                 function = "OSCCLK";
1156                 groups = "OSCCLK";
1157         };
1158
1159         pinctrl_pewake_default: pewake_default {
1160                 function = "PEWAKE";
1161                 groups = "PEWAKE";
1162         };
1163
1164         pinctrl_pnor_default: pnor_default {
1165                 function = "PNOR";
1166                 groups = "PNOR";
1167         };
1168
1169         pinctrl_pwm0_default: pwm0_default {
1170                 function = "PWM0";
1171                 groups = "PWM0";
1172         };
1173
1174         pinctrl_pwm1_default: pwm1_default {
1175                 function = "PWM1";
1176                 groups = "PWM1";
1177         };
1178
1179         pinctrl_pwm2_default: pwm2_default {
1180                 function = "PWM2";
1181                 groups = "PWM2";
1182         };
1183
1184         pinctrl_pwm3_default: pwm3_default {
1185                 function = "PWM3";
1186                 groups = "PWM3";
1187         };
1188
1189         pinctrl_pwm4_default: pwm4_default {
1190                 function = "PWM4";
1191                 groups = "PWM4";
1192         };
1193
1194         pinctrl_pwm5_default: pwm5_default {
1195                 function = "PWM5";
1196                 groups = "PWM5";
1197         };
1198
1199         pinctrl_pwm6_default: pwm6_default {
1200                 function = "PWM6";
1201                 groups = "PWM6";
1202         };
1203
1204         pinctrl_pwm7_default: pwm7_default {
1205                 function = "PWM7";
1206                 groups = "PWM7";
1207         };
1208
1209         pinctrl_rgmii1_default: rgmii1_default {
1210                 function = "RGMII1";
1211                 groups = "RGMII1";
1212         };
1213
1214         pinctrl_rgmii2_default: rgmii2_default {
1215                 function = "RGMII2";
1216                 groups = "RGMII2";
1217         };
1218
1219         pinctrl_rmii1_default: rmii1_default {
1220                 function = "RMII1";
1221                 groups = "RMII1";
1222         };
1223
1224         pinctrl_rmii2_default: rmii2_default {
1225                 function = "RMII2";
1226                 groups = "RMII2";
1227         };
1228
1229         pinctrl_rxd1_default: rxd1_default {
1230                 function = "RXD1";
1231                 groups = "RXD1";
1232         };
1233
1234         pinctrl_rxd2_default: rxd2_default {
1235                 function = "RXD2";
1236                 groups = "RXD2";
1237         };
1238
1239         pinctrl_rxd3_default: rxd3_default {
1240                 function = "RXD3";
1241                 groups = "RXD3";
1242         };
1243
1244         pinctrl_rxd4_default: rxd4_default {
1245                 function = "RXD4";
1246                 groups = "RXD4";
1247         };
1248
1249         pinctrl_salt1_default: salt1_default {
1250                 function = "SALT1";
1251                 groups = "SALT1";
1252         };
1253
1254         pinctrl_salt10_default: salt10_default {
1255                 function = "SALT10";
1256                 groups = "SALT10";
1257         };
1258
1259         pinctrl_salt11_default: salt11_default {
1260                 function = "SALT11";
1261                 groups = "SALT11";
1262         };
1263
1264         pinctrl_salt12_default: salt12_default {
1265                 function = "SALT12";
1266                 groups = "SALT12";
1267         };
1268
1269         pinctrl_salt13_default: salt13_default {
1270                 function = "SALT13";
1271                 groups = "SALT13";
1272         };
1273
1274         pinctrl_salt14_default: salt14_default {
1275                 function = "SALT14";
1276                 groups = "SALT14";
1277         };
1278
1279         pinctrl_salt2_default: salt2_default {
1280                 function = "SALT2";
1281                 groups = "SALT2";
1282         };
1283
1284         pinctrl_salt3_default: salt3_default {
1285                 function = "SALT3";
1286                 groups = "SALT3";
1287         };
1288
1289         pinctrl_salt4_default: salt4_default {
1290                 function = "SALT4";
1291                 groups = "SALT4";
1292         };
1293
1294         pinctrl_salt5_default: salt5_default {
1295                 function = "SALT5";
1296                 groups = "SALT5";
1297         };
1298
1299         pinctrl_salt6_default: salt6_default {
1300                 function = "SALT6";
1301                 groups = "SALT6";
1302         };
1303
1304         pinctrl_salt7_default: salt7_default {
1305                 function = "SALT7";
1306                 groups = "SALT7";
1307         };
1308
1309         pinctrl_salt8_default: salt8_default {
1310                 function = "SALT8";
1311                 groups = "SALT8";
1312         };
1313
1314         pinctrl_salt9_default: salt9_default {
1315                 function = "SALT9";
1316                 groups = "SALT9";
1317         };
1318
1319         pinctrl_scl1_default: scl1_default {
1320                 function = "SCL1";
1321                 groups = "SCL1";
1322         };
1323
1324         pinctrl_scl2_default: scl2_default {
1325                 function = "SCL2";
1326                 groups = "SCL2";
1327         };
1328
1329         pinctrl_sd1_default: sd1_default {
1330                 function = "SD1";
1331                 groups = "SD1";
1332         };
1333
1334         pinctrl_sd2_default: sd2_default {
1335                 function = "SD2";
1336                 groups = "SD2";
1337         };
1338
1339         pinctrl_sda1_default: sda1_default {
1340                 function = "SDA1";
1341                 groups = "SDA1";
1342         };
1343
1344         pinctrl_sda2_default: sda2_default {
1345                 function = "SDA2";
1346                 groups = "SDA2";
1347         };
1348
1349         pinctrl_sgps1_default: sgps1_default {
1350                 function = "SGPS1";
1351                 groups = "SGPS1";
1352         };
1353
1354         pinctrl_sgps2_default: sgps2_default {
1355                 function = "SGPS2";
1356                 groups = "SGPS2";
1357         };
1358
1359         pinctrl_sioonctrl_default: sioonctrl_default {
1360                 function = "SIOONCTRL";
1361                 groups = "SIOONCTRL";
1362         };
1363
1364         pinctrl_siopbi_default: siopbi_default {
1365                 function = "SIOPBI";
1366                 groups = "SIOPBI";
1367         };
1368
1369         pinctrl_siopbo_default: siopbo_default {
1370                 function = "SIOPBO";
1371                 groups = "SIOPBO";
1372         };
1373
1374         pinctrl_siopwreq_default: siopwreq_default {
1375                 function = "SIOPWREQ";
1376                 groups = "SIOPWREQ";
1377         };
1378
1379         pinctrl_siopwrgd_default: siopwrgd_default {
1380                 function = "SIOPWRGD";
1381                 groups = "SIOPWRGD";
1382         };
1383
1384         pinctrl_sios3_default: sios3_default {
1385                 function = "SIOS3";
1386                 groups = "SIOS3";
1387         };
1388
1389         pinctrl_sios5_default: sios5_default {
1390                 function = "SIOS5";
1391                 groups = "SIOS5";
1392         };
1393
1394         pinctrl_siosci_default: siosci_default {
1395                 function = "SIOSCI";
1396                 groups = "SIOSCI";
1397         };
1398
1399         pinctrl_spi1_default: spi1_default {
1400                 function = "SPI1";
1401                 groups = "SPI1";
1402         };
1403
1404         pinctrl_spi1cs1_default: spi1cs1_default {
1405                 function = "SPI1CS1";
1406                 groups = "SPI1CS1";
1407         };
1408
1409         pinctrl_spi1debug_default: spi1debug_default {
1410                 function = "SPI1DEBUG";
1411                 groups = "SPI1DEBUG";
1412         };
1413
1414         pinctrl_spi1passthru_default: spi1passthru_default {
1415                 function = "SPI1PASSTHRU";
1416                 groups = "SPI1PASSTHRU";
1417         };
1418
1419         pinctrl_spi2ck_default: spi2ck_default {
1420                 function = "SPI2CK";
1421                 groups = "SPI2CK";
1422         };
1423
1424         pinctrl_spi2cs0_default: spi2cs0_default {
1425                 function = "SPI2CS0";
1426                 groups = "SPI2CS0";
1427         };
1428
1429         pinctrl_spi2cs1_default: spi2cs1_default {
1430                 function = "SPI2CS1";
1431                 groups = "SPI2CS1";
1432         };
1433
1434         pinctrl_spi2miso_default: spi2miso_default {
1435                 function = "SPI2MISO";
1436                 groups = "SPI2MISO";
1437         };
1438
1439         pinctrl_spi2mosi_default: spi2mosi_default {
1440                 function = "SPI2MOSI";
1441                 groups = "SPI2MOSI";
1442         };
1443
1444         pinctrl_timer3_default: timer3_default {
1445                 function = "TIMER3";
1446                 groups = "TIMER3";
1447         };
1448
1449         pinctrl_timer4_default: timer4_default {
1450                 function = "TIMER4";
1451                 groups = "TIMER4";
1452         };
1453
1454         pinctrl_timer5_default: timer5_default {
1455                 function = "TIMER5";
1456                 groups = "TIMER5";
1457         };
1458
1459         pinctrl_timer6_default: timer6_default {
1460                 function = "TIMER6";
1461                 groups = "TIMER6";
1462         };
1463
1464         pinctrl_timer7_default: timer7_default {
1465                 function = "TIMER7";
1466                 groups = "TIMER7";
1467         };
1468
1469         pinctrl_timer8_default: timer8_default {
1470                 function = "TIMER8";
1471                 groups = "TIMER8";
1472         };
1473
1474         pinctrl_txd1_default: txd1_default {
1475                 function = "TXD1";
1476                 groups = "TXD1";
1477         };
1478
1479         pinctrl_txd2_default: txd2_default {
1480                 function = "TXD2";
1481                 groups = "TXD2";
1482         };
1483
1484         pinctrl_txd3_default: txd3_default {
1485                 function = "TXD3";
1486                 groups = "TXD3";
1487         };
1488
1489         pinctrl_txd4_default: txd4_default {
1490                 function = "TXD4";
1491                 groups = "TXD4";
1492         };
1493
1494         pinctrl_uart6_default: uart6_default {
1495                 function = "UART6";
1496                 groups = "UART6";
1497         };
1498
1499         pinctrl_usbcki_default: usbcki_default {
1500                 function = "USBCKI";
1501                 groups = "USBCKI";
1502         };
1503
1504         pinctrl_usb2ah_default: usb2ah_default {
1505                 function = "USB2AH";
1506                 groups = "USB2AH";
1507         };
1508
1509         pinctrl_usb2ad_default: usb2ad_default {
1510                 function = "USB2AD";
1511                 groups = "USB2AD";
1512         };
1513
1514         pinctrl_usb11bhid_default: usb11bhid_default {
1515                 function = "USB11BHID";
1516                 groups = "USB11BHID";
1517         };
1518
1519         pinctrl_usb2bh_default: usb2bh_default {
1520                 function = "USB2BH";
1521                 groups = "USB2BH";
1522         };
1523
1524         pinctrl_vgabiosrom_default: vgabiosrom_default {
1525                 function = "VGABIOSROM";
1526                 groups = "VGABIOSROM";
1527         };
1528
1529         pinctrl_vgahs_default: vgahs_default {
1530                 function = "VGAHS";
1531                 groups = "VGAHS";
1532         };
1533
1534         pinctrl_vgavs_default: vgavs_default {
1535                 function = "VGAVS";
1536                 groups = "VGAVS";
1537         };
1538
1539         pinctrl_vpi24_default: vpi24_default {
1540                 function = "VPI24";
1541                 groups = "VPI24";
1542         };
1543
1544         pinctrl_vpo_default: vpo_default {
1545                 function = "VPO";
1546                 groups = "VPO";
1547         };
1548
1549         pinctrl_wdtrst1_default: wdtrst1_default {
1550                 function = "WDTRST1";
1551                 groups = "WDTRST1";
1552         };
1553
1554         pinctrl_wdtrst2_default: wdtrst2_default {
1555                 function = "WDTRST2";
1556                 groups = "WDTRST2";
1557         };
1558 };