arch/arm/boot/dts/aspeed-g4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2400";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm926ej-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         memory@40000000 {
  46                 device_type = "memory";
  47                 reg = <0x40000000 0>;
  48         };
  49
  50         ahb {
  51                 compatible = "simple-bus";
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 ranges;
  55
  56                 fmc: flash-controller@1e620000 {
  57                         reg = < 0x1e620000 0x94
  58                                 0x20000000 0x10000000 >;
  59                         #address-cells = <1>;
  60                         #size-cells = <0>;
  61                         compatible = "aspeed,ast2400-fmc";
  62                         clocks = <&syscon ASPEED_CLK_AHB>;
  63                         status = "disabled";
  64                         interrupts = <19>;
  65                         flash@0 {
  66                                 reg = < 0 >;
  67                                 compatible = "jedec,spi-nor";
  68                                 status = "disabled";
  69                         };
  70                 };
  71
  72                 spi: flash-controller@1e630000 {
  73                         reg = < 0x1e630000 0x18
  74                                 0x30000000 0x10000000 >;
  75                         #address-cells = <1>;
  76                         #size-cells = <0>;
  77                         compatible = "aspeed,ast2400-spi";
  78                         clocks = <&syscon ASPEED_CLK_AHB>;
  79                         status = "disabled";
  80                         flash@0 {
  81                                 reg = < 0 >;
  82                                 compatible = "jedec,spi-nor";
  83                                 status = "disabled";
  84                         };
  85                 };
  86
  87                 vic: interrupt-controller@1e6c0080 {
  88                         compatible = "aspeed,ast2400-vic";
  89                         interrupt-controller;
  90                         #interrupt-cells = <1>;
  91                         valid-sources = <0xffffffff 0x0007ffff>;
  92                         reg = <0x1e6c0080 0x80>;
  93                 };
  94
  95                 cvic: copro-interrupt-controller@1e6c2000 {
  96                         compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
  97                         valid-sources = <0x7fffffff>;
  98                         reg = <0x1e6c2000 0x80>;
  99                 };
 100
 101                 mac0: ethernet@1e660000 {
 102                         compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
 103                         reg = <0x1e660000 0x180>;
 104                         interrupts = <2>;
 105                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 106                         status = "disabled";
 107                 };
 108
 109                 mac1: ethernet@1e680000 {
 110                         compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
 111                         reg = <0x1e680000 0x180>;
 112                         interrupts = <3>;
 113                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 114                         status = "disabled";
 115                 };
 116
 117                 ehci0: usb@1e6a1000 {
 118                         compatible = "aspeed,ast2400-ehci", "generic-ehci";
 119                         reg = <0x1e6a1000 0x100>;
 120                         interrupts = <5>;
 121                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 122                         pinctrl-names = "default";
 123                         pinctrl-0 = <&pinctrl_usb2h_default>;
 124                         status = "disabled";
 125                 };
 126
 127                 uhci: usb@1e6b0000 {
 128                         compatible = "aspeed,ast2400-uhci", "generic-uhci";
 129                         reg = <0x1e6b0000 0x100>;
 130                         interrupts = <14>;
 131                         #ports = <3>;
 132                         clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
 133                         status = "disabled";
 134                         /*
 135                          * No default pinmux, it will follow EHCI, use an explicit pinmux
 136                          * override if you don't enable EHCI
 137                          */
 138                 };
 139
 140                 vhub: usb-vhub@1e6a0000 {
 141                         compatible = "aspeed,ast2400-usb-vhub";
 142                         reg = <0x1e6a0000 0x300>;
 143                         interrupts = <5>;
 144                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 145                         pinctrl-names = "default";
 146                         pinctrl-0 = <&pinctrl_usb2d_default>;
 147                         status = "disabled";
 148                 };
 149
 150                 apb {
 151                         compatible = "simple-bus";
 152                         #address-cells = <1>;
 153                         #size-cells = <1>;
 154                         ranges;
 155
 156                         syscon: syscon@1e6e2000 {
 157                                 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
 158                                 reg = <0x1e6e2000 0x1a8>;
 159                                 #address-cells = <1>;
 160                                 #size-cells = <0>;
 161                                 #clock-cells = <1>;
 162                                 #reset-cells = <1>;
 163
 164                                 pinctrl: pinctrl {
 165                                         compatible = "aspeed,g4-pinctrl";
 166                                 };
 167
 168                         };
 169
 170                         rng: hwrng@1e6e2078 {
 171                                 compatible = "timeriomem_rng";
 172                                 reg = <0x1e6e2078 0x4>;
 173                                 period = <1>;
 174                                 quality = <100>;
 175                         };
 176
 177                         adc: adc@1e6e9000 {
 178                                 compatible = "aspeed,ast2400-adc";
 179                                 reg = <0x1e6e9000 0xb0>;
 180                                 clocks = <&syscon ASPEED_CLK_APB>;
 181                                 resets = <&syscon ASPEED_RESET_ADC>;
 182                                 #io-channel-cells = <1>;
 183                                 status = "disabled";
 184                         };
 185
 186                         sram: sram@1e720000 {
 187                                 compatible = "mmio-sram";
 188                                 reg = <0x1e720000 0x8000>;      // 32K
 189                         };
 190
 191                         gpio: gpio@1e780000 {
 192                                 #gpio-cells = <2>;
 193                                 gpio-controller;
 194                                 compatible = "aspeed,ast2400-gpio";
 195                                 reg = <0x1e780000 0x1000>;
 196                                 interrupts = <20>;
 197                                 gpio-ranges = <&pinctrl 0 0 220>;
 198                                 clocks = <&syscon ASPEED_CLK_APB>;
 199                                 interrupt-controller;
 200                         };
 201
 202                         timer: timer@1e782000 {
 203                                 /* This timer is a Faraday FTTMR010 derivative */
 204                                 compatible = "aspeed,ast2400-timer";
 205                                 reg = <0x1e782000 0x90>;
 206                                 interrupts = <16 17 18 35 36 37 38 39>;
 207                                 clocks = <&syscon ASPEED_CLK_APB>;
 208                                 clock-names = "PCLK";
 209                         };
 210
 211                         uart1: serial@1e783000 {
 212                                 compatible = "ns16550a";
 213                                 reg = <0x1e783000 0x20>;
 214                                 reg-shift = <2>;
 215                                 interrupts = <9>;
 216                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 217                                 resets = <&lpc_reset 4>;
 218                                 no-loopback-test;
 219                                 status = "disabled";
 220                         };
 221
 222                         uart5: serial@1e784000 {
 223                                 compatible = "ns16550a";
 224                                 reg = <0x1e784000 0x20>;
 225                                 reg-shift = <2>;
 226                                 interrupts = <10>;
 227                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 228                                 no-loopback-test;
 229                                 status = "disabled";
 230                         };
 231
 232                         wdt1: watchdog@1e785000 {
 233                                 compatible = "aspeed,ast2400-wdt";
 234                                 reg = <0x1e785000 0x1c>;
 235                                 clocks = <&syscon ASPEED_CLK_APB>;
 236                         };
 237
 238                         wdt2: watchdog@1e785020 {
 239                                 compatible = "aspeed,ast2400-wdt";
 240                                 reg = <0x1e785020 0x1c>;
 241                                 clocks = <&syscon ASPEED_CLK_APB>;
 242                         };
 243
 244                         pwm_tacho: pwm-tacho-controller@1e786000 {
 245                                 compatible = "aspeed,ast2400-pwm-tacho";
 246                                 #address-cells = <1>;
 247                                 #size-cells = <0>;
 248                                 reg = <0x1e786000 0x1000>;
 249                                 clocks = <&syscon ASPEED_CLK_24M>;
 250                                 resets = <&syscon ASPEED_RESET_PWM>;
 251                                 status = "disabled";
 252                         };
 253
 254                         vuart: serial@1e787000 {
 255                                 compatible = "aspeed,ast2400-vuart";
 256                                 reg = <0x1e787000 0x40>;
 257                                 reg-shift = <2>;
 258                                 interrupts = <8>;
 259                                 clocks = <&syscon ASPEED_CLK_APB>;
 260                                 no-loopback-test;
 261                                 status = "disabled";
 262                         };
 263
 264                         lpc: lpc@1e789000 {
 265                                 compatible = "aspeed,ast2400-lpc", "simple-mfd";
 266                                 reg = <0x1e789000 0x1000>;
 267
 268                                 #address-cells = <1>;
 269                                 #size-cells = <1>;
 270                                 ranges = <0x0 0x1e789000 0x1000>;
 271
 272                                 lpc_bmc: lpc-bmc@0 {
 273                                         compatible = "aspeed,ast2400-lpc-bmc";
 274                                         reg = <0x0 0x80>;
 275                                 };
 276
 277                                 lpc_host: lpc-host@80 {
 278                                         compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
 279                                         reg = <0x80 0x1e0>;
 280                                         reg-io-width = <4>;
 281
 282                                         #address-cells = <1>;
 283                                         #size-cells = <1>;
 284                                         ranges = <0x0 0x80 0x1e0>;
 285
 286                                         lpc_ctrl: lpc-ctrl@0 {
 287                                                 compatible = "aspeed,ast2400-lpc-ctrl";
 288                                                 reg = <0x0 0x80>;
 289                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 290                                                 status = "disabled";
 291                                         };
 292
 293                                         lpc_snoop: lpc-snoop@0 {
 294                                                 compatible = "aspeed,ast2400-lpc-snoop";
 295                                                 reg = <0x0 0x80>;
 296                                                 interrupts = <8>;
 297                                                 status = "disabled";
 298                                         };
 299
 300                                         lhc: lhc@20 {
 301                                                 compatible = "aspeed,ast2400-lhc";
 302                                                 reg = <0x20 0x24 0x48 0x8>;
 303                                         };
 304
 305                                         lpc_reset: reset-controller@18 {
 306                                                 compatible = "aspeed,ast2400-lpc-reset";
 307                                                 reg = <0x18 0x4>;
 308                                                 #reset-cells = <1>;
 309                                         };
 310
 311                                         ibt: ibt@c0  {
 312                                                 compatible = "aspeed,ast2400-ibt-bmc";
 313                                                 reg = <0xc0 0x18>;
 314                                                 interrupts = <8>;
 315                                                 status = "disabled";
 316                                         };
 317                                 };
 318                         };
 319
 320                         uart2: serial@1e78d000 {
 321                                 compatible = "ns16550a";
 322                                 reg = <0x1e78d000 0x20>;
 323                                 reg-shift = <2>;
 324                                 interrupts = <32>;
 325                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 326                                 resets = <&lpc_reset 5>;
 327                                 no-loopback-test;
 328                                 status = "disabled";
 329                         };
 330
 331                         uart3: serial@1e78e000 {
 332                                 compatible = "ns16550a";
 333                                 reg = <0x1e78e000 0x20>;
 334                                 reg-shift = <2>;
 335                                 interrupts = <33>;
 336                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 337                                 resets = <&lpc_reset 6>;
 338                                 no-loopback-test;
 339                                 status = "disabled";
 340                         };
 341
 342                         uart4: serial@1e78f000 {
 343                                 compatible = "ns16550a";
 344                                 reg = <0x1e78f000 0x20>;
 345                                 reg-shift = <2>;
 346                                 interrupts = <34>;
 347                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 348                                 resets = <&lpc_reset 7>;
 349                                 no-loopback-test;
 350                                 status = "disabled";
 351                         };
 352
 353                         i2c: i2c@1e78a000 {
 354                                 compatible = "simple-bus";
 355                                 #address-cells = <1>;
 356                                 #size-cells = <1>;
 357                                 ranges = <0 0x1e78a000 0x1000>;
 358                         };
 359                 };
 360         };
 361 };
 362
 363 &i2c {
 364         i2c_ic: interrupt-controller@0 {
 365                 #interrupt-cells = <1>;
 366                 compatible = "aspeed,ast2400-i2c-ic";
 367                 reg = <0x0 0x40>;
 368                 interrupts = <12>;
 369                 interrupt-controller;
 370         };
 371
 372         i2c0: i2c-bus@40 {
 373                 #address-cells = <1>;
 374                 #size-cells = <0>;
 375                 #interrupt-cells = <1>;
 376
 377                 reg = <0x40 0x40>;
 378                 compatible = "aspeed,ast2400-i2c-bus";
 379                 clocks = <&syscon ASPEED_CLK_APB>;
 380                 resets = <&syscon ASPEED_RESET_I2C>;
 381                 bus-frequency = <100000>;
 382                 interrupts = <0>;
 383                 interrupt-parent = <&i2c_ic>;
 384                 status = "disabled";
 385                 /* Does not need pinctrl properties */
 386         };
 387
 388         i2c1: i2c-bus@80 {
 389                 #address-cells = <1>;
 390                 #size-cells = <0>;
 391                 #interrupt-cells = <1>;
 392
 393                 reg = <0x80 0x40>;
 394                 compatible = "aspeed,ast2400-i2c-bus";
 395                 clocks = <&syscon ASPEED_CLK_APB>;
 396                 resets = <&syscon ASPEED_RESET_I2C>;
 397                 bus-frequency = <100000>;
 398                 interrupts = <1>;
 399                 interrupt-parent = <&i2c_ic>;
 400                 status = "disabled";
 401                 /* Does not need pinctrl properties */
 402         };
 403
 404         i2c2: i2c-bus@c0 {
 405                 #address-cells = <1>;
 406                 #size-cells = <0>;
 407                 #interrupt-cells = <1>;
 408
 409                 reg = <0xc0 0x40>;
 410                 compatible = "aspeed,ast2400-i2c-bus";
 411                 clocks = <&syscon ASPEED_CLK_APB>;
 412                 resets = <&syscon ASPEED_RESET_I2C>;
 413                 bus-frequency = <100000>;
 414                 interrupts = <2>;
 415                 interrupt-parent = <&i2c_ic>;
 416                 pinctrl-names = "default";
 417                 pinctrl-0 = <&pinctrl_i2c3_default>;
 418                 status = "disabled";
 419         };
 420
 421         i2c3: i2c-bus@100 {
 422                 #address-cells = <1>;
 423                 #size-cells = <0>;
 424                 #interrupt-cells = <1>;
 425
 426                 reg = <0x100 0x40>;
 427                 compatible = "aspeed,ast2400-i2c-bus";
 428                 clocks = <&syscon ASPEED_CLK_APB>;
 429                 resets = <&syscon ASPEED_RESET_I2C>;
 430                 bus-frequency = <100000>;
 431                 interrupts = <3>;
 432                 interrupt-parent = <&i2c_ic>;
 433                 pinctrl-names = "default";
 434                 pinctrl-0 = <&pinctrl_i2c4_default>;
 435                 status = "disabled";
 436         };
 437
 438         i2c4: i2c-bus@140 {
 439                 #address-cells = <1>;
 440                 #size-cells = <0>;
 441                 #interrupt-cells = <1>;
 442
 443                 reg = <0x140 0x40>;
 444                 compatible = "aspeed,ast2400-i2c-bus";
 445                 clocks = <&syscon ASPEED_CLK_APB>;
 446                 resets = <&syscon ASPEED_RESET_I2C>;
 447                 bus-frequency = <100000>;
 448                 interrupts = <4>;
 449                 interrupt-parent = <&i2c_ic>;
 450                 pinctrl-names = "default";
 451                 pinctrl-0 = <&pinctrl_i2c5_default>;
 452                 status = "disabled";
 453         };
 454
 455         i2c5: i2c-bus@180 {
 456                 #address-cells = <1>;
 457                 #size-cells = <0>;
 458                 #interrupt-cells = <1>;
 459
 460                 reg = <0x180 0x40>;
 461                 compatible = "aspeed,ast2400-i2c-bus";
 462                 clocks = <&syscon ASPEED_CLK_APB>;
 463                 resets = <&syscon ASPEED_RESET_I2C>;
 464                 bus-frequency = <100000>;
 465                 interrupts = <5>;
 466                 interrupt-parent = <&i2c_ic>;
 467                 pinctrl-names = "default";
 468                 pinctrl-0 = <&pinctrl_i2c6_default>;
 469                 status = "disabled";
 470         };
 471
 472         i2c6: i2c-bus@1c0 {
 473                 #address-cells = <1>;
 474                 #size-cells = <0>;
 475                 #interrupt-cells = <1>;
 476
 477                 reg = <0x1c0 0x40>;
 478                 compatible = "aspeed,ast2400-i2c-bus";
 479                 clocks = <&syscon ASPEED_CLK_APB>;
 480                 resets = <&syscon ASPEED_RESET_I2C>;
 481                 bus-frequency = <100000>;
 482                 interrupts = <6>;
 483                 interrupt-parent = <&i2c_ic>;
 484                 pinctrl-names = "default";
 485                 pinctrl-0 = <&pinctrl_i2c7_default>;
 486                 status = "disabled";
 487         };
 488
 489         i2c7: i2c-bus@300 {
 490                 #address-cells = <1>;
 491                 #size-cells = <0>;
 492                 #interrupt-cells = <1>;
 493
 494                 reg = <0x300 0x40>;
 495                 compatible = "aspeed,ast2400-i2c-bus";
 496                 clocks = <&syscon ASPEED_CLK_APB>;
 497                 resets = <&syscon ASPEED_RESET_I2C>;
 498                 bus-frequency = <100000>;
 499                 interrupts = <7>;
 500                 interrupt-parent = <&i2c_ic>;
 501                 pinctrl-names = "default";
 502                 pinctrl-0 = <&pinctrl_i2c8_default>;
 503                 status = "disabled";
 504         };
 505
 506         i2c8: i2c-bus@340 {
 507                 #address-cells = <1>;
 508                 #size-cells = <0>;
 509                 #interrupt-cells = <1>;
 510
 511                 reg = <0x340 0x40>;
 512                 compatible = "aspeed,ast2400-i2c-bus";
 513                 clocks = <&syscon ASPEED_CLK_APB>;
 514                 resets = <&syscon ASPEED_RESET_I2C>;
 515                 bus-frequency = <100000>;
 516                 interrupts = <8>;
 517                 interrupt-parent = <&i2c_ic>;
 518                 pinctrl-names = "default";
 519                 pinctrl-0 = <&pinctrl_i2c9_default>;
 520                 status = "disabled";
 521         };
 522
 523         i2c9: i2c-bus@380 {
 524                 #address-cells = <1>;
 525                 #size-cells = <0>;
 526                 #interrupt-cells = <1>;
 527
 528                 reg = <0x380 0x40>;
 529                 compatible = "aspeed,ast2400-i2c-bus";
 530                 clocks = <&syscon ASPEED_CLK_APB>;
 531                 resets = <&syscon ASPEED_RESET_I2C>;
 532                 bus-frequency = <100000>;
 533                 interrupts = <9>;
 534                 interrupt-parent = <&i2c_ic>;
 535                 pinctrl-names = "default";
 536                 pinctrl-0 = <&pinctrl_i2c10_default>;
 537                 status = "disabled";
 538         };
 539
 540         i2c10: i2c-bus@3c0 {
 541                 #address-cells = <1>;
 542                 #size-cells = <0>;
 543                 #interrupt-cells = <1>;
 544
 545                 reg = <0x3c0 0x40>;
 546                 compatible = "aspeed,ast2400-i2c-bus";
 547                 clocks = <&syscon ASPEED_CLK_APB>;
 548                 resets = <&syscon ASPEED_RESET_I2C>;
 549                 bus-frequency = <100000>;
 550                 interrupts = <10>;
 551                 interrupt-parent = <&i2c_ic>;
 552                 pinctrl-names = "default";
 553                 pinctrl-0 = <&pinctrl_i2c11_default>;
 554                 status = "disabled";
 555         };
 556
 557         i2c11: i2c-bus@400 {
 558                 #address-cells = <1>;
 559                 #size-cells = <0>;
 560                 #interrupt-cells = <1>;
 561
 562                 reg = <0x400 0x40>;
 563                 compatible = "aspeed,ast2400-i2c-bus";
 564                 clocks = <&syscon ASPEED_CLK_APB>;
 565                 resets = <&syscon ASPEED_RESET_I2C>;
 566                 bus-frequency = <100000>;
 567                 interrupts = <11>;
 568                 interrupt-parent = <&i2c_ic>;
 569                 pinctrl-names = "default";
 570                 pinctrl-0 = <&pinctrl_i2c12_default>;
 571                 status = "disabled";
 572         };
 573
 574         i2c12: i2c-bus@440 {
 575                 #address-cells = <1>;
 576                 #size-cells = <0>;
 577                 #interrupt-cells = <1>;
 578
 579                 reg = <0x440 0x40>;
 580                 compatible = "aspeed,ast2400-i2c-bus";
 581                 clocks = <&syscon ASPEED_CLK_APB>;
 582                 resets = <&syscon ASPEED_RESET_I2C>;
 583                 bus-frequency = <100000>;
 584                 interrupts = <12>;
 585                 interrupt-parent = <&i2c_ic>;
 586                 pinctrl-names = "default";
 587                 pinctrl-0 = <&pinctrl_i2c13_default>;
 588                 status = "disabled";
 589         };
 590
 591         i2c13: i2c-bus@480 {
 592                 #address-cells = <1>;
 593                 #size-cells = <0>;
 594                 #interrupt-cells = <1>;
 595
 596                 reg = <0x480 0x40>;
 597                 compatible = "aspeed,ast2400-i2c-bus";
 598                 clocks = <&syscon ASPEED_CLK_APB>;
 599                 resets = <&syscon ASPEED_RESET_I2C>;
 600                 bus-frequency = <100000>;
 601                 interrupts = <13>;
 602                 interrupt-parent = <&i2c_ic>;
 603                 pinctrl-names = "default";
 604                 pinctrl-0 = <&pinctrl_i2c14_default>;
 605                 status = "disabled";
 606         };
 607 };
 608
 609 &pinctrl {
 610         pinctrl_acpi_default: acpi_default {
 611                 function = "ACPI";
 612                 groups = "ACPI";
 613         };
 614
 615         pinctrl_adc0_default: adc0_default {
 616                 function = "ADC0";
 617                 groups = "ADC0";
 618         };
 619
 620         pinctrl_adc1_default: adc1_default {
 621                 function = "ADC1";
 622                 groups = "ADC1";
 623         };
 624
 625         pinctrl_adc10_default: adc10_default {
 626                 function = "ADC10";
 627                 groups = "ADC10";
 628         };
 629
 630         pinctrl_adc11_default: adc11_default {
 631                 function = "ADC11";
 632                 groups = "ADC11";
 633         };
 634
 635         pinctrl_adc12_default: adc12_default {
 636                 function = "ADC12";
 637                 groups = "ADC12";
 638         };
 639
 640         pinctrl_adc13_default: adc13_default {
 641                 function = "ADC13";
 642                 groups = "ADC13";
 643         };
 644
 645         pinctrl_adc14_default: adc14_default {
 646                 function = "ADC14";
 647                 groups = "ADC14";
 648         };
 649
 650         pinctrl_adc15_default: adc15_default {
 651                 function = "ADC15";
 652                 groups = "ADC15";
 653         };
 654
 655         pinctrl_adc2_default: adc2_default {
 656                 function = "ADC2";
 657                 groups = "ADC2";
 658         };
 659
 660         pinctrl_adc3_default: adc3_default {
 661                 function = "ADC3";
 662                 groups = "ADC3";
 663         };
 664
 665         pinctrl_adc4_default: adc4_default {
 666                 function = "ADC4";
 667                 groups = "ADC4";
 668         };
 669
 670         pinctrl_adc5_default: adc5_default {
 671                 function = "ADC5";
 672                 groups = "ADC5";
 673         };
 674
 675         pinctrl_adc6_default: adc6_default {
 676                 function = "ADC6";
 677                 groups = "ADC6";
 678         };
 679
 680         pinctrl_adc7_default: adc7_default {
 681                 function = "ADC7";
 682                 groups = "ADC7";
 683         };
 684
 685         pinctrl_adc8_default: adc8_default {
 686                 function = "ADC8";
 687                 groups = "ADC8";
 688         };
 689
 690         pinctrl_adc9_default: adc9_default {
 691                 function = "ADC9";
 692                 groups = "ADC9";
 693         };
 694
 695         pinctrl_bmcint_default: bmcint_default {
 696                 function = "BMCINT";
 697                 groups = "BMCINT";
 698         };
 699
 700         pinctrl_ddcclk_default: ddcclk_default {
 701                 function = "DDCCLK";
 702                 groups = "DDCCLK";
 703         };
 704
 705         pinctrl_ddcdat_default: ddcdat_default {
 706                 function = "DDCDAT";
 707                 groups = "DDCDAT";
 708         };
 709
 710         pinctrl_extrst_default: extrst_default {
 711                 function = "EXTRST";
 712                 groups = "EXTRST";
 713         };
 714
 715         pinctrl_flack_default: flack_default {
 716                 function = "FLACK";
 717                 groups = "FLACK";
 718         };
 719
 720         pinctrl_flbusy_default: flbusy_default {
 721                 function = "FLBUSY";
 722                 groups = "FLBUSY";
 723         };
 724
 725         pinctrl_flwp_default: flwp_default {
 726                 function = "FLWP";
 727                 groups = "FLWP";
 728         };
 729
 730         pinctrl_gpid_default: gpid_default {
 731                 function = "GPID";
 732                 groups = "GPID";
 733         };
 734
 735         pinctrl_gpid0_default: gpid0_default {
 736                 function = "GPID0";
 737                 groups = "GPID0";
 738         };
 739
 740         pinctrl_gpid2_default: gpid2_default {
 741                 function = "GPID2";
 742                 groups = "GPID2";
 743         };
 744
 745         pinctrl_gpid4_default: gpid4_default {
 746                 function = "GPID4";
 747                 groups = "GPID4";
 748         };
 749
 750         pinctrl_gpid6_default: gpid6_default {
 751                 function = "GPID6";
 752                 groups = "GPID6";
 753         };
 754
 755         pinctrl_gpie0_default: gpie0_default {
 756                 function = "GPIE0";
 757                 groups = "GPIE0";
 758         };
 759
 760         pinctrl_gpie2_default: gpie2_default {
 761                 function = "GPIE2";
 762                 groups = "GPIE2";
 763         };
 764
 765         pinctrl_gpie4_default: gpie4_default {
 766                 function = "GPIE4";
 767                 groups = "GPIE4";
 768         };
 769
 770         pinctrl_gpie6_default: gpie6_default {
 771                 function = "GPIE6";
 772                 groups = "GPIE6";
 773         };
 774
 775         pinctrl_i2c10_default: i2c10_default {
 776                 function = "I2C10";
 777                 groups = "I2C10";
 778         };
 779
 780         pinctrl_i2c11_default: i2c11_default {
 781                 function = "I2C11";
 782                 groups = "I2C11";
 783         };
 784
 785         pinctrl_i2c12_default: i2c12_default {
 786                 function = "I2C12";
 787                 groups = "I2C12";
 788         };
 789
 790         pinctrl_i2c13_default: i2c13_default {
 791                 function = "I2C13";
 792                 groups = "I2C13";
 793         };
 794
 795         pinctrl_i2c14_default: i2c14_default {
 796                 function = "I2C14";
 797                 groups = "I2C14";
 798         };
 799
 800         pinctrl_i2c3_default: i2c3_default {
 801                 function = "I2C3";
 802                 groups = "I2C3";
 803         };
 804
 805         pinctrl_i2c4_default: i2c4_default {
 806                 function = "I2C4";
 807                 groups = "I2C4";
 808         };
 809
 810         pinctrl_i2c5_default: i2c5_default {
 811                 function = "I2C5";
 812                 groups = "I2C5";
 813         };
 814
 815         pinctrl_i2c6_default: i2c6_default {
 816                 function = "I2C6";
 817                 groups = "I2C6";
 818         };
 819
 820         pinctrl_i2c7_default: i2c7_default {
 821                 function = "I2C7";
 822                 groups = "I2C7";
 823         };
 824
 825         pinctrl_i2c8_default: i2c8_default {
 826                 function = "I2C8";
 827                 groups = "I2C8";
 828         };
 829
 830         pinctrl_i2c9_default: i2c9_default {
 831                 function = "I2C9";
 832                 groups = "I2C9";
 833         };
 834
 835         pinctrl_lpcpd_default: lpcpd_default {
 836                 function = "LPCPD";
 837                 groups = "LPCPD";
 838         };
 839
 840         pinctrl_lpcpme_default: lpcpme_default {
 841                 function = "LPCPME";
 842                 groups = "LPCPME";
 843         };
 844
 845         pinctrl_lpcrst_default: lpcrst_default {
 846                 function = "LPCRST";
 847                 groups = "LPCRST";
 848         };
 849
 850         pinctrl_lpcsmi_default: lpcsmi_default {
 851                 function = "LPCSMI";
 852                 groups = "LPCSMI";
 853         };
 854
 855         pinctrl_mac1link_default: mac1link_default {
 856                 function = "MAC1LINK";
 857                 groups = "MAC1LINK";
 858         };
 859
 860         pinctrl_mac2link_default: mac2link_default {
 861                 function = "MAC2LINK";
 862                 groups = "MAC2LINK";
 863         };
 864
 865         pinctrl_mdio1_default: mdio1_default {
 866                 function = "MDIO1";
 867                 groups = "MDIO1";
 868         };
 869
 870         pinctrl_mdio2_default: mdio2_default {
 871                 function = "MDIO2";
 872                 groups = "MDIO2";
 873         };
 874
 875         pinctrl_ncts1_default: ncts1_default {
 876                 function = "NCTS1";
 877                 groups = "NCTS1";
 878         };
 879
 880         pinctrl_ncts2_default: ncts2_default {
 881                 function = "NCTS2";
 882                 groups = "NCTS2";
 883         };
 884
 885         pinctrl_ncts3_default: ncts3_default {
 886                 function = "NCTS3";
 887                 groups = "NCTS3";
 888         };
 889
 890         pinctrl_ncts4_default: ncts4_default {
 891                 function = "NCTS4";
 892                 groups = "NCTS4";
 893         };
 894
 895         pinctrl_ndcd1_default: ndcd1_default {
 896                 function = "NDCD1";
 897                 groups = "NDCD1";
 898         };
 899
 900         pinctrl_ndcd2_default: ndcd2_default {
 901                 function = "NDCD2";
 902                 groups = "NDCD2";
 903         };
 904
 905         pinctrl_ndcd3_default: ndcd3_default {
 906                 function = "NDCD3";
 907                 groups = "NDCD3";
 908         };
 909
 910         pinctrl_ndcd4_default: ndcd4_default {
 911                 function = "NDCD4";
 912                 groups = "NDCD4";
 913         };
 914
 915         pinctrl_ndsr1_default: ndsr1_default {
 916                 function = "NDSR1";
 917                 groups = "NDSR1";
 918         };
 919
 920         pinctrl_ndsr2_default: ndsr2_default {
 921                 function = "NDSR2";
 922                 groups = "NDSR2";
 923         };
 924
 925         pinctrl_ndsr3_default: ndsr3_default {
 926                 function = "NDSR3";
 927                 groups = "NDSR3";
 928         };
 929
 930         pinctrl_ndsr4_default: ndsr4_default {
 931                 function = "NDSR4";
 932                 groups = "NDSR4";
 933         };
 934
 935         pinctrl_ndtr1_default: ndtr1_default {
 936                 function = "NDTR1";
 937                 groups = "NDTR1";
 938         };
 939
 940         pinctrl_ndtr2_default: ndtr2_default {
 941                 function = "NDTR2";
 942                 groups = "NDTR2";
 943         };
 944
 945         pinctrl_ndtr3_default: ndtr3_default {
 946                 function = "NDTR3";
 947                 groups = "NDTR3";
 948         };
 949
 950         pinctrl_ndtr4_default: ndtr4_default {
 951                 function = "NDTR4";
 952                 groups = "NDTR4";
 953         };
 954
 955         pinctrl_ndts4_default: ndts4_default {
 956                 function = "NDTS4";
 957                 groups = "NDTS4";
 958         };
 959
 960         pinctrl_nri1_default: nri1_default {
 961                 function = "NRI1";
 962                 groups = "NRI1";
 963         };
 964
 965         pinctrl_nri2_default: nri2_default {
 966                 function = "NRI2";
 967                 groups = "NRI2";
 968         };
 969
 970         pinctrl_nri3_default: nri3_default {
 971                 function = "NRI3";
 972                 groups = "NRI3";
 973         };
 974
 975         pinctrl_nri4_default: nri4_default {
 976                 function = "NRI4";
 977                 groups = "NRI4";
 978         };
 979
 980         pinctrl_nrts1_default: nrts1_default {
 981                 function = "NRTS1";
 982                 groups = "NRTS1";
 983         };
 984
 985         pinctrl_nrts2_default: nrts2_default {
 986                 function = "NRTS2";
 987                 groups = "NRTS2";
 988         };
 989
 990         pinctrl_nrts3_default: nrts3_default {
 991                 function = "NRTS3";
 992                 groups = "NRTS3";
 993         };
 994
 995         pinctrl_oscclk_default: oscclk_default {
 996                 function = "OSCCLK";
 997                 groups = "OSCCLK";
 998         };
 999
1000         pinctrl_pwm0_default: pwm0_default {
1001                 function = "PWM0";
1002                 groups = "PWM0";
1003         };
1004
1005         pinctrl_pwm1_default: pwm1_default {
1006                 function = "PWM1";
1007                 groups = "PWM1";
1008         };
1009
1010         pinctrl_pwm2_default: pwm2_default {
1011                 function = "PWM2";
1012                 groups = "PWM2";
1013         };
1014
1015         pinctrl_pwm3_default: pwm3_default {
1016                 function = "PWM3";
1017                 groups = "PWM3";
1018         };
1019
1020         pinctrl_pwm4_default: pwm4_default {
1021                 function = "PWM4";
1022                 groups = "PWM4";
1023         };
1024
1025         pinctrl_pwm5_default: pwm5_default {
1026                 function = "PWM5";
1027                 groups = "PWM5";
1028         };
1029
1030         pinctrl_pwm6_default: pwm6_default {
1031                 function = "PWM6";
1032                 groups = "PWM6";
1033         };
1034
1035         pinctrl_pwm7_default: pwm7_default {
1036                 function = "PWM7";
1037                 groups = "PWM7";
1038         };
1039
1040         pinctrl_rgmii1_default: rgmii1_default {
1041                 function = "RGMII1";
1042                 groups = "RGMII1";
1043         };
1044
1045         pinctrl_rgmii2_default: rgmii2_default {
1046                 function = "RGMII2";
1047                 groups = "RGMII2";
1048         };
1049
1050         pinctrl_rmii1_default: rmii1_default {
1051                 function = "RMII1";
1052                 groups = "RMII1";
1053         };
1054
1055         pinctrl_rmii2_default: rmii2_default {
1056                 function = "RMII2";
1057                 groups = "RMII2";
1058         };
1059
1060         pinctrl_rom16_default: rom16_default {
1061                 function = "ROM16";
1062                 groups = "ROM16";
1063         };
1064
1065         pinctrl_rom8_default: rom8_default {
1066                 function = "ROM8";
1067                 groups = "ROM8";
1068         };
1069
1070         pinctrl_romcs1_default: romcs1_default {
1071                 function = "ROMCS1";
1072                 groups = "ROMCS1";
1073         };
1074
1075         pinctrl_romcs2_default: romcs2_default {
1076                 function = "ROMCS2";
1077                 groups = "ROMCS2";
1078         };
1079
1080         pinctrl_romcs3_default: romcs3_default {
1081                 function = "ROMCS3";
1082                 groups = "ROMCS3";
1083         };
1084
1085         pinctrl_romcs4_default: romcs4_default {
1086                 function = "ROMCS4";
1087                 groups = "ROMCS4";
1088         };
1089
1090         pinctrl_rxd1_default: rxd1_default {
1091                 function = "RXD1";
1092                 groups = "RXD1";
1093         };
1094
1095         pinctrl_rxd2_default: rxd2_default {
1096                 function = "RXD2";
1097                 groups = "RXD2";
1098         };
1099
1100         pinctrl_rxd3_default: rxd3_default {
1101                 function = "RXD3";
1102                 groups = "RXD3";
1103         };
1104
1105         pinctrl_rxd4_default: rxd4_default {
1106                 function = "RXD4";
1107                 groups = "RXD4";
1108         };
1109
1110         pinctrl_salt1_default: salt1_default {
1111                 function = "SALT1";
1112                 groups = "SALT1";
1113         };
1114
1115         pinctrl_salt2_default: salt2_default {
1116                 function = "SALT2";
1117                 groups = "SALT2";
1118         };
1119
1120         pinctrl_salt3_default: salt3_default {
1121                 function = "SALT3";
1122                 groups = "SALT3";
1123         };
1124
1125         pinctrl_salt4_default: salt4_default {
1126                 function = "SALT4";
1127                 groups = "SALT4";
1128         };
1129
1130         pinctrl_sd1_default: sd1_default {
1131                 function = "SD1";
1132                 groups = "SD1";
1133         };
1134
1135         pinctrl_sd2_default: sd2_default {
1136                 function = "SD2";
1137                 groups = "SD2";
1138         };
1139
1140         pinctrl_sgpmck_default: sgpmck_default {
1141                 function = "SGPMCK";
1142                 groups = "SGPMCK";
1143         };
1144
1145         pinctrl_sgpmi_default: sgpmi_default {
1146                 function = "SGPMI";
1147                 groups = "SGPMI";
1148         };
1149
1150         pinctrl_sgpmld_default: sgpmld_default {
1151                 function = "SGPMLD";
1152                 groups = "SGPMLD";
1153         };
1154
1155         pinctrl_sgpmo_default: sgpmo_default {
1156                 function = "SGPMO";
1157                 groups = "SGPMO";
1158         };
1159
1160         pinctrl_sgpsck_default: sgpsck_default {
1161                 function = "SGPSCK";
1162                 groups = "SGPSCK";
1163         };
1164
1165         pinctrl_sgpsi0_default: sgpsi0_default {
1166                 function = "SGPSI0";
1167                 groups = "SGPSI0";
1168         };
1169
1170         pinctrl_sgpsi1_default: sgpsi1_default {
1171                 function = "SGPSI1";
1172                 groups = "SGPSI1";
1173         };
1174
1175         pinctrl_sgpsld_default: sgpsld_default {
1176                 function = "SGPSLD";
1177                 groups = "SGPSLD";
1178         };
1179
1180         pinctrl_sioonctrl_default: sioonctrl_default {
1181                 function = "SIOONCTRL";
1182                 groups = "SIOONCTRL";
1183         };
1184
1185         pinctrl_siopbi_default: siopbi_default {
1186                 function = "SIOPBI";
1187                 groups = "SIOPBI";
1188         };
1189
1190         pinctrl_siopbo_default: siopbo_default {
1191                 function = "SIOPBO";
1192                 groups = "SIOPBO";
1193         };
1194
1195         pinctrl_siopwreq_default: siopwreq_default {
1196                 function = "SIOPWREQ";
1197                 groups = "SIOPWREQ";
1198         };
1199
1200         pinctrl_siopwrgd_default: siopwrgd_default {
1201                 function = "SIOPWRGD";
1202                 groups = "SIOPWRGD";
1203         };
1204
1205         pinctrl_sios3_default: sios3_default {
1206                 function = "SIOS3";
1207                 groups = "SIOS3";
1208         };
1209
1210         pinctrl_sios5_default: sios5_default {
1211                 function = "SIOS5";
1212                 groups = "SIOS5";
1213         };
1214
1215         pinctrl_siosci_default: siosci_default {
1216                 function = "SIOSCI";
1217                 groups = "SIOSCI";
1218         };
1219
1220         pinctrl_spi1_default: spi1_default {
1221                 function = "SPI1";
1222                 groups = "SPI1";
1223         };
1224
1225         pinctrl_spi1debug_default: spi1debug_default {
1226                 function = "SPI1DEBUG";
1227                 groups = "SPI1DEBUG";
1228         };
1229
1230         pinctrl_spi1passthru_default: spi1passthru_default {
1231                 function = "SPI1PASSTHRU";
1232                 groups = "SPI1PASSTHRU";
1233         };
1234
1235         pinctrl_spics1_default: spics1_default {
1236                 function = "SPICS1";
1237                 groups = "SPICS1";
1238         };
1239
1240         pinctrl_timer3_default: timer3_default {
1241                 function = "TIMER3";
1242                 groups = "TIMER3";
1243         };
1244
1245         pinctrl_timer4_default: timer4_default {
1246                 function = "TIMER4";
1247                 groups = "TIMER4";
1248         };
1249
1250         pinctrl_timer5_default: timer5_default {
1251                 function = "TIMER5";
1252                 groups = "TIMER5";
1253         };
1254
1255         pinctrl_timer6_default: timer6_default {
1256                 function = "TIMER6";
1257                 groups = "TIMER6";
1258         };
1259
1260         pinctrl_timer7_default: timer7_default {
1261                 function = "TIMER7";
1262                 groups = "TIMER7";
1263         };
1264
1265         pinctrl_timer8_default: timer8_default {
1266                 function = "TIMER8";
1267                 groups = "TIMER8";
1268         };
1269
1270         pinctrl_txd1_default: txd1_default {
1271                 function = "TXD1";
1272                 groups = "TXD1";
1273         };
1274
1275         pinctrl_txd2_default: txd2_default {
1276                 function = "TXD2";
1277                 groups = "TXD2";
1278         };
1279
1280         pinctrl_txd3_default: txd3_default {
1281                 function = "TXD3";
1282                 groups = "TXD3";
1283         };
1284
1285         pinctrl_txd4_default: txd4_default {
1286                 function = "TXD4";
1287                 groups = "TXD4";
1288         };
1289
1290         pinctrl_uart6_default: uart6_default {
1291                 function = "UART6";
1292                 groups = "UART6";
1293         };
1294
1295         pinctrl_usbcki_default: usbcki_default {
1296                 function = "USBCKI";
1297                 groups = "USBCKI";
1298         };
1299
1300         pinctrl_usb2h_default: usb2h_default {
1301                 function = "USB2H1";
1302                 groups = "USB2H1";
1303         };
1304
1305         pinctrl_usb2d_default: usb2d_default {
1306                 function = "USB2D1";
1307                 groups = "USB2D1";
1308         };
1309
1310         pinctrl_vgabios_rom_default: vgabios_rom_default {
1311                 function = "VGABIOS_ROM";
1312                 groups = "VGABIOS_ROM";
1313         };
1314
1315         pinctrl_vgahs_default: vgahs_default {
1316                 function = "VGAHS";
1317                 groups = "VGAHS";
1318         };
1319
1320         pinctrl_vgavs_default: vgavs_default {
1321                 function = "VGAVS";
1322                 groups = "VGAVS";
1323         };
1324
1325         pinctrl_vpi18_default: vpi18_default {
1326                 function = "VPI18";
1327                 groups = "VPI18";
1328         };
1329
1330         pinctrl_vpi24_default: vpi24_default {
1331                 function = "VPI24";
1332                 groups = "VPI24";
1333         };
1334
1335         pinctrl_vpi30_default: vpi30_default {
1336                 function = "VPI30";
1337                 groups = "VPI30";
1338         };
1339
1340         pinctrl_vpo12_default: vpo12_default {
1341                 function = "VPO12";
1342                 groups = "VPO12";
1343         };
1344
1345         pinctrl_vpo24_default: vpo24_default {
1346                 function = "VPO24";
1347                 groups = "VPO24";
1348         };
1349
1350         pinctrl_wdtrst1_default: wdtrst1_default {
1351                 function = "WDTRST1";
1352                 groups = "WDTRST1";
1353         };
1354
1355         pinctrl_wdtrst2_default: wdtrst2_default {
1356                 function = "WDTRST2";
1357                 groups = "WDTRST2";
1358         };
1359 };