arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3 #include "aspeed-g5.dtsi"
   4 #include <dt-bindings/gpio/aspeed-gpio.h>
   5
   6 / {
   7         model = "Zaius BMC";
   8         compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
   9
  10         chosen {
  11                 stdout-path = &uart5;
  12                 bootargs = "console=ttyS4,115200 earlyprintk";
  13         };
  14
  15         memory@80000000 {
  16                 reg = <0x80000000 0x40000000>;
  17         };
  18
  19         reserved-memory {
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges;
  23
  24                 flash_memory: region@98000000 {
  25                         no-map;
  26                         reg = <0x98000000 0x04000000>; /* 64M */
  27                 };
  28         };
  29
  30         onewire0 {
  31                 compatible = "w1-gpio";
  32                 gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
  33         };
  34
  35         onewire1 {
  36                 compatible = "w1-gpio";
  37                 gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
  38         };
  39
  40         onewire2 {
  41                 compatible = "w1-gpio";
  42                 gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
  43         };
  44
  45         onewire3 {
  46                 compatible = "w1-gpio";
  47                 gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
  48         };
  49
  50         gpio-keys {
  51                 compatible = "gpio-keys";
  52
  53                 checkstop {
  54                         label = "checkstop";
  55                         gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
  56                         linux,code = <ASPEED_GPIO(F, 7)>;
  57                 };
  58         };
  59
  60         leds {
  61                 compatible = "gpio-leds";
  62
  63                 sys_boot_status {
  64                         label = "System boot status";
  65                         gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>;
  66                 };
  67
  68                 attention {
  69                         label = "Attention";
  70                         gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>;
  71                 };
  72
  73                 plt_fault {
  74                         label = "Platform fault";
  75                         gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>;
  76                 };
  77
  78                 hdd_fault {
  79                         label = "Onboard drive fault";
  80                         gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
  81                 };
  82         };
  83
  84         fsi: gpio-fsi {
  85                 compatible = "fsi-master-gpio", "fsi-master";
  86                 #address-cells = <2>;
  87                 #size-cells = <0>;
  88
  89                 trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
  90                 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
  91                 clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
  92                 data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
  93                 mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
  94         };
  95
  96         iio-hwmon {
  97                 compatible = "iio-hwmon";
  98                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
  99                         <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
 100                         <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
 101                         <&adc 13>, <&adc 14>, <&adc 15>;
 102         };
 103
 104         iio-hwmon-battery {
 105                 compatible = "iio-hwmon";
 106                 io-channels = <&adc 12>;
 107         };
 108
 109 };
 110
 111 &fmc {
 112         status = "okay";
 113
 114         flash@0 {
 115                 status = "okay";
 116                 label = "bmc";
 117                 m25p,fast-read;
 118 #include "openbmc-flash-layout.dtsi"
 119         };
 120 };
 121
 122 &spi1 {
 123         status = "okay";
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&pinctrl_spi1_default>;
 126
 127         flash@0 {
 128                 status = "okay";
 129                 label = "pnor";
 130                 m25p,fast-read;
 131         };
 132 };
 133
 134 &spi2 {
 135         status = "okay";
 136         pinctrl-names = "default";
 137         pinctrl-0 = <&pinctrl_spi2ck_default
 138                      &pinctrl_spi2cs0_default
 139                      &pinctrl_spi2cs1_default
 140                      &pinctrl_spi2miso_default
 141                      &pinctrl_spi2mosi_default>;
 142
 143         flash@0 {
 144                 status = "okay";
 145         };
 146 };
 147
 148 &uart1 {
 149         status = "okay";
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&pinctrl_txd1_default
 152                      &pinctrl_rxd1_default>;
 153 };
 154
 155 &lpc_ctrl {
 156         status = "okay";
 157         memory-region = <&flash_memory>;
 158         flash = <&spi1>;
 159 };
 160
 161 &lpc_snoop {
 162         status = "okay";
 163         snoop-ports = <0x80>;
 164 };
 165
 166
 167 &uart5 {
 168         status = "okay";
 169 };
 170
 171 &mac0 {
 172         status = "okay";
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&pinctrl_rmii1_default>;
 175         use-ncsi;
 176 };
 177
 178 &mac1 {
 179         status = "okay";
 180
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 183 };
 184
 185 &i2c0 {
 186         status = "okay";
 187
 188         eeprom@50 {
 189                 compatible = "atmel,24c64";
 190                 reg = <0x50>;
 191                 pagesize = <32>;
 192         };
 193
 194         rtc@68 {
 195                 compatible = "nxp,pcf8523";
 196                 reg = <0x68>;
 197         };
 198
 199         ucd90160@64 {
 200                 compatible = "ti,ucd90160";
 201                 reg = <0x64>;
 202         };
 203
 204         /* Power sequencer UCD90160 PMBUS @64h
 205          * FRU AT24C64D @50h
 206          * RTC PCF8523 @68h
 207          * Clock buffer 9DBL04 @6dh
 208          */
 209 };
 210
 211 &i2c1 {
 212         status = "okay";
 213
 214         i2c-switch@71 {
 215                 compatible = "nxp,pca9546";
 216                 reg = <0x71>;
 217                 #address-cells = <1>;
 218                 #size-cells = <0>;
 219         };
 220
 221         /* MUX1 PCA9546A @71h
 222          *   PCIe 0
 223          *   PCIe 1
 224          *   PCIe 2
 225          *   TPM header
 226          */
 227 };
 228
 229 &i2c2 {
 230         status = "disabled";
 231
 232         /* OCP Mezz Connector A (OOB SMBUS) */
 233 };
 234
 235 &i2c3 {
 236         status = "disabled";
 237
 238         /* OCP Mezz Connector A (PCIe slot SMBUS) */
 239 };
 240
 241 &i2c4 {
 242         status = "okay";
 243
 244         i2c-switch@71 {
 245                 compatible = "nxp,pca9546";
 246                 reg = <0x71>;
 247                 #address-cells = <1>;
 248                 #size-cells = <0>;
 249         };
 250
 251         /* MUX1 PCA9546A @71h
 252          *   PCIe 3
 253          *   PCIe 4
 254          */
 255 };
 256
 257
 258 &i2c5 {
 259         status = "disabled";
 260
 261         /* CPU0 PRM 0.7V */
 262         /* CPU0 PRM 1.2V CH03 */
 263         /* CPU0 PRM 0.8V */
 264         /* CPU0 PRM 1.2V CH47 */
 265 };
 266
 267 &i2c6 {
 268         status = "disabled";
 269
 270         /* CPU1 PRM 0.7V */
 271         /* CPU1 PRM 1.2V CH03 */
 272         /* CPU1 PRM 0.8V */
 273         /* CPU1 PRM 1.2V CH47 */
 274 };
 275
 276 &i2c7 {
 277         status = "okay";
 278
 279         pca9541a@70 {
 280                 compatible = "nxp,pca9541";
 281                 reg = <0x70>;
 282
 283                 i2c-arb {
 284                         #address-cells = <1>;
 285                         #size-cells = <0>;
 286
 287                         hotswap@54 {
 288                                 compatible = "ti,lm5066i";
 289                                 reg = <0x54>;
 290                         };
 291                 };
 292         };
 293
 294         /* Master selector PCA9541A @70h (other master: CPU0)
 295          *   LM5066I PMBUS @10h
 296          */
 297
 298         /* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */
 299         power-brick@61 {
 300                 compatible = "delta,dps800";
 301                 reg = <0x61>;
 302         };
 303
 304         /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
 305         /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
 306         /* CPU0 VR ISL68137 0.8V PMBUS @60h */
 307         /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
 308         /* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
 309 };
 310
 311 &i2c8 {
 312         status = "okay";
 313
 314         /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
 315         /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
 316         /* CPU1 VR ISL68137 0.8V PMBUS @61h */
 317         /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
 318         /* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
 319 };
 320
 321
 322 &i2c9 {
 323         status = "disabled";
 324
 325         /* Fan board */
 326 };
 327
 328 &i2c10 {
 329         status = "disabled";
 330 };
 331
 332 &i2c11 {
 333         status = "disabled";
 334
 335         /* GPU sideband */
 336 };
 337
 338 &i2c12 {
 339         status = "disabled";
 340 };
 341
 342 &i2c13 {
 343         status = "disabled";
 344
 345         /* MUX PI3USB102
 346          *   CPU0 debug
 347          *   CPU1 debug
 348          */
 349 };
 350
 351 &pinctrl {
 352         aspeed,external-nodes = <&gfx &lhc>;
 353
 354         pinctrl_gpioh_unbiased: gpioi_unbiased {
 355                 pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
 356                 bias-disable;
 357         };
 358 };
 359
 360 &gpio {
 361         pinctrl-names = "default";
 362         pinctrl-0 = <&pinctrl_gpioh_unbiased>;
 363
 364         line_iso_u146_en {
 365                 gpio-hog;
 366                 gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
 367                 output-high;
 368                 line-name = "iso_u164_en";
 369         };
 370
 371         ncsi_mux_en_n {
 372                 gpio-hog;
 373                 gpios = <ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
 374                 output-low;
 375                 line-name = "ncsi_mux_en_n";
 376         };
 377
 378         line_bmc_i2c2_sw_rst_n {
 379                 gpio-hog;
 380                 gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
 381                 output-high;
 382                 line-name = "bmc_i2c2_sw_rst_n";
 383         };
 384
 385         line_bmc_i2c5_sw_rst_n {
 386                 gpio-hog;
 387                 gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
 388                 output-high;
 389                 line-name = "bmc_i2c5_sw_rst_n";
 390         };
 391 };
 392
 393 &vuart {
 394         status = "okay";
 395 };
 396
 397 &gfx {
 398         status = "okay";
 399 };
 400
 401 &pwm_tacho {
 402         status = "okay";
 403         pinctrl-names = "default";
 404         pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
 405                 &pinctrl_pwm2_default &pinctrl_pwm3_default>;
 406
 407         fan@0 {
 408                 reg = <0x00>;
 409                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
 410         };
 411
 412         fan@1 {
 413                 reg = <0x01>;
 414                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
 415         };
 416
 417         fan@2 {
 418                 reg = <0x02>;
 419                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
 420         };
 421
 422         fan@3 {
 423                 reg = <0x03>;
 424                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
 425         };
 426 };
 427
 428 &ibt {
 429         status = "okay";
 430 };