arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3 #include "aspeed-g5.dtsi"
   4 #include <dt-bindings/gpio/aspeed-gpio.h>
   5
   6 / {
   7         model = "Zaius BMC";
   8         compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
   9
  10         chosen {
  11                 stdout-path = &uart5;
  12                 bootargs = "console=ttyS4,115200 earlyprintk";
  13         };
  14
  15         memory@80000000 {
  16                 reg = <0x80000000 0x40000000>;
  17         };
  18
  19         reserved-memory {
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges;
  23
  24                 flash_memory: region@98000000 {
  25                         no-map;
  26                         reg = <0x98000000 0x04000000>; /* 64M */
  27                 };
  28         };
  29
  30         onewire0 {
  31                 compatible = "w1-gpio";
  32                 gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
  33         };
  34
  35         onewire1 {
  36                 compatible = "w1-gpio";
  37                 gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
  38         };
  39
  40         onewire2 {
  41                 compatible = "w1-gpio";
  42                 gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
  43         };
  44
  45         onewire3 {
  46                 compatible = "w1-gpio";
  47                 gpios = <&gpio ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
  48         };
  49
  50         gpio-keys {
  51                 compatible = "gpio-keys";
  52
  53                 checkstop {
  54                         label = "checkstop";
  55                         gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
  56                         linux,code = <ASPEED_GPIO(F, 7)>;
  57                 };
  58
  59                 pcie-e2b-present{
  60                         label = "pcie-e2b-present";
  61                         gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
  62                         linux,code = <ASPEED_GPIO(E, 7)>;
  63                 };
  64         };
  65
  66         leds {
  67                 compatible = "gpio-leds";
  68
  69                 sys_boot_status {
  70                         label = "System boot status";
  71                         gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_LOW>;
  72                 };
  73
  74                 attention {
  75                         label = "Attention";
  76                         gpios = <&gpio ASPEED_GPIO(D, 6) GPIO_ACTIVE_LOW>;
  77                 };
  78
  79                 plt_fault {
  80                         label = "Platform fault";
  81                         gpios = <&gpio ASPEED_GPIO(D, 7) GPIO_ACTIVE_LOW>;
  82                 };
  83
  84                 hdd_fault {
  85                         label = "Onboard drive fault";
  86                         gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
  87                 };
  88         };
  89
  90         fsi: gpio-fsi {
  91                 compatible = "fsi-master-gpio", "fsi-master";
  92                 #address-cells = <2>;
  93                 #size-cells = <0>;
  94                 no-gpio-delays;
  95
  96                 trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
  97                 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
  98                 clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
  99                 data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
 100                 mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
 101         };
 102
 103         iio-hwmon {
 104                 compatible = "iio-hwmon";
 105                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
 106                         <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
 107                         <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
 108                         <&adc 13>, <&adc 14>, <&adc 15>;
 109         };
 110
 111         iio-hwmon-battery {
 112                 compatible = "iio-hwmon";
 113                 io-channels = <&adc 12>;
 114         };
 115
 116 };
 117
 118 &fmc {
 119         status = "okay";
 120
 121         flash@0 {
 122                 status = "okay";
 123                 label = "bmc";
 124                 m25p,fast-read;
 125 #include "openbmc-flash-layout.dtsi"
 126         };
 127 };
 128
 129 &spi1 {
 130         status = "okay";
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&pinctrl_spi1_default>;
 133
 134         flash@0 {
 135                 status = "okay";
 136                 label = "pnor";
 137                 m25p,fast-read;
 138         };
 139 };
 140
 141 &spi2 {
 142         status = "okay";
 143         pinctrl-names = "default";
 144         pinctrl-0 = <&pinctrl_spi2ck_default
 145                      &pinctrl_spi2cs0_default
 146                      &pinctrl_spi2cs1_default
 147                      &pinctrl_spi2miso_default
 148                      &pinctrl_spi2mosi_default>;
 149
 150         flash@0 {
 151                 status = "okay";
 152         };
 153 };
 154
 155 &uart1 {
 156         status = "okay";
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&pinctrl_txd1_default
 159                      &pinctrl_rxd1_default>;
 160 };
 161
 162 &lpc_ctrl {
 163         status = "okay";
 164         memory-region = <&flash_memory>;
 165         flash = <&spi1>;
 166 };
 167
 168 &lpc_snoop {
 169         status = "okay";
 170         snoop-ports = <0x80>;
 171 };
 172
 173
 174 &uart5 {
 175         status = "okay";
 176 };
 177
 178 &mac0 {
 179         status = "okay";
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_rmii1_default>;
 182         use-ncsi;
 183 };
 184
 185 &mac1 {
 186         status = "okay";
 187
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 190 };
 191
 192 &i2c0 {
 193         status = "okay";
 194
 195         eeprom@50 {
 196                 compatible = "atmel,24c64";
 197                 reg = <0x50>;
 198                 pagesize = <32>;
 199         };
 200
 201         rtc@68 {
 202                 compatible = "nxp,pcf8523";
 203                 reg = <0x68>;
 204         };
 205
 206         ucd90160@64 {
 207                 compatible = "ti,ucd90160";
 208                 reg = <0x64>;
 209         };
 210
 211         /* Power sequencer UCD90160 PMBUS @64h
 212          * FRU AT24C64D @50h
 213          * RTC PCF8523 @68h
 214          * Clock buffer 9DBL04 @6dh
 215          */
 216 };
 217
 218 &i2c1 {
 219         status = "okay";
 220
 221         i2c-switch@71 {
 222                 compatible = "nxp,pca9546";
 223                 reg = <0x71>;
 224                 #address-cells = <1>;
 225                 #size-cells = <0>;
 226         };
 227
 228         /* MUX1 PCA9546A @71h
 229          *   PCIe 0
 230          *   PCIe 1
 231          *   PCIe 2
 232          *   TPM header
 233          */
 234 };
 235
 236 &i2c2 {
 237         status = "disabled";
 238
 239         /* OCP Mezz Connector A (OOB SMBUS) */
 240 };
 241
 242 &i2c3 {
 243         status = "disabled";
 244
 245         /* OCP Mezz Connector A (PCIe slot SMBUS) */
 246 };
 247
 248 &i2c4 {
 249         status = "okay";
 250
 251         i2c-switch@71 {
 252                 compatible = "nxp,pca9546";
 253                 reg = <0x71>;
 254                 #address-cells = <1>;
 255                 #size-cells = <0>;
 256         };
 257
 258         /* MUX1 PCA9546A @71h
 259          *   PCIe 3
 260          *   PCIe 4
 261          */
 262 };
 263
 264
 265 &i2c5 {
 266         status = "disabled";
 267
 268         /* CPU0 PRM 0.7V */
 269         /* CPU0 PRM 1.2V CH03 */
 270         /* CPU0 PRM 0.8V */
 271         /* CPU0 PRM 1.2V CH47 */
 272 };
 273
 274 &i2c6 {
 275         status = "disabled";
 276
 277         /* CPU1 PRM 0.7V */
 278         /* CPU1 PRM 1.2V CH03 */
 279         /* CPU1 PRM 0.8V */
 280         /* CPU1 PRM 1.2V CH47 */
 281 };
 282
 283 &i2c7 {
 284         status = "okay";
 285
 286         pca9541a@70 {
 287                 compatible = "nxp,pca9541";
 288                 reg = <0x70>;
 289
 290                 i2c-arb {
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293
 294                         hotswap@54 {
 295                                 compatible = "ti,lm5066i";
 296                                 reg = <0x54>;
 297                         };
 298                 };
 299         };
 300
 301         /* Master selector PCA9541A @70h (other master: CPU0)
 302          *   LM5066I PMBUS @10h
 303          */
 304
 305         /* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */
 306         power-brick@61 {
 307                 compatible = "delta,dps800";
 308                 reg = <0x61>;
 309         };
 310
 311         /* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
 312         /* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
 313         /* CPU0 VR ISL68137 0.8V PMBUS @60h */
 314         /* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
 315         /* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
 316 };
 317
 318 &i2c8 {
 319         status = "okay";
 320
 321         /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
 322         /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
 323         /* CPU1 VR ISL68137 0.8V PMBUS @61h */
 324         /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
 325         /* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
 326 };
 327
 328
 329 &i2c9 {
 330         status = "disabled";
 331
 332         /* Fan board */
 333 };
 334
 335 &i2c10 {
 336         status = "disabled";
 337 };
 338
 339 &i2c11 {
 340         status = "disabled";
 341
 342         /* GPU sideband */
 343 };
 344
 345 &i2c12 {
 346         status = "disabled";
 347 };
 348
 349 &i2c13 {
 350         status = "disabled";
 351
 352         /* MUX PI3USB102
 353          *   CPU0 debug
 354          *   CPU1 debug
 355          */
 356 };
 357
 358 &pinctrl {
 359         aspeed,external-nodes = <&gfx &lhc>;
 360
 361         pinctrl_gpioh_unbiased: gpioi_unbiased {
 362                 pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
 363                 bias-disable;
 364         };
 365 };
 366
 367 &gpio {
 368         pinctrl-names = "default";
 369         pinctrl-0 = <&pinctrl_gpioh_unbiased>;
 370
 371         line_iso_u146_en {
 372                 gpio-hog;
 373                 gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
 374                 output-high;
 375                 line-name = "iso_u164_en";
 376         };
 377
 378         ncsi_mux_en_n {
 379                 gpio-hog;
 380                 gpios = <ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
 381                 output-low;
 382                 line-name = "ncsi_mux_en_n";
 383         };
 384
 385         line_bmc_i2c2_sw_rst_n {
 386                 gpio-hog;
 387                 gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
 388                 output-high;
 389                 line-name = "bmc_i2c2_sw_rst_n";
 390         };
 391
 392         line_bmc_i2c5_sw_rst_n {
 393                 gpio-hog;
 394                 gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
 395                 output-high;
 396                 line-name = "bmc_i2c5_sw_rst_n";
 397         };
 398 };
 399
 400 &vuart {
 401         status = "okay";
 402 };
 403
 404 &gfx {
 405         status = "okay";
 406 };
 407
 408 &pwm_tacho {
 409         status = "okay";
 410         pinctrl-names = "default";
 411         pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
 412                 &pinctrl_pwm2_default &pinctrl_pwm3_default>;
 413
 414         fan@0 {
 415                 reg = <0x00>;
 416                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
 417         };
 418
 419         fan@1 {
 420                 reg = <0x01>;
 421                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
 422         };
 423
 424         fan@2 {
 425                 reg = <0x02>;
 426                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
 427         };
 428
 429         fan@3 {
 430                 reg = <0x03>;
 431                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
 432         };
 433 };
 434
 435 &ibt {
 436         status = "okay";
 437 };