Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / aspeed-bmc-opp-witherspoon.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6
7 / {
8         model = "Witherspoon BMC";
9         compatible = "ibm,witherspoon-bmc", "aspeed,ast2500";
10
11         chosen {
12                 stdout-path = &uart5;
13                 bootargs = "console=ttyS4,115200 earlyprintk";
14         };
15
16         memory@80000000 {
17                 reg = <0x80000000 0x20000000>;
18         };
19
20         reserved-memory {
21                 #address-cells = <1>;
22                 #size-cells = <1>;
23                 ranges;
24
25                 flash_memory: region@98000000 {
26                         no-map;
27                         reg = <0x98000000 0x04000000>; /* 64M */
28                 };
29         };
30
31         gpio-keys-polled {
32                 compatible = "gpio-keys-polled";
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35                 poll-interval = <1000>;
36
37                 fan0-presence {
38                         label = "fan0-presence";
39                         gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
40                         linux,code = <4>;
41                 };
42
43                 fan1-presence {
44                         label = "fan1-presence";
45                         gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
46                         linux,code = <5>;
47                 };
48
49                 fan2-presence {
50                         label = "fan2-presence";
51                         gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
52                         linux,code = <6>;
53                 };
54
55                 fan3-presence {
56                         label = "fan3-presence";
57                         gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
58                         linux,code = <7>;
59                 };
60         };
61
62         leds {
63                 compatible = "gpio-leds";
64
65                 fan0 {
66                         retain-state-shutdown;
67                         default-state = "keep";
68                         gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
69                 };
70
71                 fan1 {
72                         retain-state-shutdown;
73                         default-state = "keep";
74                         gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
75                 };
76
77                 fan2 {
78                         retain-state-shutdown;
79                         default-state = "keep";
80                         gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
81                 };
82
83                 fan3 {
84                         retain-state-shutdown;
85                         default-state = "keep";
86                         gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
87                 };
88
89                 front-fault {
90                         retain-state-shutdown;
91                         default-state = "keep";
92                         gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
93                 };
94
95                 front-power {
96                         retain-state-shutdown;
97                         default-state = "keep";
98                         gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
99                 };
100
101                 front-id {
102                         retain-state-shutdown;
103                         default-state = "keep";
104                         gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
105                 };
106
107                 rear-fault {
108                         gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
109                 };
110
111                 rear-id {
112                         gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
113                 };
114
115                 rear-power {
116                         gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
117                 };
118
119                 power-button {
120                         gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
121                 };
122         };
123
124         fsi: gpio-fsi {
125                 compatible = "fsi-master-gpio", "fsi-master";
126                 #address-cells = <2>;
127                 #size-cells = <0>;
128
129                 clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
130                 data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
131                 mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
132                 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
133                 trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
134         };
135
136         iio-hwmon-dps310 {
137                 compatible = "iio-hwmon";
138                 io-channels = <&dps 0>;
139         };
140
141         iio-hwmon-bmp280 {
142                 compatible = "iio-hwmon";
143                 io-channels = <&bmp 1>;
144         };
145
146 };
147
148 &fmc {
149         status = "okay";
150
151         flash@0 {
152                 status = "okay";
153                 label = "bmc";
154                 m25p,fast-read;
155 #include "openbmc-flash-layout.dtsi"
156         };
157
158         flash@1 {
159                 status = "okay";
160                 label = "alt";
161                 m25p,fast-read;
162         };
163 };
164
165 &spi1 {
166         status = "okay";
167         pinctrl-names = "default";
168         pinctrl-0 = <&pinctrl_spi1_default>;
169
170         flash@0 {
171                 status = "okay";
172                 label = "pnor";
173                 m25p,fast-read;
174         };
175 };
176
177 &uart1 {
178         /* Rear RS-232 connector */
179         status = "okay";
180         pinctrl-names = "default";
181         pinctrl-0 = <&pinctrl_txd1_default
182                         &pinctrl_rxd1_default
183                         &pinctrl_nrts1_default
184                         &pinctrl_ndtr1_default
185                         &pinctrl_ndsr1_default
186                         &pinctrl_ncts1_default
187                         &pinctrl_ndcd1_default
188                         &pinctrl_nri1_default>;
189 };
190
191 &uart2 {
192         /* APSS */
193         status = "okay";
194         pinctrl-names = "default";
195         pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
196 };
197
198 &uart5 {
199         status = "okay";
200 };
201
202 &lpc_ctrl {
203         status = "okay";
204         memory-region = <&flash_memory>;
205         flash = <&spi1>;
206 };
207
208 &mac0 {
209         status = "okay";
210         pinctrl-names = "default";
211         pinctrl-0 = <&pinctrl_rmii1_default>;
212         use-ncsi;
213 };
214
215 &i2c2 {
216         status = "okay";
217
218         /* MUX ->
219          *    Samtec 1
220          *    Samtec 2
221          */
222 };
223
224 &i2c3 {
225         status = "okay";
226
227         bmp: bmp280@77 {
228                 compatible = "bosch,bmp280";
229                 reg = <0x77>;
230                 #io-channel-cells = <1>;
231         };
232
233         max31785@52 {
234                 compatible = "maxim,max31785a";
235                 reg = <0x52>;
236                 #address-cells = <1>;
237                 #size-cells = <0>;
238         };
239
240         dps: dps310@76 {
241                 compatible = "infineon,dps310";
242                 reg = <0x76>;
243                 #io-channel-cells = <0>;
244         };
245
246         pca0: pca9552@60 {
247                 compatible = "nxp,pca9552";
248                 reg = <0x60>;
249                 #address-cells = <1>;
250                 #size-cells = <0>;
251
252                 gpio-controller;
253                 #gpio-cells = <2>;
254
255                 gpio@0 {
256                         reg = <0>;
257                         type = <PCA955X_TYPE_GPIO>;
258                 };
259
260                 gpio@1 {
261                         reg = <1>;
262                         type = <PCA955X_TYPE_GPIO>;
263                 };
264
265                 gpio@2 {
266                         reg = <2>;
267                         type = <PCA955X_TYPE_GPIO>;
268                 };
269
270                 gpio@3 {
271                         reg = <3>;
272                         type = <PCA955X_TYPE_GPIO>;
273                 };
274
275                 gpio@4 {
276                         reg = <4>;
277                         type = <PCA955X_TYPE_GPIO>;
278                 };
279
280                 gpio@5 {
281                         reg = <5>;
282                         type = <PCA955X_TYPE_GPIO>;
283                 };
284
285                 gpio@6 {
286                         reg = <6>;
287                         type = <PCA955X_TYPE_GPIO>;
288                 };
289
290                 gpio@7 {
291                         reg = <7>;
292                         type = <PCA955X_TYPE_GPIO>;
293                 };
294
295                 gpio@8 {
296                         reg = <8>;
297                         type = <PCA955X_TYPE_GPIO>;
298                 };
299
300                 gpio@9 {
301                         reg = <9>;
302                         type = <PCA955X_TYPE_GPIO>;
303                 };
304
305                 gpio@10 {
306                         reg = <10>;
307                         type = <PCA955X_TYPE_GPIO>;
308                 };
309
310                 gpio@11 {
311                         reg = <11>;
312                         type = <PCA955X_TYPE_GPIO>;
313                 };
314
315                 gpio@12 {
316                         reg = <12>;
317                         type = <PCA955X_TYPE_GPIO>;
318                 };
319
320                 gpio@13 {
321                         reg = <13>;
322                         type = <PCA955X_TYPE_GPIO>;
323                 };
324
325                 gpio@14 {
326                         reg = <14>;
327                         type = <PCA955X_TYPE_GPIO>;
328                 };
329
330                 gpio@15 {
331                         reg = <15>;
332                         type = <PCA955X_TYPE_GPIO>;
333                 };
334         };
335
336         power-supply@68 {
337                 compatible = "ibm,cffps1";
338                 reg = <0x68>;
339         };
340
341         power-supply@69 {
342                 compatible = "ibm,cffps1";
343                 reg = <0x69>;
344         };
345 };
346
347 &i2c4 {
348         status = "okay";
349
350         tmp423a@4c {
351                 compatible = "ti,tmp423";
352                 reg = <0x4c>;
353         };
354
355         ir35221@70 {
356                 compatible = "infineon,ir35221";
357                 reg = <0x70>;
358         };
359
360         ir35221@71 {
361                 compatible = "infineon,ir35221";
362                 reg = <0x71>;
363         };
364 };
365
366
367 &i2c5 {
368         status = "okay";
369
370         tmp423a@4c {
371                 compatible = "ti,tmp423";
372                 reg = <0x4c>;
373         };
374
375         ir35221@70 {
376                 compatible = "infineon,ir35221";
377                 reg = <0x70>;
378         };
379
380         ir35221@71 {
381                 compatible = "infineon,ir35221";
382                 reg = <0x71>;
383         };
384 };
385
386 &i2c9 {
387         status = "okay";
388
389         tmp275@4a {
390                 compatible = "ti,tmp275";
391                 reg = <0x4a>;
392         };
393 };
394
395 &i2c10 {
396         /* MUX
397          *   -> PCIe Slot 3
398          *   -> PCIe Slot 4
399          */
400         status = "okay";
401 };
402
403 &i2c11 {
404         status = "okay";
405
406         pca9552: pca9552@60 {
407                 compatible = "nxp,pca9552";
408                 reg = <0x60>;
409                 #address-cells = <1>;
410                 #size-cells = <0>;
411                 gpio-controller;
412                 #gpio-cells = <2>;
413
414                 gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
415                         "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
416                         "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
417                         "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
418                         "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
419                         "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
420                         "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
421                         "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
422
423                 gpio@0 {
424                         reg = <0>;
425                         type = <PCA955X_TYPE_GPIO>;
426                 };
427
428                 gpio@1 {
429                         reg = <1>;
430                         type = <PCA955X_TYPE_GPIO>;
431                 };
432
433                 gpio@2 {
434                         reg = <2>;
435                         type = <PCA955X_TYPE_GPIO>;
436                 };
437
438                 gpio@3 {
439                         reg = <3>;
440                         type = <PCA955X_TYPE_GPIO>;
441                 };
442
443                 gpio@4 {
444                         reg = <4>;
445                         type = <PCA955X_TYPE_GPIO>;
446                 };
447
448                 gpio@5 {
449                         reg = <5>;
450                         type = <PCA955X_TYPE_GPIO>;
451                 };
452
453                 gpio@6 {
454                         reg = <6>;
455                         type = <PCA955X_TYPE_GPIO>;
456                 };
457
458                 gpio@7 {
459                         reg = <7>;
460                         type = <PCA955X_TYPE_GPIO>;
461                 };
462
463                 gpio@8 {
464                         reg = <8>;
465                         type = <PCA955X_TYPE_GPIO>;
466                 };
467
468                 gpio@9 {
469                         reg = <9>;
470                         type = <PCA955X_TYPE_GPIO>;
471                 };
472
473                 gpio@10 {
474                         reg = <10>;
475                         type = <PCA955X_TYPE_GPIO>;
476                 };
477
478                 gpio@11 {
479                         reg = <11>;
480                         type = <PCA955X_TYPE_GPIO>;
481                 };
482
483                 gpio@12 {
484                         reg = <12>;
485                         type = <PCA955X_TYPE_GPIO>;
486                 };
487
488                 gpio@13 {
489                         reg = <13>;
490                         type = <PCA955X_TYPE_GPIO>;
491                 };
492
493                 gpio@14 {
494                         reg = <14>;
495                         type = <PCA955X_TYPE_GPIO>;
496                 };
497
498                 gpio@15 {
499                         reg = <15>;
500                         type = <PCA955X_TYPE_GPIO>;
501                 };
502         };
503
504         rtc@32 {
505                 compatible = "epson,rx8900";
506                 reg = <0x32>;
507         };
508
509         eeprom@51 {
510                 compatible = "atmel,24c64";
511                 reg = <0x51>;
512         };
513
514         ucd90160@64 {
515                 compatible = "ti,ucd90160";
516                 reg = <0x64>;
517         };
518 };
519
520 &i2c12 {
521         status = "okay";
522 };
523
524 &i2c13 {
525         status = "okay";
526 };
527
528 &vuart {
529         status = "okay";
530 };
531
532 &gfx {
533         status = "okay";
534 };
535
536 &pinctrl {
537         aspeed,external-nodes = <&gfx &lhc>;
538 };
539
540 &wdt1 {
541         aspeed,reset-type = "none";
542         aspeed,external-signal;
543         aspeed,ext-push-pull;
544         aspeed,ext-active-high;
545
546         pinctrl-names = "default";
547         pinctrl-0 = <&pinctrl_wdtrst1_default>;
548 };
549
550 &ibt {
551         status = "okay";
552 };