Merge tag 'v3.8-rc1' into staging/for_v3.9
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / armada-xp-mv78460.dtsi
1 /*
2  * Device Tree Include file for Marvell Armada XP family SoC
3  *
4  * Copyright (C) 2012 Marvell
5  *
6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7  *
8  * This file is licensed under the terms of the GNU General Public
9  * License version 2.  This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  *
12  * Contains definitions specific to the Armada XP MV78460 SoC that are not
13  * common to all Armada XP SoCs.
14  */
15
16 /include/ "armada-xp.dtsi"
17
18 / {
19         model = "Marvell Armada XP MV78460 SoC";
20         compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
21
22         aliases {
23                 gpio0 = &gpio0;
24                 gpio1 = &gpio1;
25                 gpio2 = &gpio2;
26         };
27
28
29         cpus {
30             #address-cells = <1>;
31             #size-cells = <0>;
32
33             cpu@0 {
34                 device_type = "cpu";
35                 compatible = "marvell,sheeva-v7";
36                 reg = <0>;
37                 clocks = <&cpuclk 0>;
38             };
39
40             cpu@1 {
41                 device_type = "cpu";
42                 compatible = "marvell,sheeva-v7";
43                 reg = <1>;
44                 clocks = <&cpuclk 1>;
45             };
46
47             cpu@2 {
48                 device_type = "cpu";
49                 compatible = "marvell,sheeva-v7";
50                 reg = <2>;
51                 clocks = <&cpuclk 2>;
52             };
53
54             cpu@3 {
55                 device_type = "cpu";
56                 compatible = "marvell,sheeva-v7";
57                 reg = <3>;
58                 clocks = <&cpuclk 3>;
59             };
60         };
61
62         soc {
63                 pinctrl {
64                         compatible = "marvell,mv78460-pinctrl";
65                         reg = <0xd0018000 0x38>;
66                 };
67
68                 gpio0: gpio@d0018100 {
69                         compatible = "marvell,armadaxp-gpio";
70                         reg = <0xd0018100 0x40>,
71                             <0xd0018800 0x30>;
72                         ngpios = <32>;
73                         gpio-controller;
74                         #gpio-cells = <2>;
75                         interrupt-controller;
76                         #interrupts-cells = <2>;
77                         interrupts = <16>, <17>, <18>, <19>;
78                 };
79
80                 gpio1: gpio@d0018140 {
81                         compatible = "marvell,armadaxp-gpio";
82                         reg = <0xd0018140 0x40>,
83                             <0xd0018840 0x30>;
84                         ngpios = <32>;
85                         gpio-controller;
86                         #gpio-cells = <2>;
87                         interrupt-controller;
88                         #interrupts-cells = <2>;
89                         interrupts = <20>, <21>, <22>, <23>;
90                 };
91
92                 gpio2: gpio@d0018180 {
93                         compatible = "marvell,armadaxp-gpio";
94                         reg = <0xd0018180 0x40>,
95                             <0xd0018870 0x30>;
96                         ngpios = <3>;
97                         gpio-controller;
98                         #gpio-cells = <2>;
99                         interrupt-controller;
100                         #interrupts-cells = <2>;
101                         interrupts = <24>;
102                 };
103         };
104  };