Merge tag 'for_linus-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / armada-388-clearfog-base.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3  * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
4  *
5  *  Copyright (C) 2015 Russell King
6  *
7  * This board is in development; the contents of this file work with
8  * the A1 rev 2.0 of the board, which does not represent final
9  * production board.  Things will change, don't expect this file to
10  * remain compatible info the future.
11  */
12
13 /dts-v1/;
14 #include "armada-388-clearfog.dtsi"
15
16 / {
17         model = "SolidRun Clearfog Base A1";
18         compatible = "solidrun,clearfog-base-a1",
19                 "solidrun,clearfog-a1", "marvell,armada388",
20                 "marvell,armada385", "marvell,armada380";
21
22         gpio-keys {
23                 compatible = "gpio-keys";
24                 pinctrl-0 = <&rear_button_pins>;
25                 pinctrl-names = "default";
26
27                 button_0 {
28                         /* The rear SW3 button */
29                         label = "Rear Button";
30                         gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
31                         linux,can-disable;
32                         linux,code = <BTN_0>;
33                 };
34         };
35 };
36
37 &eth1 {
38         phy = <&phy1>;
39 };
40
41 &gpio0 {
42         phy1_reset {
43                 gpio-hog;
44                 gpios = <19 GPIO_ACTIVE_LOW>;
45                 output-low;
46                 line-name = "phy1-reset";
47         };
48 };
49
50 &mdio {
51         pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins &clearfog_phy_pins>;
52         phy1: ethernet-phy@1 {
53                 /*
54                  * Annoyingly, the marvell phy driver configures the LED
55                  * register, rather than preserving reset-loaded setting.
56                  * We undo that rubbish here.
57                  */
58                 marvell,reg-init = <3 16 0 0x101e>;
59                 reg = <1>;
60         };
61 };
62
63 &pinctrl {
64         /* phy1 reset */
65         clearfog_phy_pins: clearfog-phy-pins {
66                 marvell,pins = "mpp19";
67                 marvell,function = "gpio";
68         };
69         rear_button_pins: rear-button-pins {
70                 marvell,pins = "mpp44";
71                 marvell,function = "gpio";
72         };
73 };