arch/arm/boot/dts/am437x-gp-evm.dts

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /* AM437x GP EVM */
  10
  11 /dts-v1/;
  12
  13 #include "am4372.dtsi"
  14 #include <dt-bindings/pinctrl/am43xx.h>
  15 #include <dt-bindings/pwm/pwm.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "TI AM437x GP EVM";
  20         compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
  21
  22         aliases {
  23                 display0 = &lcd0;
  24         };
  25
  26         chosen {
  27                 stdout-path = &uart0;
  28         };
  29
  30         evm_v3_3d: fixedregulator-v3_3d {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "evm_v3_3d";
  33                 regulator-min-microvolt = <3300000>;
  34                 regulator-max-microvolt = <3300000>;
  35                 enable-active-high;
  36         };
  37
  38         vtt_fixed: fixedregulator-vtt {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vtt_fixed";
  41                 regulator-min-microvolt = <1500000>;
  42                 regulator-max-microvolt = <1500000>;
  43                 regulator-always-on;
  44                 regulator-boot-on;
  45                 enable-active-high;
  46                 gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
  47         };
  48
  49         vmmcwl_fixed: fixedregulator-mmcwl {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "vmmcwl_fixed";
  52                 regulator-min-microvolt = <1800000>;
  53                 regulator-max-microvolt = <1800000>;
  54                 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
  55                 enable-active-high;
  56         };
  57
  58         lcd_bl: backlight {
  59                 compatible = "pwm-backlight";
  60                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  61                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
  62                 default-brightness-level = <8>;
  63         };
  64
  65         matrix_keypad: matrix_keypad0 {
  66                 compatible = "gpio-matrix-keypad";
  67                 debounce-delay-ms = <5>;
  68                 col-scan-delay-us = <2>;
  69
  70                 pinctrl-names = "default", "sleep";
  71                 pinctrl-0 = <&matrix_keypad_default>;
  72                 pinctrl-1 = <&matrix_keypad_sleep>;
  73
  74                 linux,wakeup;
  75
  76                 row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
  77                                 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
  78                                 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
  79
  80                 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
  81                                 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
  82
  83                 linux,keymap = <0x00000201      /* P1 */
  84                                 0x00010202      /* P2 */
  85                                 0x01000067      /* UP */
  86                                 0x0101006a      /* RIGHT */
  87                                 0x02000069      /* LEFT */
  88                                 0x0201006c>;      /* DOWN */
  89                 };
  90
  91         lcd0: display {
  92                 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
  93                 label = "lcd";
  94
  95                 backlight = <&lcd_bl>;
  96
  97                 panel-timing {
  98                         clock-frequency = <33000000>;
  99                         hactive = <800>;
 100                         vactive = <480>;
 101                         hfront-porch = <210>;
 102                         hback-porch = <16>;
 103                         hsync-len = <30>;
 104                         vback-porch = <10>;
 105                         vfront-porch = <22>;
 106                         vsync-len = <13>;
 107                         hsync-active = <0>;
 108                         vsync-active = <0>;
 109                         de-active = <1>;
 110                         pixelclk-active = <1>;
 111                 };
 112
 113                 port {
 114                         lcd_in: endpoint {
 115                                 remote-endpoint = <&dpi_out>;
 116                         };
 117                 };
 118         };
 119
 120         /* fixed 12MHz oscillator */
 121         refclk: oscillator {
 122                 #clock-cells = <0>;
 123                 compatible = "fixed-clock";
 124                 clock-frequency = <12000000>;
 125         };
 126
 127         /* fixed 32k external oscillator clock */
 128         clk_32k_rtc: clk_32k_rtc {
 129                 #clock-cells = <0>;
 130                 compatible = "fixed-clock";
 131                 clock-frequency = <32768>;
 132         };
 133
 134         sound0: sound0 {
 135                 compatible = "simple-audio-card";
 136                 simple-audio-card,name = "AM437x-GP-EVM";
 137                 simple-audio-card,widgets =
 138                         "Headphone", "Headphone Jack",
 139                         "Line", "Line In";
 140                 simple-audio-card,routing =
 141                         "Headphone Jack",       "HPLOUT",
 142                         "Headphone Jack",       "HPROUT",
 143                         "LINE1L",               "Line In",
 144                         "LINE1R",               "Line In";
 145                 simple-audio-card,format = "dsp_b";
 146                 simple-audio-card,bitclock-master = <&sound0_master>;
 147                 simple-audio-card,frame-master = <&sound0_master>;
 148                 simple-audio-card,bitclock-inversion;
 149
 150                 simple-audio-card,cpu {
 151                         sound-dai = <&mcasp1>;
 152                         system-clock-frequency = <12000000>;
 153                 };
 154
 155                 sound0_master: simple-audio-card,codec {
 156                         sound-dai = <&tlv320aic3106>;
 157                         system-clock-frequency = <12000000>;
 158                 };
 159         };
 160
 161         beeper: beeper {
 162                 compatible = "gpio-beeper";
 163                 pinctrl-names = "default";
 164                 pinctrl-0 = <&beeper_pins_default>;
 165                 pinctrl-1 = <&beeper_pins_sleep>;
 166                 gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
 167         };
 168 };
 169
 170 &am43xx_pinmux {
 171         pinctrl-names = "default", "sleep";
 172         pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;
 173         pinctrl-1 = <&wlan_pins_sleep>;
 174
 175         ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
 176                 pinctrl-single,pins = <
 177                         0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
 178                 >;
 179         };
 180
 181         i2c0_pins: i2c0_pins {
 182                 pinctrl-single,pins = <
 183                         AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
 184                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
 185                 >;
 186         };
 187
 188         i2c1_pins: i2c1_pins {
 189                 pinctrl-single,pins = <
 190                         AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
 191                         AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
 192                 >;
 193         };
 194
 195         mmc1_pins: pinmux_mmc1_pins {
 196                 pinctrl-single,pins = <
 197                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 198                 >;
 199         };
 200
 201         ecap0_pins: backlight_pins {
 202                 pinctrl-single,pins = <
 203                         AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
 204                 >;
 205         };
 206
 207         pixcir_ts_pins: pixcir_ts_pins {
 208                 pinctrl-single,pins = <
 209                         AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
 210                 >;
 211         };
 212
 213         cpsw_default: cpsw_default {
 214                 pinctrl-single,pins = <
 215                         /* Slave 1 */
 216                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
 217                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
 218                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
 219                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
 220                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
 221                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
 222                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
 223                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
 224                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
 225                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
 226                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
 227                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
 228                 >;
 229         };
 230
 231         cpsw_sleep: cpsw_sleep {
 232                 pinctrl-single,pins = <
 233                         /* Slave 1 reset value */
 234                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 235                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 236                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 237                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 238                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 239                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 240                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 241                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 242                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 243                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 244                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 245                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 246                 >;
 247         };
 248
 249         davinci_mdio_default: davinci_mdio_default {
 250                 pinctrl-single,pins = <
 251                         /* MDIO */
 252                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 253                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 254                 >;
 255         };
 256
 257         davinci_mdio_sleep: davinci_mdio_sleep {
 258                 pinctrl-single,pins = <
 259                         /* MDIO reset value */
 260                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 261                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 262                 >;
 263         };
 264
 265         nand_flash_x8: nand_flash_x8 {
 266                 pinctrl-single,pins = <
 267                         AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
 268                         AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
 269                         AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
 270                         AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
 271                         AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
 272                         AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
 273                         AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
 274                         AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
 275                         AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 276                         AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
 277                         AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
 278                         AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 279                         AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 280                         AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 281                         AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 282                 >;
 283         };
 284
 285         dss_pins: dss_pins {
 286                 pinctrl-single,pins = <
 287                         AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
 288                         AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
 289                         AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
 290                         AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
 291                         AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
 292                         AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
 293                         AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
 294                         AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
 295                         AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
 296                         AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 297                         AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 298                         AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
 299                         AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 300                         AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 301                         AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 302                         AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 303                         AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 304                         AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 305                         AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 306                         AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 307                         AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 308                         AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 309                         AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 310                         AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
 311                         AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
 312                         AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
 313                         AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
 314                         AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
 315
 316                 >;
 317         };
 318
 319         display_mux_pins: display_mux_pins {
 320                 pinctrl-single,pins = <
 321                         /* GPIO 5_8 to select LCD / HDMI */
 322                         AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
 323                 >;
 324         };
 325
 326         dcan0_default: dcan0_default_pins {
 327                 pinctrl-single,pins = <
 328                         AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
 329                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_rtsn.d_can0_rx */
 330                 >;
 331         };
 332
 333         dcan0_sleep: dcan0_sleep_pins {
 334                 pinctrl-single,pins = <
 335                         AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_ctsn.gpio0_12 */
 336                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rtsn.gpio0_13 */
 337                 >;
 338         };
 339
 340         dcan1_default: dcan1_default_pins {
 341                 pinctrl-single,pins = <
 342                         AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)             /* uart1_rxd.d_can1_tx */
 343                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.d_can1_rx */
 344                 >;
 345         };
 346
 347         dcan1_sleep: dcan1_sleep_pins {
 348                 pinctrl-single,pins = <
 349                         AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rxd.gpio0_14 */
 350                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_txd.gpio0_15 */
 351                 >;
 352         };
 353
 354         vpfe0_pins_default: vpfe0_pins_default {
 355                 pinctrl-single,pins = <
 356                         AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
 357                         AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
 358                         AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
 359                         AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
 360                         AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
 361                         AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
 362                         AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
 363                         AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
 364                         AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
 365                         AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
 366                         AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
 367                         AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
 368                         AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
 369                 >;
 370         };
 371
 372         vpfe0_pins_sleep: vpfe0_pins_sleep {
 373                 pinctrl-single,pins = <
 374                         AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
 375                         AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
 376                         AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
 377                         AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
 378                         AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
 379                         AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
 380                         AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
 381                         AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
 382                         AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
 383                         AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
 384                         AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
 385                         AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
 386                         AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
 387                 >;
 388         };
 389
 390         vpfe1_pins_default: vpfe1_pins_default {
 391                 pinctrl-single,pins = <
 392                         AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
 393                         AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
 394                         AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
 395                         AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
 396                         AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
 397                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
 398                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
 399                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
 400                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
 401                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
 402                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
 403                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
 404                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
 405                 >;
 406         };
 407
 408         vpfe1_pins_sleep: vpfe1_pins_sleep {
 409                 pinctrl-single,pins = <
 410                         AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
 411                         AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
 412                         AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
 413                         AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
 414                         AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
 415                         AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
 416                         AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
 417                         AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
 418                         AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
 419                         AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
 420                         AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
 421                         AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
 422                         AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
 423                 >;
 424         };
 425
 426         mmc3_pins_default: pinmux_mmc3_pins_default {
 427                 pinctrl-single,pins = <
 428                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
 429                         AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
 430                         AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
 431                         AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
 432                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
 433                         AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
 434                 >;
 435         };
 436
 437         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
 438                 pinctrl-single,pins = <
 439                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_clk.mmc2_clk */
 440                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_csn3.mmc2_cmd */
 441                         AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a1.mmc2_dat0 */
 442                         AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a2.mmc2_dat1 */
 443                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a3.mmc2_dat2 */
 444                         AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_be1n.mmc2_dat3 */
 445                 >;
 446         };
 447
 448         wlan_pins_default: pinmux_wlan_pins_default {
 449                 pinctrl-single,pins = <
 450                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
 451                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
 452                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
 453                 >;
 454         };
 455
 456         wlan_pins_sleep: pinmux_wlan_pins_sleep {
 457                 pinctrl-single,pins = <
 458                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
 459                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
 460                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)              /* gpmc_a0.gpio1_16 BT_EN*/
 461                 >;
 462         };
 463
 464         uart3_pins: uart3_pins {
 465                 pinctrl-single,pins = <
 466                         AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)              /* uart3_rxd.uart3_rxd */
 467                         AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
 468                         AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart3_ctsn.uart3_ctsn */
 469                         AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
 470                 >;
 471         };
 472
 473         mcasp1_pins: mcasp1_pins {
 474                 pinctrl-single,pins = <
 475                         AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
 476                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
 477                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
 478                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
 479                 >;
 480         };
 481
 482         mcasp1_sleep_pins: mcasp1_sleep_pins {
 483                 pinctrl-single,pins = <
 484                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
 485                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 486                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 487                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 488                 >;
 489         };
 490
 491         gpio0_pins: gpio0_pins {
 492                 pinctrl-single,pins = <
 493                         AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
 494                 >;
 495         };
 496
 497         emmc_pins_default: emmc_pins_default {
 498                 pinctrl-single,pins = <
 499                         AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
 500                         AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
 501                         AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
 502                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
 503                         AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
 504                         AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
 505                         AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
 506                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
 507                         AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
 508                         AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
 509                 >;
 510         };
 511
 512         emmc_pins_sleep: emmc_pins_sleep {
 513                 pinctrl-single,pins = <
 514                         AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
 515                         AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
 516                         AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
 517                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
 518                         AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
 519                         AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
 520                         AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
 521                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
 522                         AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
 523                         AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
 524                 >;
 525         };
 526
 527         beeper_pins_default: beeper_pins_default {
 528                 pinctrl-single,pins = <
 529                         AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
 530                 >;
 531         };
 532
 533         beeper_pins_sleep: beeper_pins_sleep {
 534                 pinctrl-single,pins = <
 535                         AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* cam1_field.gpio4_12 */
 536                 >;
 537         };
 538
 539         unused_pins: unused_pins {
 540                 pinctrl-single,pins = <
 541                         AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
 542                         AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
 543                         AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
 544                         AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
 545                         AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
 546                         AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 547                         AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
 548                         AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
 549                         AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
 550                         AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
 551                         AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 552                         AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 553                         AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
 554                         AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
 555                         AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
 556                         AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
 557                         AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 558                         AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
 559                         AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
 560                         AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
 561                         AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
 562                         AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
 563                         AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
 564                         AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
 565                         AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
 566                         AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
 567                         AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
 568                         AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 569                         AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
 570                         AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 571                         AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 572                         AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 573                         AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
 574                         AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 575                         AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 576                         AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 577                         AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
 578                         AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
 579                         AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
 580                         AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
 581                         AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 582                         AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
 583                         AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
 584                         AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
 585                 >;
 586         };
 587
 588         debugss_pins: pinmux_debugss_pins {
 589                 pinctrl-single,pins = <
 590                         AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
 591                         AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
 592                         AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
 593                         AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
 594                         AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
 595                         AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
 596                         AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
 597                 >;
 598         };
 599
 600         uart0_pins_default: uart0_pins_default {
 601                 pinctrl-single,pins = <
 602                         AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
 603                         AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
 604                         AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
 605                         AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
 606                 >;
 607         };
 608
 609         uart0_pins_sleep: uart0_pins_sleep {
 610                 pinctrl-single,pins = <
 611                         AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */
 612                         AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */
 613                         AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
 614                         AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
 615                 >;
 616         };
 617
 618         matrix_keypad_default: matrix_keypad_default {
 619                 pinctrl-single,pins = <
 620                         AM4372_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)
 621                         AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE7)
 622                         AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
 623                         AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
 624                 >;
 625         };
 626
 627         matrix_keypad_sleep: matrix_keypad_sleep {
 628                 pinctrl-single,pins = <
 629                         AM4372_IOPAD(0x9a4, PULL_UP | MUX_MODE7)
 630                         AM4372_IOPAD(0x9a8, PULL_UP | MUX_MODE7)
 631                         AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
 632                         AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
 633                 >;
 634         };
 635 };
 636
 637 &uart0 {
 638         status = "okay";
 639         pinctrl-names = "default", "sleep";
 640         pinctrl-0 = <&uart0_pins_default>;
 641         pinctrl-1 = <&uart0_pins_sleep>;
 642 };
 643
 644 &i2c0 {
 645         status = "okay";
 646         pinctrl-names = "default";
 647         pinctrl-0 = <&i2c0_pins>;
 648         clock-frequency = <100000>;
 649
 650         tps65218: tps65218@24 {
 651                 reg = <0x24>;
 652                 compatible = "ti,tps65218";
 653                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
 654                 interrupt-controller;
 655                 #interrupt-cells = <2>;
 656
 657                 dcdc1: regulator-dcdc1 {
 658                         regulator-name = "vdd_core";
 659                         regulator-min-microvolt = <912000>;
 660                         regulator-max-microvolt = <1144000>;
 661                         regulator-boot-on;
 662                         regulator-always-on;
 663                 };
 664
 665                 dcdc2: regulator-dcdc2 {
 666                         regulator-name = "vdd_mpu";
 667                         regulator-min-microvolt = <912000>;
 668                         regulator-max-microvolt = <1378000>;
 669                         regulator-boot-on;
 670                         regulator-always-on;
 671                 };
 672
 673                 dcdc3: regulator-dcdc3 {
 674                         regulator-name = "vdcdc3";
 675                         regulator-boot-on;
 676                         regulator-always-on;
 677                         regulator-state-mem {
 678                                 regulator-on-in-suspend;
 679                         };
 680                         regulator-state-disk {
 681                                 regulator-off-in-suspend;
 682                         };
 683                 };
 684
 685                 dcdc5: regulator-dcdc5 {
 686                         regulator-name = "v1_0bat";
 687                         regulator-min-microvolt = <1000000>;
 688                         regulator-max-microvolt = <1000000>;
 689                         regulator-boot-on;
 690                         regulator-always-on;
 691                         regulator-state-mem {
 692                                 regulator-on-in-suspend;
 693                         };
 694                 };
 695
 696                 dcdc6: regulator-dcdc6 {
 697                         regulator-name = "v1_8bat";
 698                         regulator-min-microvolt = <1800000>;
 699                         regulator-max-microvolt = <1800000>;
 700                         regulator-boot-on;
 701                         regulator-always-on;
 702                         regulator-state-mem {
 703                                 regulator-on-in-suspend;
 704                         };
 705                 };
 706
 707                 ldo1: regulator-ldo1 {
 708                         regulator-min-microvolt = <1800000>;
 709                         regulator-max-microvolt = <1800000>;
 710                         regulator-boot-on;
 711                         regulator-always-on;
 712                 };
 713         };
 714
 715         ov2659@30 {
 716                 compatible = "ovti,ov2659";
 717                 reg = <0x30>;
 718
 719                 clocks = <&refclk 0>;
 720                 clock-names = "xvclk";
 721
 722                 port {
 723                         ov2659_0: endpoint {
 724                                 remote-endpoint = <&vpfe1_ep>;
 725                                 link-frequencies = /bits/ 64 <70000000>;
 726                         };
 727                 };
 728         };
 729 };
 730
 731 &i2c1 {
 732         status = "okay";
 733         pinctrl-names = "default";
 734         pinctrl-0 = <&i2c1_pins>;
 735         pixcir_ts@5c {
 736                 compatible = "pixcir,pixcir_tangoc";
 737                 pinctrl-names = "default";
 738                 pinctrl-0 = <&pixcir_ts_pins>;
 739                 reg = <0x5c>;
 740
 741                 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 742
 743                 /*
 744                  * 0x264 represents the offset of padconf register of
 745                  * gpio3_22 from am43xx_pinmux base.
 746                  */
 747                 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
 748                                       <&am43xx_pinmux 0x264>;
 749                 interrupt-names = "tsc", "wakeup";
 750
 751                 touchscreen-size-x = <1024>;
 752                 touchscreen-size-y = <600>;
 753                 wakeup-source;
 754         };
 755
 756         ov2659@30 {
 757                 compatible = "ovti,ov2659";
 758                 reg = <0x30>;
 759
 760                 clocks = <&refclk 0>;
 761                 clock-names = "xvclk";
 762
 763                 port {
 764                         ov2659_1: endpoint {
 765                                 remote-endpoint = <&vpfe0_ep>;
 766                                 link-frequencies = /bits/ 64 <70000000>;
 767                         };
 768                 };
 769         };
 770
 771         tlv320aic3106: tlv320aic3106@1b {
 772                 #sound-dai-cells = <0>;
 773                 compatible = "ti,tlv320aic3106";
 774                 reg = <0x1b>;
 775                 status = "okay";
 776
 777                 /* Regulators */
 778                 IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
 779                 AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
 780                 DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
 781                 DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
 782         };
 783 };
 784
 785 &epwmss0 {
 786         status = "okay";
 787 };
 788
 789 &tscadc {
 790         status = "okay";
 791
 792         adc {
 793                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 794         };
 795 };
 796
 797 &ecap0 {
 798         status = "okay";
 799         pinctrl-names = "default";
 800         pinctrl-0 = <&ecap0_pins>;
 801 };
 802
 803 &gpio0 {
 804         pinctrl-names = "default";
 805         pinctrl-0 = <&gpio0_pins>;
 806         status = "okay";
 807
 808         p23 {
 809                 gpio-hog;
 810                 gpios = <23 GPIO_ACTIVE_HIGH>;
 811                 /* SelEMMCorNAND selects between eMMC and NAND:
 812                  * Low: NAND
 813                  * High: eMMC
 814                  * When changing this line make sure the newly
 815                  * selected device node is enabled and the previously
 816                  * selected device node is disabled.
 817                  */
 818                 output-low;
 819                 line-name = "SelEMMCorNAND";
 820         };
 821 };
 822
 823 &gpio1 {
 824         status = "okay";
 825 };
 826
 827 &gpio3 {
 828         status = "okay";
 829 };
 830
 831 &gpio4 {
 832         status = "okay";
 833 };
 834
 835 &gpio5 {
 836         pinctrl-names = "default";
 837         pinctrl-0 = <&display_mux_pins>;
 838         status = "okay";
 839         ti,no-reset-on-init;
 840
 841         p8 {
 842                 /*
 843                  * SelLCDorHDMI selects between display and audio paths:
 844                  * Low: HDMI display with audio via HDMI
 845                  * High: LCD display with analog audio via aic3111 codec
 846                  */
 847                 gpio-hog;
 848                 gpios = <8 GPIO_ACTIVE_HIGH>;
 849                 output-high;
 850                 line-name = "SelLCDorHDMI";
 851         };
 852 };
 853
 854 &mmc1 {
 855         status = "okay";
 856         vmmc-supply = <&evm_v3_3d>;
 857         bus-width = <4>;
 858         pinctrl-names = "default";
 859         pinctrl-0 = <&mmc1_pins>;
 860         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 861 };
 862
 863 /* eMMC sits on mmc2 */
 864 &mmc2 {
 865         /*
 866          * When enabling eMMC, disable GPMC/NAND and set
 867          * SelEMMCorNAND to output-high
 868          */
 869         status = "disabled";
 870         vmmc-supply = <&evm_v3_3d>;
 871         bus-width = <8>;
 872         pinctrl-names = "default", "sleep";
 873         pinctrl-0 = <&emmc_pins_default>;
 874         pinctrl-1 = <&emmc_pins_sleep>;
 875         ti,non-removable;
 876 };
 877
 878 &mmc3 {
 879         status = "okay";
 880         /* these are on the crossbar and are outlined in the
 881            xbar-event-map element */
 882         dmas = <&edma_xbar 30 0 1>,
 883                 <&edma_xbar 31 0 2>;
 884         dma-names = "tx", "rx";
 885         vmmc-supply = <&vmmcwl_fixed>;
 886         bus-width = <4>;
 887         pinctrl-names = "default", "sleep";
 888         pinctrl-0 = <&mmc3_pins_default>;
 889         pinctrl-1 = <&mmc3_pins_sleep>;
 890         cap-power-off-card;
 891         keep-power-in-suspend;
 892         ti,non-removable;
 893
 894         #address-cells = <1>;
 895         #size-cells = <0>;
 896         wlcore: wlcore@0 {
 897                 compatible = "ti,wl1835";
 898                 reg = <2>;
 899                 interrupt-parent = <&gpio1>;
 900                 interrupts = <23 IRQ_TYPE_EDGE_RISING>;
 901         };
 902 };
 903
 904 &uart3 {
 905         status = "okay";
 906         pinctrl-names = "default";
 907         pinctrl-0 = <&uart3_pins>;
 908 };
 909
 910 &usb2_phy1 {
 911         status = "okay";
 912 };
 913
 914 &usb1 {
 915         dr_mode = "otg";
 916         status = "okay";
 917 };
 918
 919 &usb2_phy2 {
 920         status = "okay";
 921 };
 922
 923 &usb2 {
 924         dr_mode = "host";
 925         status = "okay";
 926 };
 927
 928 &mac {
 929         slaves = <1>;
 930         pinctrl-names = "default", "sleep";
 931         pinctrl-0 = <&cpsw_default>;
 932         pinctrl-1 = <&cpsw_sleep>;
 933         status = "okay";
 934 };
 935
 936 &davinci_mdio {
 937         pinctrl-names = "default", "sleep";
 938         pinctrl-0 = <&davinci_mdio_default>;
 939         pinctrl-1 = <&davinci_mdio_sleep>;
 940         status = "okay";
 941
 942         ethphy0: ethernet-phy@0 {
 943                 reg = <0>;
 944         };
 945 };
 946
 947 &cpsw_emac0 {
 948         phy-handle = <&ethphy0>;
 949         phy-mode = "rgmii";
 950 };
 951
 952 &elm {
 953         status = "okay";
 954 };
 955
 956 &gpmc {
 957         /*
 958          * When enabling GPMC, disable eMMC and set
 959          * SelEMMCorNAND to output-low
 960          */
 961         status = "okay";
 962         pinctrl-names = "default";
 963         pinctrl-0 = <&nand_flash_x8>;
 964         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
 965         nand@0,0 {
 966                 compatible = "ti,omap2-nand";
 967                 reg = <0 0 4>;          /* device IO registers */
 968                 interrupt-parent = <&gpmc>;
 969                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 970                              <1 IRQ_TYPE_NONE>; /* termcount */
 971                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
 972                 ti,nand-xfer-type = "prefetch-dma";
 973                 ti,nand-ecc-opt = "bch16";
 974                 ti,elm-id = <&elm>;
 975                 nand-bus-width = <8>;
 976                 gpmc,device-width = <1>;
 977                 gpmc,sync-clk-ps = <0>;
 978                 gpmc,cs-on-ns = <0>;
 979                 gpmc,cs-rd-off-ns = <40>;
 980                 gpmc,cs-wr-off-ns = <40>;
 981                 gpmc,adv-on-ns = <0>;
 982                 gpmc,adv-rd-off-ns = <25>;
 983                 gpmc,adv-wr-off-ns = <25>;
 984                 gpmc,we-on-ns = <0>;
 985                 gpmc,we-off-ns = <20>;
 986                 gpmc,oe-on-ns = <3>;
 987                 gpmc,oe-off-ns = <30>;
 988                 gpmc,access-ns = <30>;
 989                 gpmc,rd-cycle-ns = <40>;
 990                 gpmc,wr-cycle-ns = <40>;
 991                 gpmc,bus-turnaround-ns = <0>;
 992                 gpmc,cycle2cycle-delay-ns = <0>;
 993                 gpmc,clk-activation-ns = <0>;
 994                 gpmc,wr-access-ns = <40>;
 995                 gpmc,wr-data-mux-bus-ns = <0>;
 996                 /* MTD partition table */
 997                 /* All SPL-* partitions are sized to minimal length
 998                  * which can be independently programmable. For
 999                  * NAND flash this is equal to size of erase-block */
1000                 #address-cells = <1>;
1001                 #size-cells = <1>;
1002                 partition@0 {
1003                         label = "NAND.SPL";
1004                         reg = <0x00000000 0x00040000>;
1005                 };
1006                 partition@1 {
1007                         label = "NAND.SPL.backup1";
1008                         reg = <0x00040000 0x00040000>;
1009                 };
1010                 partition@2 {
1011                         label = "NAND.SPL.backup2";
1012                         reg = <0x00080000 0x00040000>;
1013                 };
1014                 partition@3 {
1015                         label = "NAND.SPL.backup3";
1016                         reg = <0x000c0000 0x00040000>;
1017                 };
1018                 partition@4 {
1019                         label = "NAND.u-boot-spl-os";
1020                         reg = <0x00100000 0x00080000>;
1021                 };
1022                 partition@5 {
1023                         label = "NAND.u-boot";
1024                         reg = <0x00180000 0x00100000>;
1025                 };
1026                 partition@6 {
1027                         label = "NAND.u-boot-env";
1028                         reg = <0x00280000 0x00040000>;
1029                 };
1030                 partition@7 {
1031                         label = "NAND.u-boot-env.backup1";
1032                         reg = <0x002c0000 0x00040000>;
1033                 };
1034                 partition@8 {
1035                         label = "NAND.kernel";
1036                         reg = <0x00300000 0x00700000>;
1037                 };
1038                 partition@9 {
1039                         label = "NAND.file-system";
1040                         reg = <0x00a00000 0x1f600000>;
1041                 };
1042         };
1043 };
1044
1045 &dss {
1046         status = "ok";
1047
1048         pinctrl-names = "default";
1049         pinctrl-0 = <&dss_pins>;
1050
1051         port {
1052                 dpi_out: endpoint {
1053                         remote-endpoint = <&lcd_in>;
1054                         data-lines = <24>;
1055                 };
1056         };
1057 };
1058
1059 &dcan0 {
1060         pinctrl-names = "default", "sleep";
1061         pinctrl-0 = <&dcan0_default>;
1062         pinctrl-1 = <&dcan0_sleep>;
1063         status = "okay";
1064 };
1065
1066 &dcan1 {
1067         pinctrl-names = "default", "sleep";
1068         pinctrl-0 = <&dcan1_default>;
1069         pinctrl-1 = <&dcan1_sleep>;
1070         status = "okay";
1071 };
1072
1073 &vpfe0 {
1074         status = "okay";
1075         pinctrl-names = "default", "sleep";
1076         pinctrl-0 = <&vpfe0_pins_default>;
1077         pinctrl-1 = <&vpfe0_pins_sleep>;
1078
1079         port {
1080                 vpfe0_ep: endpoint {
1081                         remote-endpoint = <&ov2659_1>;
1082                         ti,am437x-vpfe-interface = <0>;
1083                         bus-width = <8>;
1084                         hsync-active = <0>;
1085                         vsync-active = <0>;
1086                 };
1087         };
1088 };
1089
1090 &vpfe1 {
1091         status = "okay";
1092         pinctrl-names = "default", "sleep";
1093         pinctrl-0 = <&vpfe1_pins_default>;
1094         pinctrl-1 = <&vpfe1_pins_sleep>;
1095
1096         port {
1097                 vpfe1_ep: endpoint {
1098                         remote-endpoint = <&ov2659_0>;
1099                         ti,am437x-vpfe-interface = <0>;
1100                         bus-width = <8>;
1101                         hsync-active = <0>;
1102                         vsync-active = <0>;
1103                 };
1104         };
1105 };
1106
1107 &mcasp1 {
1108         #sound-dai-cells = <0>;
1109         pinctrl-names = "default", "sleep";
1110         pinctrl-0 = <&mcasp1_pins>;
1111         pinctrl-1 = <&mcasp1_sleep_pins>;
1112
1113         status = "okay";
1114
1115         op-mode = <0>; /* MCASP_IIS_MODE */
1116         tdm-slots = <2>;
1117         /* 4 serializers */
1118         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1119                 0 0 1 2
1120         >;
1121         tx-num-evt = <32>;
1122         rx-num-evt = <32>;
1123 };
1124
1125 &rtc {
1126         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1127         clock-names = "ext-clk", "int-clk";
1128         status = "okay";
1129 };
1130
1131 &cpu {
1132         cpu0-supply = <&dcdc2>;
1133 };